1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajja 3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_ 4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
5 */ 5 */
6 6
>> 7 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes. 8 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h> 10 #include <dt-bindings/pwm/pwm.h>
>> 11 #include "rk3399.dtsi"
>> 12 #include "rk3399-opp.dtsi"
10 13
11 / { 14 / {
12 aliases { 15 aliases {
13 ethernet0 = &gmac; <<
14 mmc0 = &sdhci; 16 mmc0 = &sdhci;
15 mmc1 = &sdmmc; 17 mmc1 = &sdmmc;
16 }; 18 };
17 19
18 chosen { 20 chosen {
19 stdout-path = "serial2:1500000 21 stdout-path = "serial2:1500000n8";
20 }; 22 };
21 23
22 clkin_gmac: external-gmac-clock { 24 clkin_gmac: external-gmac-clock {
23 compatible = "fixed-clock"; 25 compatible = "fixed-clock";
24 clock-frequency = <125000000>; 26 clock-frequency = <125000000>;
25 clock-output-names = "clkin_gm 27 clock-output-names = "clkin_gmac";
26 #clock-cells = <0>; 28 #clock-cells = <0>;
27 }; 29 };
28 30
29 leds { 31 leds {
30 compatible = "gpio-leds"; 32 compatible = "gpio-leds";
31 pinctrl-names = "default"; 33 pinctrl-names = "default";
32 pinctrl-0 = <&user_led2>; 34 pinctrl-0 = <&user_led2>;
33 35
34 /* USER_LED2 */ 36 /* USER_LED2 */
35 led-0 { 37 led-0 {
36 function = LED_FUNCTIO 38 function = LED_FUNCTION_STATUS;
37 color = <LED_COLOR_ID_ 39 color = <LED_COLOR_ID_BLUE>;
38 gpios = <&gpio3 RK_PD5 40 gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
39 linux,default-trigger 41 linux,default-trigger = "heartbeat";
40 }; 42 };
41 }; 43 };
42 44
43 sdio_pwrseq: sdio-pwrseq { 45 sdio_pwrseq: sdio-pwrseq {
44 compatible = "mmc-pwrseq-simpl 46 compatible = "mmc-pwrseq-simple";
45 clocks = <&rk808 1>; 47 clocks = <&rk808 1>;
46 clock-names = "lpo"; 48 clock-names = "lpo";
47 pinctrl-names = "default"; 49 pinctrl-names = "default";
48 pinctrl-0 = <&wifi_enable_h>; 50 pinctrl-0 = <&wifi_enable_h>;
49 reset-gpios = <&gpio0 RK_PB2 G 51 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
50 }; 52 };
51 53
52 sound: sound { 54 sound: sound {
53 compatible = "audio-graph-card 55 compatible = "audio-graph-card";
54 label = "Analog"; 56 label = "Analog";
55 dais = <&i2s0_p0>; 57 dais = <&i2s0_p0>;
56 }; 58 };
57 59
58 sound-dit { 60 sound-dit {
59 compatible = "audio-graph-card 61 compatible = "audio-graph-card";
60 label = "SPDIF"; 62 label = "SPDIF";
61 dais = <&spdif_p0>; 63 dais = <&spdif_p0>;
62 }; 64 };
63 65
64 spdif-dit { 66 spdif-dit {
65 compatible = "linux,spdif-dit" 67 compatible = "linux,spdif-dit";
66 #sound-dai-cells = <0>; 68 #sound-dai-cells = <0>;
67 69
68 port { 70 port {
69 dit_p0_0: endpoint { 71 dit_p0_0: endpoint {
70 remote-endpoin 72 remote-endpoint = <&spdif_p0_0>;
71 }; 73 };
72 }; 74 };
73 }; 75 };
74 76
75 vbus_typec: vbus-typec-regulator { 77 vbus_typec: vbus-typec-regulator {
76 compatible = "regulator-fixed" 78 compatible = "regulator-fixed";
77 enable-active-high; 79 enable-active-high;
78 gpio = <&gpio1 RK_PA3 GPIO_ACT 80 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
79 pinctrl-names = "default"; 81 pinctrl-names = "default";
80 pinctrl-0 = <&vcc5v0_typec_en> 82 pinctrl-0 = <&vcc5v0_typec_en>;
81 regulator-name = "vbus_typec"; 83 regulator-name = "vbus_typec";
82 regulator-always-on; 84 regulator-always-on;
83 vin-supply = <&vcc5v0_sys>; 85 vin-supply = <&vcc5v0_sys>;
84 }; 86 };
85 87
86 vcc12v_dcin: dc-12v { 88 vcc12v_dcin: dc-12v {
87 compatible = "regulator-fixed" 89 compatible = "regulator-fixed";
88 regulator-name = "vcc12v_dcin" 90 regulator-name = "vcc12v_dcin";
89 regulator-always-on; 91 regulator-always-on;
90 regulator-boot-on; 92 regulator-boot-on;
91 regulator-min-microvolt = <120 93 regulator-min-microvolt = <12000000>;
92 regulator-max-microvolt = <120 94 regulator-max-microvolt = <12000000>;
93 }; 95 };
94 96
95 vcc3v3_lan: vcc3v3-lan-regulator { 97 vcc3v3_lan: vcc3v3-lan-regulator {
96 compatible = "regulator-fixed" 98 compatible = "regulator-fixed";
97 regulator-name = "vcc3v3_lan"; 99 regulator-name = "vcc3v3_lan";
98 regulator-always-on; 100 regulator-always-on;
99 regulator-boot-on; 101 regulator-boot-on;
100 regulator-min-microvolt = <330 102 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <330 103 regulator-max-microvolt = <3300000>;
102 vin-supply = <&vcc3v3_sys>; 104 vin-supply = <&vcc3v3_sys>;
103 }; 105 };
104 106
105 vcc3v3_pcie: vcc3v3-pcie-regulator { 107 vcc3v3_pcie: vcc3v3-pcie-regulator {
106 compatible = "regulator-fixed" 108 compatible = "regulator-fixed";
107 enable-active-high; 109 enable-active-high;
108 gpio = <&gpio2 RK_PD2 GPIO_ACT 110 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
109 pinctrl-names = "default"; 111 pinctrl-names = "default";
110 pinctrl-0 = <&pcie_pwr_en>; 112 pinctrl-0 = <&pcie_pwr_en>;
111 regulator-name = "vcc3v3_pcie" 113 regulator-name = "vcc3v3_pcie";
112 regulator-always-on; 114 regulator-always-on;
113 regulator-boot-on; 115 regulator-boot-on;
114 vin-supply = <&vcc5v0_sys>; 116 vin-supply = <&vcc5v0_sys>;
115 }; 117 };
116 118
117 vcc3v3_sys: vcc3v3-sys { 119 vcc3v3_sys: vcc3v3-sys {
118 compatible = "regulator-fixed" 120 compatible = "regulator-fixed";
119 regulator-name = "vcc3v3_sys"; 121 regulator-name = "vcc3v3_sys";
120 regulator-always-on; 122 regulator-always-on;
121 regulator-boot-on; 123 regulator-boot-on;
122 regulator-min-microvolt = <330 124 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <330 125 regulator-max-microvolt = <3300000>;
124 vin-supply = <&vcc5v0_sys>; 126 vin-supply = <&vcc5v0_sys>;
125 }; 127 };
126 128
127 vcc5v0_host: vcc5v0-host-regulator { 129 vcc5v0_host: vcc5v0-host-regulator {
128 compatible = "regulator-fixed" 130 compatible = "regulator-fixed";
129 enable-active-high; 131 enable-active-high;
130 gpio = <&gpio4 RK_PD1 GPIO_ACT 132 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
131 pinctrl-names = "default"; 133 pinctrl-names = "default";
132 pinctrl-0 = <&vcc5v0_host_en>; 134 pinctrl-0 = <&vcc5v0_host_en>;
133 regulator-name = "vcc5v0_host" 135 regulator-name = "vcc5v0_host";
134 regulator-always-on; 136 regulator-always-on;
135 vin-supply = <&vcc5v0_sys>; 137 vin-supply = <&vcc5v0_sys>;
136 }; 138 };
137 139
138 vcc5v0_sys: vcc-sys { 140 vcc5v0_sys: vcc-sys {
139 compatible = "regulator-fixed" 141 compatible = "regulator-fixed";
140 regulator-name = "vcc5v0_sys"; 142 regulator-name = "vcc5v0_sys";
141 regulator-always-on; 143 regulator-always-on;
142 regulator-boot-on; 144 regulator-boot-on;
143 regulator-min-microvolt = <500 145 regulator-min-microvolt = <5000000>;
144 regulator-max-microvolt = <500 146 regulator-max-microvolt = <5000000>;
145 vin-supply = <&vcc12v_dcin>; 147 vin-supply = <&vcc12v_dcin>;
146 }; 148 };
147 149
148 vcc_0v9: vcc-0v9 { 150 vcc_0v9: vcc-0v9 {
149 compatible = "regulator-fixed" 151 compatible = "regulator-fixed";
150 regulator-name = "vcc_0v9"; 152 regulator-name = "vcc_0v9";
151 regulator-always-on; 153 regulator-always-on;
152 regulator-boot-on; 154 regulator-boot-on;
153 regulator-min-microvolt = <900 155 regulator-min-microvolt = <900000>;
154 regulator-max-microvolt = <900 156 regulator-max-microvolt = <900000>;
155 vin-supply = <&vcc3v3_sys>; 157 vin-supply = <&vcc3v3_sys>;
156 }; 158 };
157 159
158 vdd_log: vdd-log { 160 vdd_log: vdd-log {
159 compatible = "pwm-regulator"; 161 compatible = "pwm-regulator";
160 pwms = <&pwm2 0 25000 1>; 162 pwms = <&pwm2 0 25000 1>;
161 pwm-supply = <&vcc5v0_sys>; 163 pwm-supply = <&vcc5v0_sys>;
162 regulator-name = "vdd_log"; 164 regulator-name = "vdd_log";
163 regulator-always-on; 165 regulator-always-on;
164 regulator-boot-on; 166 regulator-boot-on;
165 regulator-min-microvolt = <800 167 regulator-min-microvolt = <800000>;
166 regulator-max-microvolt = <140 168 regulator-max-microvolt = <1400000>;
167 }; 169 };
168 }; 170 };
169 171
170 &cpu_l0 { 172 &cpu_l0 {
171 cpu-supply = <&vdd_cpu_l>; 173 cpu-supply = <&vdd_cpu_l>;
172 }; 174 };
173 175
174 &cpu_l1 { 176 &cpu_l1 {
175 cpu-supply = <&vdd_cpu_l>; 177 cpu-supply = <&vdd_cpu_l>;
176 }; 178 };
177 179
178 &cpu_l2 { 180 &cpu_l2 {
179 cpu-supply = <&vdd_cpu_l>; 181 cpu-supply = <&vdd_cpu_l>;
180 }; 182 };
181 183
182 &cpu_l3 { 184 &cpu_l3 {
183 cpu-supply = <&vdd_cpu_l>; 185 cpu-supply = <&vdd_cpu_l>;
184 }; 186 };
185 187
186 &cpu_b0 { 188 &cpu_b0 {
187 cpu-supply = <&vdd_cpu_b>; 189 cpu-supply = <&vdd_cpu_b>;
188 }; 190 };
189 191
190 &cpu_b1 { 192 &cpu_b1 {
191 cpu-supply = <&vdd_cpu_b>; 193 cpu-supply = <&vdd_cpu_b>;
192 }; 194 };
193 195
194 &emmc_phy { 196 &emmc_phy {
195 rockchip,enable-strobe-pulldown; <<
196 status = "okay"; 197 status = "okay";
197 }; 198 };
198 199
199 &gmac { 200 &gmac {
200 assigned-clocks = <&cru SCLK_RMII_SRC> 201 assigned-clocks = <&cru SCLK_RMII_SRC>;
201 assigned-clock-parents = <&clkin_gmac> 202 assigned-clock-parents = <&clkin_gmac>;
202 clock_in_out = "input"; 203 clock_in_out = "input";
203 phy-supply = <&vcc3v3_lan>; 204 phy-supply = <&vcc3v3_lan>;
204 phy-mode = "rgmii"; 205 phy-mode = "rgmii";
205 pinctrl-names = "default"; 206 pinctrl-names = "default";
206 pinctrl-0 = <&rgmii_pins>; 207 pinctrl-0 = <&rgmii_pins>;
207 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ 208 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
208 snps,reset-active-low; 209 snps,reset-active-low;
209 snps,reset-delays-us = <0 10000 50000> 210 snps,reset-delays-us = <0 10000 50000>;
210 tx_delay = <0x28>; 211 tx_delay = <0x28>;
211 rx_delay = <0x11>; 212 rx_delay = <0x11>;
212 status = "okay"; 213 status = "okay";
213 }; 214 };
214 215
215 &gpu { 216 &gpu {
216 mali-supply = <&vdd_gpu>; 217 mali-supply = <&vdd_gpu>;
217 status = "okay"; 218 status = "okay";
218 }; 219 };
219 220
220 &hdmi { 221 &hdmi {
221 avdd-0v9-supply = <&vcca0v9_hdmi>; 222 avdd-0v9-supply = <&vcca0v9_hdmi>;
222 avdd-1v8-supply = <&vcca1v8_hdmi>; 223 avdd-1v8-supply = <&vcca1v8_hdmi>;
223 ddc-i2c-bus = <&i2c3>; 224 ddc-i2c-bus = <&i2c3>;
224 pinctrl-names = "default"; 225 pinctrl-names = "default";
225 pinctrl-0 = <&hdmi_cec>; 226 pinctrl-0 = <&hdmi_cec>;
226 status = "okay"; 227 status = "okay";
227 }; 228 };
228 229
229 &hdmi_sound { 230 &hdmi_sound {
230 status = "okay"; 231 status = "okay";
231 }; 232 };
232 233
233 &i2c0 { 234 &i2c0 {
234 clock-frequency = <400000>; 235 clock-frequency = <400000>;
235 i2c-scl-rising-time-ns = <168>; 236 i2c-scl-rising-time-ns = <168>;
236 i2c-scl-falling-time-ns = <4>; 237 i2c-scl-falling-time-ns = <4>;
237 status = "okay"; 238 status = "okay";
238 239
239 rk808: pmic@1b { 240 rk808: pmic@1b {
240 compatible = "rockchip,rk808"; 241 compatible = "rockchip,rk808";
241 reg = <0x1b>; 242 reg = <0x1b>;
242 interrupt-parent = <&gpio1>; 243 interrupt-parent = <&gpio1>;
243 interrupts = <21 IRQ_TYPE_LEVE 244 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
244 #clock-cells = <1>; 245 #clock-cells = <1>;
245 clock-output-names = "xin32k", 246 clock-output-names = "xin32k", "rk808-clkout2";
246 pinctrl-names = "default"; 247 pinctrl-names = "default";
247 pinctrl-0 = <&pmic_int_l>; 248 pinctrl-0 = <&pmic_int_l>;
248 rockchip,system-power-controll 249 rockchip,system-power-controller;
249 wakeup-source; 250 wakeup-source;
250 251
251 vcc1-supply = <&vcc5v0_sys>; 252 vcc1-supply = <&vcc5v0_sys>;
252 vcc2-supply = <&vcc5v0_sys>; 253 vcc2-supply = <&vcc5v0_sys>;
253 vcc3-supply = <&vcc5v0_sys>; 254 vcc3-supply = <&vcc5v0_sys>;
254 vcc4-supply = <&vcc5v0_sys>; 255 vcc4-supply = <&vcc5v0_sys>;
255 vcc6-supply = <&vcc5v0_sys>; 256 vcc6-supply = <&vcc5v0_sys>;
256 vcc7-supply = <&vcc5v0_sys>; 257 vcc7-supply = <&vcc5v0_sys>;
257 vcc8-supply = <&vcc3v3_sys>; 258 vcc8-supply = <&vcc3v3_sys>;
258 vcc9-supply = <&vcc5v0_sys>; 259 vcc9-supply = <&vcc5v0_sys>;
259 vcc10-supply = <&vcc5v0_sys>; 260 vcc10-supply = <&vcc5v0_sys>;
260 vcc11-supply = <&vcc5v0_sys>; 261 vcc11-supply = <&vcc5v0_sys>;
261 vcc12-supply = <&vcc3v3_sys>; 262 vcc12-supply = <&vcc3v3_sys>;
262 vddio-supply = <&vcc_1v8>; 263 vddio-supply = <&vcc_1v8>;
263 264
264 regulators { 265 regulators {
265 vdd_center: DCDC_REG1 266 vdd_center: DCDC_REG1 {
266 regulator-name 267 regulator-name = "vdd_center";
267 regulator-alwa 268 regulator-always-on;
268 regulator-boot 269 regulator-boot-on;
269 regulator-min- 270 regulator-min-microvolt = <750000>;
270 regulator-max- 271 regulator-max-microvolt = <1350000>;
271 regulator-ramp 272 regulator-ramp-delay = <6001>;
272 regulator-stat 273 regulator-state-mem {
273 regula 274 regulator-off-in-suspend;
274 }; 275 };
275 }; 276 };
276 277
277 vdd_cpu_l: DCDC_REG2 { 278 vdd_cpu_l: DCDC_REG2 {
278 regulator-name 279 regulator-name = "vdd_cpu_l";
279 regulator-alwa 280 regulator-always-on;
280 regulator-boot 281 regulator-boot-on;
281 regulator-min- 282 regulator-min-microvolt = <750000>;
282 regulator-max- 283 regulator-max-microvolt = <1350000>;
283 regulator-ramp 284 regulator-ramp-delay = <6001>;
284 regulator-stat 285 regulator-state-mem {
285 regula 286 regulator-off-in-suspend;
286 }; 287 };
287 }; 288 };
288 289
289 vcc_ddr: DCDC_REG3 { 290 vcc_ddr: DCDC_REG3 {
290 regulator-name 291 regulator-name = "vcc_ddr";
291 regulator-alwa 292 regulator-always-on;
292 regulator-boot 293 regulator-boot-on;
293 regulator-stat 294 regulator-state-mem {
294 regula 295 regulator-on-in-suspend;
295 }; 296 };
296 }; 297 };
297 298
298 vcc_1v8: DCDC_REG4 { 299 vcc_1v8: DCDC_REG4 {
299 regulator-name 300 regulator-name = "vcc_1v8";
300 regulator-alwa 301 regulator-always-on;
301 regulator-boot 302 regulator-boot-on;
302 regulator-min- 303 regulator-min-microvolt = <1800000>;
303 regulator-max- 304 regulator-max-microvolt = <1800000>;
304 regulator-stat 305 regulator-state-mem {
305 regula 306 regulator-on-in-suspend;
306 regula 307 regulator-suspend-microvolt = <1800000>;
307 }; 308 };
308 }; 309 };
309 310
310 vcca1v8_codec: LDO_REG 311 vcca1v8_codec: LDO_REG1 {
311 regulator-name 312 regulator-name = "vcca1v8_codec";
312 regulator-alwa 313 regulator-always-on;
313 regulator-boot 314 regulator-boot-on;
314 regulator-min- 315 regulator-min-microvolt = <1800000>;
315 regulator-max- 316 regulator-max-microvolt = <1800000>;
316 regulator-stat 317 regulator-state-mem {
317 regula 318 regulator-off-in-suspend;
318 }; 319 };
319 }; 320 };
320 321
321 vcca1v8_hdmi: LDO_REG2 322 vcca1v8_hdmi: LDO_REG2 {
322 regulator-name 323 regulator-name = "vcca1v8_hdmi";
323 regulator-alwa 324 regulator-always-on;
324 regulator-boot 325 regulator-boot-on;
325 regulator-min- 326 regulator-min-microvolt = <1800000>;
326 regulator-max- 327 regulator-max-microvolt = <1800000>;
327 regulator-stat 328 regulator-state-mem {
328 regula 329 regulator-off-in-suspend;
329 }; 330 };
330 }; 331 };
331 332
332 vcca_1v8: LDO_REG3 { 333 vcca_1v8: LDO_REG3 {
333 regulator-name 334 regulator-name = "vcca_1v8";
334 regulator-alwa 335 regulator-always-on;
335 regulator-boot 336 regulator-boot-on;
336 regulator-min- 337 regulator-min-microvolt = <1800000>;
337 regulator-max- 338 regulator-max-microvolt = <1800000>;
338 regulator-stat 339 regulator-state-mem {
339 regula 340 regulator-on-in-suspend;
340 regula 341 regulator-suspend-microvolt = <1800000>;
341 }; 342 };
342 }; 343 };
343 344
344 vcc_sdio: LDO_REG4 { 345 vcc_sdio: LDO_REG4 {
345 regulator-name 346 regulator-name = "vcc_sdio";
346 regulator-alwa 347 regulator-always-on;
347 regulator-boot 348 regulator-boot-on;
348 regulator-min- 349 regulator-min-microvolt = <3000000>;
349 regulator-max- 350 regulator-max-microvolt = <3000000>;
350 regulator-stat 351 regulator-state-mem {
351 regula 352 regulator-on-in-suspend;
352 regula 353 regulator-suspend-microvolt = <3000000>;
353 }; 354 };
354 }; 355 };
355 356
356 vcca3v0_codec: LDO_REG 357 vcca3v0_codec: LDO_REG5 {
357 regulator-name 358 regulator-name = "vcca3v0_codec";
358 regulator-alwa 359 regulator-always-on;
359 regulator-boot 360 regulator-boot-on;
360 regulator-min- 361 regulator-min-microvolt = <3000000>;
361 regulator-max- 362 regulator-max-microvolt = <3000000>;
362 regulator-stat 363 regulator-state-mem {
363 regula 364 regulator-off-in-suspend;
364 }; 365 };
365 }; 366 };
366 367
367 vcc_1v5: LDO_REG6 { 368 vcc_1v5: LDO_REG6 {
368 regulator-name 369 regulator-name = "vcc_1v5";
369 regulator-alwa 370 regulator-always-on;
370 regulator-boot 371 regulator-boot-on;
371 regulator-min- 372 regulator-min-microvolt = <1500000>;
372 regulator-max- 373 regulator-max-microvolt = <1500000>;
373 regulator-stat 374 regulator-state-mem {
374 regula 375 regulator-on-in-suspend;
375 regula 376 regulator-suspend-microvolt = <1500000>;
376 }; 377 };
377 }; 378 };
378 379
379 vcca0v9_hdmi: LDO_REG7 380 vcca0v9_hdmi: LDO_REG7 {
380 regulator-name 381 regulator-name = "vcca0v9_hdmi";
381 regulator-alwa 382 regulator-always-on;
382 regulator-boot 383 regulator-boot-on;
383 regulator-min- 384 regulator-min-microvolt = <900000>;
384 regulator-max- 385 regulator-max-microvolt = <900000>;
385 regulator-stat 386 regulator-state-mem {
386 regula 387 regulator-off-in-suspend;
387 }; 388 };
388 }; 389 };
389 390
390 vcc_3v0: LDO_REG8 { 391 vcc_3v0: LDO_REG8 {
391 regulator-name 392 regulator-name = "vcc_3v0";
392 regulator-alwa 393 regulator-always-on;
393 regulator-boot 394 regulator-boot-on;
394 regulator-min- 395 regulator-min-microvolt = <3000000>;
395 regulator-max- 396 regulator-max-microvolt = <3000000>;
396 regulator-stat 397 regulator-state-mem {
397 regula 398 regulator-on-in-suspend;
398 regula 399 regulator-suspend-microvolt = <3000000>;
399 }; 400 };
400 }; 401 };
401 402
402 vcc_cam: SWITCH_REG1 { 403 vcc_cam: SWITCH_REG1 {
403 regulator-name 404 regulator-name = "vcc_cam";
404 regulator-alwa 405 regulator-always-on;
405 regulator-boot 406 regulator-boot-on;
406 regulator-stat 407 regulator-state-mem {
407 regula 408 regulator-off-in-suspend;
408 }; 409 };
409 }; 410 };
410 411
411 vcc_mipi: SWITCH_REG2 412 vcc_mipi: SWITCH_REG2 {
412 regulator-name 413 regulator-name = "vcc_mipi";
413 regulator-alwa 414 regulator-always-on;
414 regulator-boot 415 regulator-boot-on;
415 regulator-stat 416 regulator-state-mem {
416 regula 417 regulator-off-in-suspend;
417 }; 418 };
418 }; 419 };
419 }; 420 };
420 }; 421 };
421 422
422 vdd_cpu_b: regulator@40 { 423 vdd_cpu_b: regulator@40 {
423 compatible = "silergy,syr827"; 424 compatible = "silergy,syr827";
424 reg = <0x40>; 425 reg = <0x40>;
425 fcs,suspend-voltage-selector = 426 fcs,suspend-voltage-selector = <1>;
426 pinctrl-names = "default"; 427 pinctrl-names = "default";
427 pinctrl-0 = <&vsel1_pin>; 428 pinctrl-0 = <&vsel1_pin>;
428 regulator-name = "vdd_cpu_b"; 429 regulator-name = "vdd_cpu_b";
429 regulator-min-microvolt = <712 430 regulator-min-microvolt = <712500>;
430 regulator-max-microvolt = <150 431 regulator-max-microvolt = <1500000>;
431 regulator-ramp-delay = <1000>; 432 regulator-ramp-delay = <1000>;
432 regulator-always-on; 433 regulator-always-on;
433 regulator-boot-on; 434 regulator-boot-on;
434 vin-supply = <&vcc5v0_sys>; 435 vin-supply = <&vcc5v0_sys>;
435 436
436 regulator-state-mem { 437 regulator-state-mem {
437 regulator-off-in-suspe 438 regulator-off-in-suspend;
438 }; 439 };
439 }; 440 };
440 441
441 vdd_gpu: regulator@41 { 442 vdd_gpu: regulator@41 {
442 compatible = "silergy,syr828"; 443 compatible = "silergy,syr828";
443 reg = <0x41>; 444 reg = <0x41>;
444 fcs,suspend-voltage-selector = 445 fcs,suspend-voltage-selector = <1>;
445 pinctrl-names = "default"; 446 pinctrl-names = "default";
446 pinctrl-0 = <&vsel2_pin>; 447 pinctrl-0 = <&vsel2_pin>;
447 regulator-name = "vdd_gpu"; 448 regulator-name = "vdd_gpu";
448 regulator-min-microvolt = <712 449 regulator-min-microvolt = <712500>;
449 regulator-max-microvolt = <150 450 regulator-max-microvolt = <1500000>;
450 regulator-ramp-delay = <1000>; 451 regulator-ramp-delay = <1000>;
451 regulator-always-on; 452 regulator-always-on;
452 regulator-boot-on; 453 regulator-boot-on;
453 vin-supply = <&vcc5v0_sys>; 454 vin-supply = <&vcc5v0_sys>;
454 455
455 regulator-state-mem { 456 regulator-state-mem {
456 regulator-off-in-suspe 457 regulator-off-in-suspend;
457 }; 458 };
458 }; 459 };
459 }; 460 };
460 461
461 &i2c1 { 462 &i2c1 {
462 i2c-scl-rising-time-ns = <300>; 463 i2c-scl-rising-time-ns = <300>;
463 i2c-scl-falling-time-ns = <15>; 464 i2c-scl-falling-time-ns = <15>;
464 status = "okay"; 465 status = "okay";
465 466
466 es8316: codec@11 { 467 es8316: codec@11 {
467 compatible = "everest,es8316"; 468 compatible = "everest,es8316";
468 reg = <0x11>; 469 reg = <0x11>;
469 clocks = <&cru SCLK_I2S_8CH_OU 470 clocks = <&cru SCLK_I2S_8CH_OUT>;
470 clock-names = "mclk"; 471 clock-names = "mclk";
471 #sound-dai-cells = <0>; 472 #sound-dai-cells = <0>;
472 473
473 port { 474 port {
474 es8316_p0_0: endpoint 475 es8316_p0_0: endpoint {
475 remote-endpoin 476 remote-endpoint = <&i2s0_p0_0>;
476 }; 477 };
477 }; 478 };
478 }; 479 };
479 }; 480 };
480 481
481 &i2c3 { 482 &i2c3 {
482 i2c-scl-rising-time-ns = <450>; 483 i2c-scl-rising-time-ns = <450>;
483 i2c-scl-falling-time-ns = <15>; 484 i2c-scl-falling-time-ns = <15>;
484 status = "okay"; 485 status = "okay";
485 }; 486 };
486 487
487 &i2c4 { 488 &i2c4 {
488 i2c-scl-rising-time-ns = <600>; 489 i2c-scl-rising-time-ns = <600>;
489 i2c-scl-falling-time-ns = <20>; 490 i2c-scl-falling-time-ns = <20>;
490 status = "okay"; 491 status = "okay";
491 }; 492 };
492 493
493 &i2s0 { 494 &i2s0 {
494 pinctrl-0 = <&i2s0_2ch_bus>; 495 pinctrl-0 = <&i2s0_2ch_bus>;
495 pinctrl-1 = <&i2s0_2ch_bus_bclk_off>; <<
496 rockchip,capture-channels = <2>; 496 rockchip,capture-channels = <2>;
497 rockchip,playback-channels = <2>; 497 rockchip,playback-channels = <2>;
498 status = "okay"; 498 status = "okay";
499 499
500 i2s0_p0: port { 500 i2s0_p0: port {
501 i2s0_p0_0: endpoint { 501 i2s0_p0_0: endpoint {
502 dai-format = "i2s"; 502 dai-format = "i2s";
503 mclk-fs = <256>; 503 mclk-fs = <256>;
504 remote-endpoint = <&es 504 remote-endpoint = <&es8316_p0_0>;
505 }; 505 };
506 }; 506 };
507 }; 507 };
508 508
509 &i2s1 { 509 &i2s1 {
510 rockchip,playback-channels = <2>; 510 rockchip,playback-channels = <2>;
511 rockchip,capture-channels = <2>; 511 rockchip,capture-channels = <2>;
512 }; 512 };
513 513
514 &i2s2 { 514 &i2s2 {
515 status = "okay"; 515 status = "okay";
516 }; 516 };
517 517
518 &io_domains { 518 &io_domains {
519 audio-supply = <&vcca1v8_codec>; 519 audio-supply = <&vcca1v8_codec>;
520 bt656-supply = <&vcc_3v0>; 520 bt656-supply = <&vcc_3v0>;
521 gpio1830-supply = <&vcc_3v0>; 521 gpio1830-supply = <&vcc_3v0>;
522 sdmmc-supply = <&vcc_sdio>; 522 sdmmc-supply = <&vcc_sdio>;
523 status = "okay"; 523 status = "okay";
524 }; 524 };
525 525
526 &pcie0 { 526 &pcie0 {
527 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_ 527 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
528 num-lanes = <4>; 528 num-lanes = <4>;
529 pinctrl-0 = <&pcie_clkreqnb_cpm>; 529 pinctrl-0 = <&pcie_clkreqnb_cpm>;
530 pinctrl-names = "default"; 530 pinctrl-names = "default";
531 vpcie0v9-supply = <&vcc_0v9>; 531 vpcie0v9-supply = <&vcc_0v9>;
532 vpcie1v8-supply = <&vcc_1v8>; 532 vpcie1v8-supply = <&vcc_1v8>;
533 vpcie3v3-supply = <&vcc3v3_pcie>; 533 vpcie3v3-supply = <&vcc3v3_pcie>;
534 status = "okay"; 534 status = "okay";
535 }; 535 };
536 536
537 &pcie_phy { 537 &pcie_phy {
538 status = "okay"; 538 status = "okay";
539 }; 539 };
540 540
541 &pinctrl { 541 &pinctrl {
542 bt { 542 bt {
543 bt_enable_h: bt-enable-h { 543 bt_enable_h: bt-enable-h {
544 rockchip,pins = <0 RK_ 544 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
545 }; 545 };
546 546
547 bt_host_wake_l: bt-host-wake-l 547 bt_host_wake_l: bt-host-wake-l {
548 rockchip,pins = <0 RK_ 548 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
549 }; 549 };
550 550
551 bt_wake_l: bt-wake-l { 551 bt_wake_l: bt-wake-l {
552 rockchip,pins = <2 RK_ 552 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
553 }; 553 };
554 }; 554 };
555 555
556 es8316 { 556 es8316 {
557 hp_detect: hp-detect { 557 hp_detect: hp-detect {
558 rockchip,pins = <1 RK_ 558 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
559 }; 559 };
560 560
561 hp_int: hp-int { 561 hp_int: hp-int {
562 rockchip,pins = <1 RK_ 562 rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
563 }; 563 };
564 }; 564 };
565 565
566 leds { 566 leds {
567 user_led2: user-led2 { 567 user_led2: user-led2 {
568 rockchip,pins = <3 RK_ 568 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
569 }; 569 };
570 }; 570 };
571 571
572 pcie { 572 pcie {
573 pcie_pwr_en: pcie-pwr-en { 573 pcie_pwr_en: pcie-pwr-en {
574 rockchip,pins = <2 RK_ 574 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
575 }; 575 };
576 }; 576 };
577 577
578 pmic { 578 pmic {
579 pmic_int_l: pmic-int-l { 579 pmic_int_l: pmic-int-l {
580 rockchip,pins = <1 RK_ 580 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
581 }; 581 };
582 582
583 vsel1_pin: vsel1-pin { 583 vsel1_pin: vsel1-pin {
584 rockchip,pins = <1 RK_ 584 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
585 }; 585 };
586 586
587 vsel2_pin: vsel2-pin { 587 vsel2_pin: vsel2-pin {
588 rockchip,pins = <1 RK_ 588 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
589 }; 589 };
590 }; 590 };
591 591
592 sdio0 { 592 sdio0 {
593 sdio0_bus4: sdio0-bus4 { 593 sdio0_bus4: sdio0-bus4 {
594 rockchip,pins = <2 RK_ 594 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
595 <2 RK_ 595 <2 RK_PC5 1 &pcfg_pull_up_20ma>,
596 <2 RK_ 596 <2 RK_PC6 1 &pcfg_pull_up_20ma>,
597 <2 RK_ 597 <2 RK_PC7 1 &pcfg_pull_up_20ma>;
598 }; 598 };
599 599
600 sdio0_cmd: sdio0-cmd { 600 sdio0_cmd: sdio0-cmd {
601 rockchip,pins = <2 RK_ 601 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
602 }; 602 };
603 603
604 sdio0_clk: sdio0-clk { 604 sdio0_clk: sdio0-clk {
605 rockchip,pins = <2 RK_ 605 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
606 }; 606 };
607 }; 607 };
608 608
609 usb-typec { 609 usb-typec {
610 vcc5v0_typec_en: vcc5v0-typec- 610 vcc5v0_typec_en: vcc5v0-typec-en {
611 rockchip,pins = <1 RK_ 611 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
612 }; 612 };
613 }; 613 };
614 614
615 usb2 { 615 usb2 {
616 vcc5v0_host_en: vcc5v0-host-en 616 vcc5v0_host_en: vcc5v0-host-en {
617 rockchip,pins = <4 RK_ 617 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
618 }; 618 };
619 }; 619 };
620 620
621 wifi { 621 wifi {
622 wifi_enable_h: wifi-enable-h { 622 wifi_enable_h: wifi-enable-h {
623 rockchip,pins = <0 RK_ 623 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
624 }; 624 };
625 625
626 wifi_host_wake_l: wifi-host-wa 626 wifi_host_wake_l: wifi-host-wake-l {
627 rockchip,pins = <0 RK_ 627 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
628 }; 628 };
629 }; 629 };
630 }; 630 };
631 631
632 &pmu_io_domains { 632 &pmu_io_domains {
633 pmu1830-supply = <&vcc_3v0>; 633 pmu1830-supply = <&vcc_3v0>;
634 status = "okay"; 634 status = "okay";
635 }; 635 };
636 636
637 &pwm2 { 637 &pwm2 {
638 status = "okay"; 638 status = "okay";
639 }; 639 };
640 640
641 &saradc { 641 &saradc {
642 status = "okay"; 642 status = "okay";
643 643
644 vref-supply = <&vcc_1v8>; 644 vref-supply = <&vcc_1v8>;
645 }; 645 };
646 646
647 &sdhci { 647 &sdhci {
648 max-frequency = <150000000>; 648 max-frequency = <150000000>;
649 bus-width = <8>; 649 bus-width = <8>;
650 mmc-hs400-1_8v; !! 650 mmc-hs200-1_8v;
651 mmc-hs400-enhanced-strobe; <<
652 non-removable; 651 non-removable;
653 status = "okay"; 652 status = "okay";
654 }; 653 };
655 654
656 &sdio0 { 655 &sdio0 {
657 #address-cells = <1>; 656 #address-cells = <1>;
658 #size-cells = <0>; 657 #size-cells = <0>;
659 bus-width = <4>; 658 bus-width = <4>;
660 clock-frequency = <50000000>; 659 clock-frequency = <50000000>;
661 cap-sdio-irq; 660 cap-sdio-irq;
662 cap-sd-highspeed; 661 cap-sd-highspeed;
663 keep-power-in-suspend; 662 keep-power-in-suspend;
664 mmc-pwrseq = <&sdio_pwrseq>; 663 mmc-pwrseq = <&sdio_pwrseq>;
665 non-removable; 664 non-removable;
666 pinctrl-names = "default"; 665 pinctrl-names = "default";
667 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s 666 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
668 sd-uhs-sdr104; 667 sd-uhs-sdr104;
669 }; 668 };
670 669
671 &sdmmc { 670 &sdmmc {
672 bus-width = <4>; 671 bus-width = <4>;
673 cap-mmc-highspeed; 672 cap-mmc-highspeed;
674 cap-sd-highspeed; 673 cap-sd-highspeed;
675 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_ 674 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
676 disable-wp; 675 disable-wp;
677 max-frequency = <150000000>; 676 max-frequency = <150000000>;
678 pinctrl-names = "default"; 677 pinctrl-names = "default";
679 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdm 678 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
680 status = "okay"; 679 status = "okay";
681 }; 680 };
682 681
683 &spdif { 682 &spdif {
684 683
685 spdif_p0: port { 684 spdif_p0: port {
686 spdif_p0_0: endpoint { 685 spdif_p0_0: endpoint {
687 remote-endpoint = <&di 686 remote-endpoint = <&dit_p0_0>;
688 }; 687 };
689 }; 688 };
690 }; 689 };
691 690
692 &tcphy0 { 691 &tcphy0 {
693 status = "okay"; 692 status = "okay";
694 }; 693 };
695 694
696 &tcphy1 { 695 &tcphy1 {
697 status = "okay"; 696 status = "okay";
698 }; 697 };
699 698
700 &tsadc { 699 &tsadc {
701 status = "okay"; 700 status = "okay";
702 701
703 /* tshut mode 0:CRU 1:GPIO */ 702 /* tshut mode 0:CRU 1:GPIO */
704 rockchip,hw-tshut-mode = <1>; 703 rockchip,hw-tshut-mode = <1>;
705 /* tshut polarity 0:LOW 1:HIGH */ 704 /* tshut polarity 0:LOW 1:HIGH */
706 rockchip,hw-tshut-polarity = <1>; 705 rockchip,hw-tshut-polarity = <1>;
707 }; 706 };
708 707
709 &u2phy0 { 708 &u2phy0 {
710 status = "okay"; 709 status = "okay";
711 710
712 u2phy0_otg: otg-port { 711 u2phy0_otg: otg-port {
713 status = "okay"; 712 status = "okay";
714 }; 713 };
715 714
716 u2phy0_host: host-port { 715 u2phy0_host: host-port {
717 phy-supply = <&vcc5v0_host>; 716 phy-supply = <&vcc5v0_host>;
718 status = "okay"; 717 status = "okay";
719 }; 718 };
720 }; 719 };
721 720
722 &u2phy1 { 721 &u2phy1 {
723 status = "okay"; 722 status = "okay";
724 723
725 u2phy1_otg: otg-port { 724 u2phy1_otg: otg-port {
726 status = "okay"; 725 status = "okay";
727 }; 726 };
728 727
729 u2phy1_host: host-port { 728 u2phy1_host: host-port {
730 phy-supply = <&vcc5v0_host>; 729 phy-supply = <&vcc5v0_host>;
731 status = "okay"; 730 status = "okay";
732 }; 731 };
733 }; 732 };
734 733
735 &uart0 { 734 &uart0 {
736 pinctrl-names = "default"; 735 pinctrl-names = "default";
737 pinctrl-0 = <&uart0_xfer &uart0_cts &u 736 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
738 }; 737 };
739 738
740 &uart2 { 739 &uart2 {
741 status = "okay"; 740 status = "okay";
742 }; 741 };
743 742
744 &usb_host0_ehci { 743 &usb_host0_ehci {
745 status = "okay"; 744 status = "okay";
746 }; 745 };
747 746
748 &usb_host0_ohci { 747 &usb_host0_ohci {
749 status = "okay"; 748 status = "okay";
750 }; 749 };
751 750
752 &usb_host1_ehci { 751 &usb_host1_ehci {
753 status = "okay"; 752 status = "okay";
754 }; 753 };
755 754
756 &usb_host1_ohci { 755 &usb_host1_ohci {
757 status = "okay"; 756 status = "okay";
758 }; 757 };
759 758
760 &usbdrd3_0 { 759 &usbdrd3_0 {
761 status = "okay"; 760 status = "okay";
762 }; 761 };
763 762
764 &usbdrd3_1 { 763 &usbdrd3_1 {
765 status = "okay"; 764 status = "okay";
766 }; 765 };
767 766
768 &usbdrd_dwc3_0 { 767 &usbdrd_dwc3_0 {
769 status = "okay"; 768 status = "okay";
770 dr_mode = "host"; 769 dr_mode = "host";
771 }; 770 };
772 771
773 &usbdrd_dwc3_1 { 772 &usbdrd_dwc3_1 {
774 status = "okay"; 773 status = "okay";
775 dr_mode = "host"; 774 dr_mode = "host";
776 }; 775 };
777 776
778 &vopb { 777 &vopb {
779 status = "okay"; 778 status = "okay";
780 }; 779 };
781 780
782 &vopb_mmu { 781 &vopb_mmu {
783 status = "okay"; 782 status = "okay";
784 }; 783 };
785 784
786 &vopl { 785 &vopl {
787 status = "okay"; 786 status = "okay";
788 }; 787 };
789 788
790 &vopl_mmu { 789 &vopl_mmu {
791 status = "okay"; 790 status = "okay";
792 }; 791 };
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