1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2017 Fuzhou Rockchip Electron
4 * Copyright (c) 2018 Akash Gajjar <Akash_Gajja
5 */
6
7 #include <dt-bindings/input/linux-event-codes.
8 #include <dt-bindings/pwm/pwm.h>
9 #include "rk3399.dtsi"
10
11 / {
12 aliases {
13 ethernet0 = &gmac;
14 mmc0 = &sdio0;
15 mmc1 = &sdmmc;
16 mmc2 = &sdhci;
17 };
18
19 chosen {
20 stdout-path = "serial2:1500000
21 };
22
23 /* enable for panel backlight support
24 backlight: backlight {
25 compatible = "pwm-backlight";
26 brightness-levels = <0 4 8 16
27 default-brightness-level = <5>
28 pwms = <&pwm0 0 1000000 0>;
29 status = "disabled";
30 };
31
32 clkin_gmac: external-gmac-clock {
33 compatible = "fixed-clock";
34 clock-frequency = <125000000>;
35 clock-output-names = "clkin_gm
36 #clock-cells = <0>;
37 };
38
39 gpio-keys {
40 compatible = "gpio-keys";
41 autorepeat;
42 pinctrl-names = "default";
43 pinctrl-0 = <&pwrbtn>;
44
45 key-power {
46 debounce-interval = <1
47 gpios = <&gpio0 RK_PA5
48 label = "GPIO Key Powe
49 linux,code = <KEY_POWE
50 wakeup-source;
51 };
52 };
53
54 ir-receiver {
55 compatible = "gpio-ir-receiver
56 gpios = <&gpio0 RK_PA6 GPIO_AC
57 pinctrl-0 = <&ir_int>;
58 pinctrl-names = "default";
59 };
60
61 leds {
62 compatible = "gpio-leds";
63 pinctrl-names = "default";
64 pinctrl-0 = <&work_led_pin>, <
65
66 work_led: led-0 {
67 label = "work";
68 default-state = "on";
69 gpios = <&gpio0 RK_PB3
70 };
71
72 diy_led: led-1 {
73 label = "diy";
74 default-state = "off";
75 gpios = <&gpio0 RK_PA2
76 };
77 };
78
79 fan: pwm-fan {
80 compatible = "pwm-fan";
81 cooling-levels = <0 100 150 20
82 #cooling-cells = <2>;
83 fan-supply = <&vcc12v_dcin>;
84 pwms = <&pwm1 0 50000 0>;
85 };
86
87 sdio_pwrseq: sdio-pwrseq {
88 compatible = "mmc-pwrseq-simpl
89 clocks = <&rk808 1>;
90 clock-names = "ext_clock";
91 pinctrl-names = "default";
92 pinctrl-0 = <&wifi_enable_h>;
93 reset-gpios = <&gpio0 RK_PB2 G
94 };
95
96 sound {
97 compatible = "audio-graph-card
98 label = "Analog";
99 dais = <&i2s1_p0>;
100 };
101
102 sound-dit {
103 compatible = "audio-graph-card
104 label = "SPDIF";
105 dais = <&spdif_p0>;
106 };
107
108 spdif-dit {
109 compatible = "linux,spdif-dit"
110 #sound-dai-cells = <0>;
111
112 port {
113 dit_p0_0: endpoint {
114 remote-endpoin
115 };
116 };
117 };
118
119 avdd: avdd-regulator {
120 compatible = "regulator-fixed"
121 regulator-name = "avdd";
122 regulator-min-microvolt = <110
123 regulator-max-microvolt = <110
124 vin-supply = <&vcc3v3_s0>;
125 };
126
127 vcc12v_dcin: vcc12v-dcin {
128 compatible = "regulator-fixed"
129 regulator-name = "vcc12v_dcin"
130 regulator-always-on;
131 regulator-boot-on;
132 regulator-min-microvolt = <120
133 regulator-max-microvolt = <120
134 };
135
136 /* switched by pmic_sleep */
137 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
138 compatible = "regulator-fixed"
139 regulator-name = "vcc1v8_s3";
140 regulator-always-on;
141 regulator-boot-on;
142 regulator-min-microvolt = <180
143 regulator-max-microvolt = <180
144 vin-supply = <&vcc_1v8>;
145 };
146
147 /* micro SD card power */
148 vcc3v0_sd: vcc3v0-sd {
149 compatible = "regulator-fixed"
150 enable-active-high;
151 gpio = <&gpio0 RK_PA1 GPIO_ACT
152 pinctrl-names = "default";
153 pinctrl-0 = <&sdmmc0_pwr_h>;
154 regulator-name = "vcc3v0_sd";
155 regulator-always-on;
156 regulator-min-microvolt = <300
157 regulator-max-microvolt = <300
158 vin-supply = <&vcc3v3_sys>;
159
160 regulator-state-mem {
161 regulator-off-in-suspe
162 };
163 };
164
165 vcc3v3_pcie: vcc3v3-pcie-regulator {
166 compatible = "regulator-fixed"
167 enable-active-high;
168 gpio = <&gpio1 RK_PD0 GPIO_ACT
169 pinctrl-names = "default";
170 pinctrl-0 = <&pcie_pwr_en>;
171 regulator-name = "vcc3v3_pcie"
172 regulator-always-on;
173 regulator-boot-on;
174 vin-supply = <&vcc12v_dcin>;
175 };
176
177 vcc3v3_sys: vcc3v3-sys {
178 compatible = "regulator-fixed"
179 regulator-name = "vcc3v3_sys";
180 regulator-always-on;
181 regulator-boot-on;
182 regulator-min-microvolt = <330
183 regulator-max-microvolt = <330
184 vin-supply = <&vcc5v0_sys>;
185 };
186
187 /* Actually 3 regulators (host0, 1, 2)
188 vcc5v0_host: vcc5v0-host-regulator {
189 compatible = "regulator-fixed"
190 enable-active-high;
191 gpio = <&gpio4 RK_PD2 GPIO_ACT
192 pinctrl-names = "default";
193 pinctrl-0 = <&vcc5v0_host_en>;
194 regulator-name = "vcc5v0_host"
195 regulator-always-on;
196 vin-supply = <&vcc5v0_usb>;
197 };
198
199 vcc5v0_typec: vcc5v0-typec-regulator {
200 compatible = "regulator-fixed"
201 enable-active-high;
202 gpio = <&gpio1 RK_PA3 GPIO_ACT
203 pinctrl-names = "default";
204 pinctrl-0 = <&vcc5v0_typec_en>
205 regulator-name = "vcc5v0_typec
206 regulator-always-on;
207 vin-supply = <&vcc5v0_usb>;
208 };
209
210 vcc5v0_sys: vcc5v0-sys {
211 compatible = "regulator-fixed"
212 regulator-name = "vcc5v0_sys";
213 regulator-always-on;
214 regulator-boot-on;
215 regulator-min-microvolt = <500
216 regulator-max-microvolt = <500
217 vin-supply = <&vcc12v_dcin>;
218 };
219
220 vcc5v0_usb: vcc5v0-usb {
221 compatible = "regulator-fixed"
222 regulator-name = "vcc5v0_usb";
223 regulator-always-on;
224 regulator-boot-on;
225 regulator-min-microvolt = <500
226 regulator-max-microvolt = <500
227 vin-supply = <&vcc12v_dcin>;
228 };
229
230 vdd_log: vdd-log {
231 compatible = "pwm-regulator";
232 pwms = <&pwm2 0 25000 1>;
233 pwm-supply = <&vcc5v0_sys>;
234 regulator-name = "vdd_log";
235 regulator-always-on;
236 regulator-boot-on;
237 regulator-min-microvolt = <800
238 regulator-max-microvolt = <170
239 };
240 };
241
242 &cpu_l0 {
243 cpu-supply = <&vdd_cpu_l>;
244 };
245
246 &cpu_l1 {
247 cpu-supply = <&vdd_cpu_l>;
248 };
249
250 &cpu_l2 {
251 cpu-supply = <&vdd_cpu_l>;
252 };
253
254 &cpu_l3 {
255 cpu-supply = <&vdd_cpu_l>;
256 };
257
258 &cpu_b0 {
259 cpu-supply = <&vdd_cpu_b>;
260 };
261
262 &cpu_b1 {
263 cpu-supply = <&vdd_cpu_b>;
264 };
265
266 &cpu_thermal {
267 trips {
268 cpu_warm: cpu_warm {
269 temperature = <55000>;
270 hysteresis = <2000>;
271 type = "active";
272 };
273
274 cpu_hot: cpu_hot {
275 temperature = <65000>;
276 hysteresis = <2000>;
277 type = "active";
278 };
279 };
280
281 cooling-maps {
282 map2 {
283 trip = <&cpu_warm>;
284 cooling-device = <&fan
285 };
286
287 map3 {
288 trip = <&cpu_hot>;
289 cooling-device = <&fan
290 };
291 };
292 };
293
294 &emmc_phy {
295 status = "okay";
296 };
297
298 &gmac {
299 assigned-clocks = <&cru SCLK_RMII_SRC>
300 assigned-clock-parents = <&clkin_gmac>
301 clock_in_out = "input";
302 phy-supply = <&vcc_lan>;
303 phy-mode = "rgmii";
304 pinctrl-names = "default";
305 pinctrl-0 = <&rgmii_pins>;
306 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_
307 snps,reset-active-low;
308 snps,reset-delays-us = <0 10000 50000>
309 tx_delay = <0x28>;
310 rx_delay = <0x11>;
311 status = "okay";
312 };
313
314 &hdmi {
315 ddc-i2c-bus = <&i2c3>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&hdmi_cec>;
318 status = "okay";
319 };
320
321 &hdmi_sound {
322 status = "okay";
323 };
324
325 &gpu {
326 mali-supply = <&vdd_gpu>;
327 status = "okay";
328 };
329
330 &i2c0 {
331 clock-frequency = <400000>;
332 i2c-scl-rising-time-ns = <168>;
333 i2c-scl-falling-time-ns = <4>;
334 status = "okay";
335
336 rk808: pmic@1b {
337 compatible = "rockchip,rk808";
338 reg = <0x1b>;
339 interrupt-parent = <&gpio3>;
340 interrupts = <10 IRQ_TYPE_LEVE
341 #clock-cells = <1>;
342 clock-output-names = "xin32k",
343 pinctrl-names = "default";
344 pinctrl-0 = <&pmic_int_l>;
345 rockchip,system-power-controll
346 wakeup-source;
347
348 vcc1-supply = <&vcc5v0_sys>;
349 vcc2-supply = <&vcc5v0_sys>;
350 vcc3-supply = <&vcc5v0_sys>;
351 vcc4-supply = <&vcc5v0_sys>;
352 vcc6-supply = <&vcc5v0_sys>;
353 vcc7-supply = <&vcc5v0_sys>;
354 vcc8-supply = <&vcc3v3_sys>;
355 vcc9-supply = <&vcc5v0_sys>;
356 vcc10-supply = <&vcc5v0_sys>;
357 vcc11-supply = <&vcc5v0_sys>;
358 vcc12-supply = <&vcc3v3_sys>;
359 vddio-supply = <&vcca_1v8>;
360
361 regulators {
362 vdd_center: DCDC_REG1
363 regulator-name
364 regulator-alwa
365 regulator-boot
366 regulator-min-
367 regulator-max-
368 regulator-ramp
369 regulator-stat
370 regula
371 };
372 };
373
374 vdd_cpu_l: DCDC_REG2 {
375 regulator-name
376 regulator-alwa
377 regulator-boot
378 regulator-min-
379 regulator-max-
380 regulator-ramp
381 regulator-stat
382 regula
383 };
384 };
385
386 vcc_ddr: DCDC_REG3 {
387 regulator-name
388 regulator-alwa
389 regulator-boot
390 regulator-stat
391 regula
392 };
393 };
394
395 vcc_1v8: DCDC_REG4 {
396 regulator-name
397 regulator-alwa
398 regulator-boot
399 regulator-min-
400 regulator-max-
401 regulator-stat
402 regula
403 regula
404 };
405 };
406
407 vcc1v8_dvp: LDO_REG1 {
408 regulator-name
409 regulator-alwa
410 regulator-boot
411 regulator-min-
412 regulator-max-
413 regulator-stat
414 regula
415 };
416 };
417
418 vcc3v0_touch: LDO_REG2
419 regulator-name
420 regulator-min-
421 regulator-max-
422 regulator-stat
423 regula
424 };
425 };
426
427 vcca_1v8: LDO_REG3 {
428 regulator-name
429 regulator-alwa
430 regulator-boot
431 regulator-min-
432 regulator-max-
433 regulator-stat
434 regula
435 regula
436 };
437 };
438
439 vcc_sdio: LDO_REG4 {
440 regulator-name
441 regulator-alwa
442 regulator-boot
443 regulator-min-
444 regulator-max-
445 regulator-stat
446 regula
447 regula
448 };
449 };
450
451 vcca3v0_codec: LDO_REG
452 regulator-name
453 regulator-alwa
454 regulator-boot
455 regulator-min-
456 regulator-max-
457 regulator-stat
458 regula
459 };
460 };
461
462 vcc_1v5: LDO_REG6 {
463 regulator-name
464 regulator-alwa
465 regulator-boot
466 regulator-min-
467 regulator-max-
468 regulator-stat
469 regula
470 regula
471 };
472 };
473
474 vcca1v8_codec: LDO_REG
475 regulator-name
476 regulator-alwa
477 regulator-boot
478 regulator-min-
479 regulator-max-
480 regulator-stat
481 regula
482 };
483 };
484
485 vcc_3v0: LDO_REG8 {
486 regulator-name
487 regulator-alwa
488 regulator-boot
489 regulator-min-
490 regulator-max-
491 regulator-stat
492 regula
493 regula
494 };
495 };
496
497 vcc3v3_s3: vcc_lan: SW
498 regulator-name
499 regulator-alwa
500 regulator-boot
501 regulator-stat
502 regula
503 };
504 };
505
506 vcc3v3_s0: SWITCH_REG2
507 regulator-name
508 regulator-stat
509 regula
510 };
511 };
512 };
513 };
514
515 vdd_cpu_b: regulator@40 {
516 compatible = "silergy,syr827";
517 reg = <0x40>;
518 fcs,suspend-voltage-selector =
519 pinctrl-names = "default";
520 pinctrl-0 = <&vsel1_pin>;
521 regulator-name = "vdd_cpu_b";
522 regulator-min-microvolt = <712
523 regulator-max-microvolt = <150
524 regulator-ramp-delay = <1000>;
525 regulator-always-on;
526 regulator-boot-on;
527 vin-supply = <&vcc5v0_sys>;
528
529 regulator-state-mem {
530 regulator-off-in-suspe
531 };
532 };
533
534 vdd_gpu: regulator@41 {
535 compatible = "silergy,syr828";
536 reg = <0x41>;
537 fcs,suspend-voltage-selector =
538 pinctrl-names = "default";
539 pinctrl-0 = <&vsel2_pin>;
540 regulator-name = "vdd_gpu";
541 regulator-min-microvolt = <712
542 regulator-max-microvolt = <150
543 regulator-ramp-delay = <1000>;
544 regulator-always-on;
545 regulator-boot-on;
546 vin-supply = <&vcc5v0_sys>;
547
548 regulator-state-mem {
549 regulator-off-in-suspe
550 };
551 };
552 };
553
554 &i2c1 {
555 i2c-scl-rising-time-ns = <300>;
556 i2c-scl-falling-time-ns = <15>;
557 status = "okay";
558 };
559
560 &i2c3 {
561 i2c-scl-rising-time-ns = <450>;
562 i2c-scl-falling-time-ns = <15>;
563 status = "okay";
564 };
565
566 &i2c4 {
567 i2c-scl-rising-time-ns = <600>;
568 i2c-scl-falling-time-ns = <20>;
569 status = "okay";
570
571 fusb0: typec-portc@22 {
572 compatible = "fcs,fusb302";
573 reg = <0x22>;
574 interrupt-parent = <&gpio1>;
575 interrupts = <RK_PA2 IRQ_TYPE_
576 pinctrl-names = "default";
577 pinctrl-0 = <&fusb0_int>;
578 vbus-supply = <&vcc5v0_typec>;
579 status = "okay";
580 };
581
582 /* enable for pine64 touch screen supp
583 touch: touchscreen@5d {
584 compatible = "goodix,gt911";
585 reg = <0x5d>;
586 interrupt-parent = <&gpio4>;
587 interrupts = <RK_PD5 IRQ_TYPE_
588 AVDD28-supply = <&vcc3v0_touch
589 VDDIO-supply = <&vcc3v0_touch>
590 irq-gpios = <&gpio4 RK_PD5 GPI
591 reset-gpios = <&gpio4 RK_PD6 G
592 status = "disabled";
593 };
594 };
595
596 &i2s0 {
597 rockchip,playback-channels = <8>;
598 rockchip,capture-channels = <8>;
599 status = "okay";
600 };
601
602 &i2s1 {
603 rockchip,playback-channels = <2>;
604 rockchip,capture-channels = <2>;
605 status = "okay";
606
607 i2s1_p0: port {
608 i2s1_p0_0: endpoint {
609 dai-format = "i2s";
610 mclk-fs = <256>;
611 remote-endpoint = <&es
612 };
613 };
614 };
615
616 &i2s2 {
617 status = "okay";
618 };
619
620 &io_domains {
621 status = "okay";
622
623 bt656-supply = <&vcc1v8_dvp>;
624 audio-supply = <&vcc_3v0>;
625 sdmmc-supply = <&vcc_sdio>;
626 gpio1830-supply = <&vcc_3v0>;
627 };
628
629 /* enable for pine64 panel display support */
630 &mipi_dsi {
631 clock-master;
632 status = "disabled";
633
634 ports {
635 mipi_out: port@1 {
636 reg = <1>;
637
638 mipi_out_panel: endpoi
639 remote-endpoin
640 };
641 };
642 };
643
644 mipi_panel: panel@0 {
645 compatible = "feiyang,fy07024d
646 reg = <0>;
647 avdd-supply = <&avdd>;
648 backlight = <&backlight>;
649 dvdd-supply = <&vcc3v3_s0>;
650
651 port {
652 mipi_in_panel: endpoin
653 remote-endpoin
654 };
655 };
656 };
657 };
658
659 &pcie0 {
660 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_
661 num-lanes = <4>;
662 pinctrl-names = "default";
663 pinctrl-0 = <&pcie_perst>;
664 vpcie12v-supply = <&vcc12v_dcin>;
665 vpcie3v3-supply = <&vcc3v3_pcie>;
666 status = "okay";
667 };
668
669 &pcie_phy {
670 status = "okay";
671 };
672
673 &pmu_io_domains {
674 pmu1830-supply = <&vcc_3v0>;
675 status = "okay";
676 };
677
678 &pinctrl {
679 bt {
680 bt_enable_h: bt-enable-h {
681 rockchip,pins = <0 RK_
682 };
683
684 bt_host_wake_l: bt-host-wake-l
685 rockchip,pins = <0 RK_
686 };
687
688 bt_wake_l: bt-wake-l {
689 rockchip,pins = <2 RK_
690 };
691 };
692
693 buttons {
694 pwrbtn: pwrbtn {
695 rockchip,pins = <0 RK_
696 };
697 };
698
699 fusb302x {
700 fusb0_int: fusb0-int {
701 rockchip,pins = <1 RK_
702 };
703 };
704
705 ir {
706 ir_int: ir-int {
707 rockchip,pins = <0 RK_
708 };
709 };
710
711 leds {
712 work_led_pin: work-led-pin {
713 rockchip,pins = <0 RK_
714 };
715
716 diy_led_pin: diy-led-pin {
717 rockchip,pins = <0 RK_
718 };
719 };
720
721 pcie {
722 pcie_perst: pcie-perst {
723 rockchip,pins = <2 RK_
724 };
725
726 pcie_pwr_en: pcie-pwr-en {
727 rockchip,pins = <1 RK_
728 };
729 };
730
731 pmic {
732 pmic_int_l: pmic-int-l {
733 rockchip,pins = <3 RK_
734 };
735
736 vsel1_pin: vsel1-pin {
737 rockchip,pins = <1 RK_
738 };
739
740 vsel2_pin: vsel2-pin {
741 rockchip,pins = <1 RK_
742 };
743 };
744
745 sdcard {
746 sdmmc0_pwr_h: sdmmc0-pwr-h {
747 rockchip,pins = <0 RK_
748 };
749
750 };
751
752 sdio-pwrseq {
753 wifi_enable_h: wifi-enable-h {
754 rockchip,pins = <0 RK_
755 };
756 };
757
758 usb-typec {
759 vcc5v0_typec_en: vcc5v0_typec_
760 rockchip,pins = <1 RK_
761 };
762 };
763
764 usb2 {
765 vcc5v0_host_en: vcc5v0-host-en
766 rockchip,pins = <4 RK_
767 };
768 };
769 };
770
771 &pwm0 {
772 status = "okay";
773 };
774
775 &pwm1 {
776 status = "okay";
777 };
778
779 &pwm2 {
780 status = "okay";
781 };
782
783 &saradc {
784 vref-supply = <&vcca1v8_s3>;
785 status = "okay";
786 };
787
788 &sdio0 {
789 bus-width = <4>;
790 cap-sd-highspeed;
791 cap-sdio-irq;
792 disable-wp;
793 keep-power-in-suspend;
794 mmc-pwrseq = <&sdio_pwrseq>;
795 non-removable;
796 pinctrl-names = "default";
797 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &s
798 sd-uhs-sdr104;
799 status = "okay";
800 };
801
802 &sdmmc {
803 bus-width = <4>;
804 cap-sd-highspeed;
805 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
806 disable-wp;
807 max-frequency = <150000000>;
808 pinctrl-names = "default";
809 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sd
810 vmmc-supply = <&vcc3v0_sd>;
811 vqmmc-supply = <&vcc_sdio>;
812 status = "okay";
813 };
814
815 &sdhci {
816 bus-width = <8>;
817 mmc-hs200-1_8v;
818 non-removable;
819 status = "okay";
820 };
821
822 &spdif {
823 pinctrl-0 = <&spdif_bus_1>;
824
825 spdif_p0: port {
826 spdif_p0_0: endpoint {
827 remote-endpoint = <&di
828 };
829 };
830 };
831
832 &spi1 {
833 status = "okay";
834
835 flash@0 {
836 compatible = "jedec,spi-nor";
837 reg = <0>;
838 spi-max-frequency = <10000000>
839 };
840 };
841
842 &tcphy0 {
843 status = "okay";
844 };
845
846 &tcphy1 {
847 status = "okay";
848 };
849
850 &tsadc {
851 /* tshut mode 0:CRU 1:GPIO */
852 rockchip,hw-tshut-mode = <1>;
853 /* tshut polarity 0:LOW 1:HIGH */
854 rockchip,hw-tshut-polarity = <1>;
855 status = "okay";
856 };
857
858 &u2phy0 {
859 status = "okay";
860
861 u2phy0_otg: otg-port {
862 status = "okay";
863 };
864
865 u2phy0_host: host-port {
866 phy-supply = <&vcc5v0_host>;
867 status = "okay";
868 };
869 };
870
871 &u2phy1 {
872 status = "okay";
873
874 u2phy1_otg: otg-port {
875 status = "okay";
876 };
877
878 u2phy1_host: host-port {
879 phy-supply = <&vcc5v0_host>;
880 status = "okay";
881 };
882 };
883
884 &uart0 {
885 pinctrl-names = "default";
886 pinctrl-0 = <&uart0_xfer &uart0_cts &u
887 status = "okay";
888
889 bluetooth {
890 compatible = "brcm,bcm43438-bt
891 clocks = <&rk808 1>;
892 clock-names = "lpo";
893 device-wakeup-gpios = <&gpio2
894 host-wakeup-gpios = <&gpio0 RK
895 shutdown-gpios = <&gpio0 RK_PB
896 pinctrl-names = "default";
897 pinctrl-0 = <&bt_host_wake_l &
898 vbat-supply = <&vcc3v3_sys>;
899 vddio-supply = <&vcc_1v8>;
900 };
901 };
902
903 &uart2 {
904 status = "okay";
905 };
906
907 &usb_host0_ehci {
908 status = "okay";
909 };
910
911 &usb_host0_ohci {
912 status = "okay";
913 };
914
915 &usb_host1_ehci {
916 status = "okay";
917 };
918
919 &usb_host1_ohci {
920 status = "okay";
921 };
922
923 &usbdrd3_0 {
924 status = "okay";
925 };
926
927 &usbdrd_dwc3_0 {
928 status = "okay";
929 dr_mode = "host";
930 };
931
932 &usbdrd3_1 {
933 status = "okay";
934 };
935
936 &usbdrd_dwc3_1 {
937 status = "okay";
938 dr_mode = "host";
939 };
940
941 &vopb {
942 status = "okay";
943 };
944
945 &vopb_mmu {
946 status = "okay";
947 };
948
949 &vopl {
950 status = "okay";
951 };
952
953 &vopl_mmu {
954 status = "okay";
955 };
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