1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 2
3 /* 3 /*
4 * Copyright (c) 2021 Rockchip Electronics Co. 4 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
5 * Copyright (c) 2022 EmbedFire <embedfire@embe 5 * Copyright (c) 2022 EmbedFire <embedfire@embedfire.com>
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,vop2.h> 12 #include <dt-bindings/soc/rockchip,vop2.h>
13 #include "rk3568.dtsi" 13 #include "rk3568.dtsi"
14 14
15 / { 15 / {
16 model = "EmbedFire LubanCat 2"; 16 model = "EmbedFire LubanCat 2";
17 compatible = "embedfire,lubancat-2", " 17 compatible = "embedfire,lubancat-2", "rockchip,rk3568";
18 18
19 aliases { 19 aliases {
20 ethernet0 = &gmac0; 20 ethernet0 = &gmac0;
21 ethernet1 = &gmac1; 21 ethernet1 = &gmac1;
22 mmc0 = &sdmmc0; 22 mmc0 = &sdmmc0;
23 mmc1 = &sdhci; 23 mmc1 = &sdhci;
24 }; 24 };
25 25
26 chosen: chosen { 26 chosen: chosen {
27 stdout-path = "serial2:1500000 27 stdout-path = "serial2:1500000n8";
28 }; 28 };
29 29
30 leds { 30 leds {
31 compatible = "gpio-leds"; 31 compatible = "gpio-leds";
32 32
33 user_led: user-led { 33 user_led: user-led {
34 label = "user_led"; 34 label = "user_led";
35 linux,default-trigger 35 linux,default-trigger = "heartbeat";
36 default-state = "on"; 36 default-state = "on";
37 gpios = <&gpio0 RK_PC7 37 gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
38 pinctrl-names = "defau 38 pinctrl-names = "default";
39 pinctrl-0 = <&user_led 39 pinctrl-0 = <&user_led_pin>;
40 }; 40 };
41 }; 41 };
42 42
43 hdmi-con { 43 hdmi-con {
44 compatible = "hdmi-connector"; 44 compatible = "hdmi-connector";
45 type = "a"; 45 type = "a";
46 46
47 port { 47 port {
48 hdmi_con_in: endpoint 48 hdmi_con_in: endpoint {
49 remote-endpoin 49 remote-endpoint = <&hdmi_out_con>;
50 }; 50 };
51 }; 51 };
52 }; 52 };
53 53
54 dc_5v: dc-5v-regulator { 54 dc_5v: dc-5v-regulator {
55 compatible = "regulator-fixed" 55 compatible = "regulator-fixed";
56 regulator-name = "dc_5v"; 56 regulator-name = "dc_5v";
57 regulator-always-on; 57 regulator-always-on;
58 regulator-boot-on; 58 regulator-boot-on;
59 regulator-min-microvolt = <500 59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <500 60 regulator-max-microvolt = <5000000>;
61 }; 61 };
62 62
63 vcc3v3_sys: vcc3v3-sys-regulator { 63 vcc3v3_sys: vcc3v3-sys-regulator {
64 compatible = "regulator-fixed" 64 compatible = "regulator-fixed";
65 regulator-name = "vcc3v3_sys"; 65 regulator-name = "vcc3v3_sys";
66 regulator-always-on; 66 regulator-always-on;
67 regulator-boot-on; 67 regulator-boot-on;
68 regulator-min-microvolt = <330 68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <330 69 regulator-max-microvolt = <3300000>;
70 vin-supply = <&vcc5v0_sys>; 70 vin-supply = <&vcc5v0_sys>;
71 }; 71 };
72 72
73 vcc5v0_sys: vcc5v0-sys-regulator { 73 vcc5v0_sys: vcc5v0-sys-regulator {
74 compatible = "regulator-fixed" 74 compatible = "regulator-fixed";
75 regulator-name = "vcc5v0_sys"; 75 regulator-name = "vcc5v0_sys";
76 regulator-always-on; 76 regulator-always-on;
77 regulator-boot-on; 77 regulator-boot-on;
78 regulator-min-microvolt = <500 78 regulator-min-microvolt = <5000000>;
79 regulator-max-microvolt = <500 79 regulator-max-microvolt = <5000000>;
80 vin-supply = <&dc_5v>; 80 vin-supply = <&dc_5v>;
81 }; 81 };
82 82
83 vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulat 83 vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator {
84 compatible = "regulator-fixed" 84 compatible = "regulator-fixed";
85 regulator-name = "m2_pcie_3v3" 85 regulator-name = "m2_pcie_3v3";
86 enable-active-high; 86 enable-active-high;
87 regulator-min-microvolt = <330 87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <330 88 regulator-max-microvolt = <3300000>;
89 gpios = <&gpio0 RK_PD4 GPIO_AC 89 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
90 pinctrl-0 = <&vcc3v3_m2_pcie_e 90 pinctrl-0 = <&vcc3v3_m2_pcie_en>;
91 pinctrl-names = "default"; 91 pinctrl-names = "default";
92 startup-delay-us = <200000>; 92 startup-delay-us = <200000>;
93 vin-supply = <&vcc5v0_sys>; 93 vin-supply = <&vcc5v0_sys>;
94 }; 94 };
95 95
96 vcc3v3_mini_pcie: vcc3v3-mini-pcie-reg 96 vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator {
97 compatible = "regulator-fixed" 97 compatible = "regulator-fixed";
98 regulator-name = "minipcie_3v3 98 regulator-name = "minipcie_3v3";
99 enable-active-high; 99 enable-active-high;
100 regulator-min-microvolt = <330 100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <330 101 regulator-max-microvolt = <3300000>;
102 gpio = <&gpio3 RK_PC3 GPIO_ACT 102 gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
103 pinctrl-0 = <&vcc3v3_mini_pcie 103 pinctrl-0 = <&vcc3v3_mini_pcie_en>;
104 pinctrl-names = "default"; 104 pinctrl-names = "default";
105 startup-delay-us = <5000>; 105 startup-delay-us = <5000>;
106 vin-supply = <&vcc5v0_sys>; 106 vin-supply = <&vcc5v0_sys>;
107 }; 107 };
108 108
109 vcc5v0_usb20_host: vcc5v0-usb20-host-r 109 vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
110 compatible = "regulator-fixed" 110 compatible = "regulator-fixed";
111 regulator-name = "vcc5v0_usb20 111 regulator-name = "vcc5v0_usb20_host";
112 enable-active-high; 112 enable-active-high;
113 gpio = <&gpio0 RK_PD5 GPIO_ACT 113 gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
114 pinctrl-0 = <&vcc5v0_usb20_hos 114 pinctrl-0 = <&vcc5v0_usb20_host_en>;
115 pinctrl-names = "default"; 115 pinctrl-names = "default";
116 }; 116 };
117 117
118 vcc5v0_usb30_host: vcc5v0-usb30-host-r 118 vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
119 compatible = "regulator-fixed" 119 compatible = "regulator-fixed";
120 regulator-name = "vcc5v0_usb30 120 regulator-name = "vcc5v0_usb30_host";
121 enable-active-high; 121 enable-active-high;
122 gpio = <&gpio0 RK_PD6 GPIO_ACT 122 gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
123 pinctrl-0 = <&vcc5v0_usb30_hos 123 pinctrl-0 = <&vcc5v0_usb30_host_en>;
124 pinctrl-names = "default"; 124 pinctrl-names = "default";
125 }; 125 };
126 126
127 vcc5v0_otg_vbus: vcc5v0-otg-vbus-regul 127 vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator {
128 compatible = "regulator-fixed" 128 compatible = "regulator-fixed";
129 regulator-name = "vcc5v0_otg_v 129 regulator-name = "vcc5v0_otg_vbus";
130 enable-active-high; 130 enable-active-high;
131 regulator-min-microvolt = <500 131 regulator-min-microvolt = <5000000>;
132 regulator-max-microvolt = <500 132 regulator-max-microvolt = <5000000>;
133 gpio = <&gpio0 RK_PD3 GPIO_ACT 133 gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
134 pinctrl-0 = <&vcc5v0_otg_vbus_ 134 pinctrl-0 = <&vcc5v0_otg_vbus_en>;
135 pinctrl-names = "default"; 135 pinctrl-names = "default";
136 }; 136 };
137 }; 137 };
138 138
139 &combphy0 { 139 &combphy0 {
140 status = "okay"; 140 status = "okay";
141 }; 141 };
142 142
143 &combphy1 { 143 &combphy1 {
144 status = "okay"; 144 status = "okay";
145 }; 145 };
146 146
147 &combphy2 { 147 &combphy2 {
148 status = "okay"; 148 status = "okay";
149 }; 149 };
150 150
151 &cpu0 { 151 &cpu0 {
152 cpu-supply = <&vdd_cpu>; 152 cpu-supply = <&vdd_cpu>;
153 }; 153 };
154 154
155 &cpu1 { 155 &cpu1 {
156 cpu-supply = <&vdd_cpu>; 156 cpu-supply = <&vdd_cpu>;
157 }; 157 };
158 158
159 &cpu2 { 159 &cpu2 {
160 cpu-supply = <&vdd_cpu>; 160 cpu-supply = <&vdd_cpu>;
161 }; 161 };
162 162
163 &cpu3 { 163 &cpu3 {
164 cpu-supply = <&vdd_cpu>; 164 cpu-supply = <&vdd_cpu>;
165 }; 165 };
166 166
167 &gpu { 167 &gpu {
168 mali-supply = <&vdd_gpu>; 168 mali-supply = <&vdd_gpu>;
169 status = "okay"; 169 status = "okay";
170 }; 170 };
171 171
172 &hdmi { 172 &hdmi {
173 avdd-0v9-supply = <&vdda0v9_image>; 173 avdd-0v9-supply = <&vdda0v9_image>;
174 avdd-1v8-supply = <&vcca1v8_image>; 174 avdd-1v8-supply = <&vcca1v8_image>;
175 status = "okay"; 175 status = "okay";
176 }; 176 };
177 177
178 &hdmi_in { 178 &hdmi_in {
179 hdmi_in_vp0: endpoint { 179 hdmi_in_vp0: endpoint {
180 remote-endpoint = <&vp0_out_hd 180 remote-endpoint = <&vp0_out_hdmi>;
181 }; 181 };
182 }; 182 };
183 183
184 &hdmi_out { 184 &hdmi_out {
185 hdmi_out_con: endpoint { 185 hdmi_out_con: endpoint {
186 remote-endpoint = <&hdmi_con_i 186 remote-endpoint = <&hdmi_con_in>;
187 }; 187 };
188 }; 188 };
189 189
190 &hdmi_sound { 190 &hdmi_sound {
191 status = "okay"; 191 status = "okay";
192 }; 192 };
193 193
194 &i2c0 { 194 &i2c0 {
195 status = "okay"; 195 status = "okay";
196 196
197 vdd_cpu: regulator@1c { 197 vdd_cpu: regulator@1c {
198 compatible = "tcs,tcs4525"; 198 compatible = "tcs,tcs4525";
199 reg = <0x1c>; 199 reg = <0x1c>;
200 fcs,suspend-voltage-selector = 200 fcs,suspend-voltage-selector = <1>;
201 regulator-name = "vdd_cpu"; 201 regulator-name = "vdd_cpu";
202 regulator-always-on; 202 regulator-always-on;
203 regulator-boot-on; 203 regulator-boot-on;
204 regulator-min-microvolt = <800 204 regulator-min-microvolt = <800000>;
205 regulator-max-microvolt = <115 205 regulator-max-microvolt = <1150000>;
206 regulator-ramp-delay = <2300>; 206 regulator-ramp-delay = <2300>;
207 vin-supply = <&vcc5v0_sys>; 207 vin-supply = <&vcc5v0_sys>;
208 208
209 regulator-state-mem { 209 regulator-state-mem {
210 regulator-off-in-suspe 210 regulator-off-in-suspend;
211 }; 211 };
212 }; 212 };
213 213
214 rk809: pmic@20 { 214 rk809: pmic@20 {
215 compatible = "rockchip,rk809"; 215 compatible = "rockchip,rk809";
216 reg = <0x20>; 216 reg = <0x20>;
217 interrupt-parent = <&gpio0>; 217 interrupt-parent = <&gpio0>;
218 interrupts = <RK_PA3 IRQ_TYPE_ 218 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
219 assigned-clocks = <&cru I2S1_M 219 assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
220 assigned-clock-parents = <&cru 220 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
221 #clock-cells = <1>; 221 #clock-cells = <1>;
222 clock-names = "mclk"; 222 clock-names = "mclk";
223 clocks = <&cru I2S1_MCLKOUT_TX 223 clocks = <&cru I2S1_MCLKOUT_TX>;
224 pinctrl-names = "default"; 224 pinctrl-names = "default";
225 pinctrl-0 = <&pmic_int>; 225 pinctrl-0 = <&pmic_int>;
226 rockchip,system-power-controll 226 rockchip,system-power-controller;
227 #sound-dai-cells = <0>; 227 #sound-dai-cells = <0>;
228 vcc1-supply = <&vcc3v3_sys>; 228 vcc1-supply = <&vcc3v3_sys>;
229 vcc2-supply = <&vcc3v3_sys>; 229 vcc2-supply = <&vcc3v3_sys>;
230 vcc3-supply = <&vcc3v3_sys>; 230 vcc3-supply = <&vcc3v3_sys>;
231 vcc4-supply = <&vcc3v3_sys>; 231 vcc4-supply = <&vcc3v3_sys>;
232 vcc5-supply = <&vcc3v3_sys>; 232 vcc5-supply = <&vcc3v3_sys>;
233 vcc6-supply = <&vcc3v3_sys>; 233 vcc6-supply = <&vcc3v3_sys>;
234 vcc7-supply = <&vcc3v3_sys>; 234 vcc7-supply = <&vcc3v3_sys>;
235 vcc8-supply = <&vcc3v3_sys>; 235 vcc8-supply = <&vcc3v3_sys>;
236 vcc9-supply = <&vcc3v3_sys>; 236 vcc9-supply = <&vcc3v3_sys>;
237 wakeup-source; 237 wakeup-source;
238 238
239 regulators { 239 regulators {
240 vdd_logic: DCDC_REG1 { 240 vdd_logic: DCDC_REG1 {
241 regulator-name 241 regulator-name = "vdd_logic";
242 regulator-alwa 242 regulator-always-on;
243 regulator-boot 243 regulator-boot-on;
244 regulator-min- 244 regulator-min-microvolt = <500000>;
245 regulator-max- 245 regulator-max-microvolt = <1350000>;
246 regulator-ramp 246 regulator-ramp-delay = <6001>;
247 regulator-init 247 regulator-initial-mode = <0x2>;
248 248
249 regulator-stat 249 regulator-state-mem {
250 regula 250 regulator-off-in-suspend;
251 }; 251 };
252 }; 252 };
253 253
254 vdd_gpu: DCDC_REG2 { 254 vdd_gpu: DCDC_REG2 {
255 regulator-name 255 regulator-name = "vdd_gpu";
256 regulator-alwa 256 regulator-always-on;
257 regulator-boot 257 regulator-boot-on;
258 regulator-min- 258 regulator-min-microvolt = <500000>;
259 regulator-max- 259 regulator-max-microvolt = <1350000>;
260 regulator-ramp 260 regulator-ramp-delay = <6001>;
261 regulator-init 261 regulator-initial-mode = <0x2>;
262 262
263 regulator-stat 263 regulator-state-mem {
264 regula 264 regulator-off-in-suspend;
265 }; 265 };
266 }; 266 };
267 267
268 vcc_ddr: DCDC_REG3 { 268 vcc_ddr: DCDC_REG3 {
269 regulator-name 269 regulator-name = "vcc_ddr";
270 regulator-alwa 270 regulator-always-on;
271 regulator-boot 271 regulator-boot-on;
272 regulator-init 272 regulator-initial-mode = <0x2>;
273 273
274 regulator-stat 274 regulator-state-mem {
275 regula 275 regulator-on-in-suspend;
276 }; 276 };
277 }; 277 };
278 278
279 vdd_npu: DCDC_REG4 { 279 vdd_npu: DCDC_REG4 {
280 regulator-name 280 regulator-name = "vdd_npu";
281 regulator-alwa 281 regulator-always-on;
282 regulator-boot 282 regulator-boot-on;
283 regulator-min- 283 regulator-min-microvolt = <500000>;
284 regulator-max- 284 regulator-max-microvolt = <1350000>;
285 regulator-ramp 285 regulator-ramp-delay = <6001>;
286 regulator-init 286 regulator-initial-mode = <0x2>;
287 287
288 regulator-stat 288 regulator-state-mem {
289 regula 289 regulator-off-in-suspend;
290 }; 290 };
291 }; 291 };
292 292
293 vcc_1v8: DCDC_REG5 { 293 vcc_1v8: DCDC_REG5 {
294 regulator-name 294 regulator-name = "vcc_1v8";
295 regulator-alwa 295 regulator-always-on;
296 regulator-boot 296 regulator-boot-on;
297 regulator-min- 297 regulator-min-microvolt = <1800000>;
298 regulator-max- 298 regulator-max-microvolt = <1800000>;
299 299
300 regulator-stat 300 regulator-state-mem {
301 regula 301 regulator-off-in-suspend;
302 }; 302 };
303 }; 303 };
304 304
305 vdda0v9_image: LDO_REG 305 vdda0v9_image: LDO_REG1 {
306 regulator-name 306 regulator-name = "vdda0v9_image";
307 regulator-boot 307 regulator-boot-on;
308 regulator-alwa 308 regulator-always-on;
309 regulator-min- 309 regulator-min-microvolt = <900000>;
310 regulator-max- 310 regulator-max-microvolt = <900000>;
311 311
312 regulator-stat 312 regulator-state-mem {
313 regula 313 regulator-off-in-suspend;
314 }; 314 };
315 }; 315 };
316 316
317 vdda_0v9: LDO_REG2 { 317 vdda_0v9: LDO_REG2 {
318 regulator-name 318 regulator-name = "vdda_0v9";
319 regulator-alwa 319 regulator-always-on;
320 regulator-boot 320 regulator-boot-on;
321 regulator-min- 321 regulator-min-microvolt = <900000>;
322 regulator-max- 322 regulator-max-microvolt = <900000>;
323 323
324 regulator-stat 324 regulator-state-mem {
325 regula 325 regulator-off-in-suspend;
326 }; 326 };
327 }; 327 };
328 328
329 vdda0v9_pmu: LDO_REG3 329 vdda0v9_pmu: LDO_REG3 {
330 regulator-name 330 regulator-name = "vdda0v9_pmu";
331 regulator-alwa 331 regulator-always-on;
332 regulator-boot 332 regulator-boot-on;
333 regulator-min- 333 regulator-min-microvolt = <900000>;
334 regulator-max- 334 regulator-max-microvolt = <900000>;
335 335
336 regulator-stat 336 regulator-state-mem {
337 regula 337 regulator-on-in-suspend;
338 regula 338 regulator-suspend-microvolt = <900000>;
339 }; 339 };
340 }; 340 };
341 341
342 vccio_acodec: LDO_REG4 342 vccio_acodec: LDO_REG4 {
343 regulator-name 343 regulator-name = "vccio_acodec";
344 regulator-alwa 344 regulator-always-on;
345 regulator-boot 345 regulator-boot-on;
346 regulator-min- 346 regulator-min-microvolt = <3300000>;
347 regulator-max- 347 regulator-max-microvolt = <3300000>;
348 348
349 regulator-stat 349 regulator-state-mem {
350 regula 350 regulator-off-in-suspend;
351 }; 351 };
352 }; 352 };
353 353
354 vccio_sd: LDO_REG5 { 354 vccio_sd: LDO_REG5 {
355 regulator-name 355 regulator-name = "vccio_sd";
356 regulator-alwa 356 regulator-always-on;
357 regulator-boot 357 regulator-boot-on;
358 regulator-min- 358 regulator-min-microvolt = <1800000>;
359 regulator-max- 359 regulator-max-microvolt = <3300000>;
360 360
361 regulator-stat 361 regulator-state-mem {
362 regula 362 regulator-off-in-suspend;
363 }; 363 };
364 }; 364 };
365 365
366 vcc3v3_pmu: LDO_REG6 { 366 vcc3v3_pmu: LDO_REG6 {
367 regulator-name 367 regulator-name = "vcc3v3_pmu";
368 regulator-alwa 368 regulator-always-on;
369 regulator-boot 369 regulator-boot-on;
370 regulator-min- 370 regulator-min-microvolt = <3300000>;
371 regulator-max- 371 regulator-max-microvolt = <3300000>;
372 372
373 regulator-stat 373 regulator-state-mem {
374 regula 374 regulator-on-in-suspend;
375 regula 375 regulator-suspend-microvolt = <3300000>;
376 }; 376 };
377 }; 377 };
378 378
379 vcca_1v8: LDO_REG7 { 379 vcca_1v8: LDO_REG7 {
380 regulator-name 380 regulator-name = "vcca_1v8";
381 regulator-alwa 381 regulator-always-on;
382 regulator-boot 382 regulator-boot-on;
383 regulator-min- 383 regulator-min-microvolt = <1800000>;
384 regulator-max- 384 regulator-max-microvolt = <1800000>;
385 385
386 regulator-stat 386 regulator-state-mem {
387 regula 387 regulator-off-in-suspend;
388 }; 388 };
389 }; 389 };
390 390
391 vcca1v8_pmu: LDO_REG8 391 vcca1v8_pmu: LDO_REG8 {
392 regulator-name 392 regulator-name = "vcca1v8_pmu";
393 regulator-alwa 393 regulator-always-on;
394 regulator-boot 394 regulator-boot-on;
395 regulator-min- 395 regulator-min-microvolt = <1800000>;
396 regulator-max- 396 regulator-max-microvolt = <1800000>;
397 397
398 regulator-stat 398 regulator-state-mem {
399 regula 399 regulator-on-in-suspend;
400 regula 400 regulator-suspend-microvolt = <1800000>;
401 }; 401 };
402 }; 402 };
403 403
404 vcca1v8_image: LDO_REG 404 vcca1v8_image: LDO_REG9 {
405 regulator-name 405 regulator-name = "vcca1v8_image";
406 regulator-alwa 406 regulator-always-on;
407 regulator-boot 407 regulator-boot-on;
408 regulator-min- 408 regulator-min-microvolt = <1800000>;
409 regulator-max- 409 regulator-max-microvolt = <1800000>;
410 410
411 regulator-stat 411 regulator-state-mem {
412 regula 412 regulator-off-in-suspend;
413 }; 413 };
414 }; 414 };
415 415
416 vcc_3v3: SWITCH_REG1 { 416 vcc_3v3: SWITCH_REG1 {
417 regulator-name 417 regulator-name = "vcc_3v3";
418 regulator-alwa 418 regulator-always-on;
419 regulator-boot 419 regulator-boot-on;
420 420
421 regulator-stat 421 regulator-state-mem {
422 regula 422 regulator-off-in-suspend;
423 }; 423 };
424 }; 424 };
425 425
426 vcc3v3_sd: SWITCH_REG2 426 vcc3v3_sd: SWITCH_REG2 {
427 regulator-name 427 regulator-name = "vcc3v3_sd";
428 regulator-alwa 428 regulator-always-on;
429 regulator-boot 429 regulator-boot-on;
430 430
431 regulator-stat 431 regulator-state-mem {
432 regula 432 regulator-off-in-suspend;
433 }; 433 };
434 }; 434 };
435 }; 435 };
436 }; 436 };
437 }; 437 };
438 438
439 &i2s1_8ch { 439 &i2s1_8ch {
440 rockchip,trcm-sync-tx-only; 440 rockchip,trcm-sync-tx-only;
441 status = "okay"; 441 status = "okay";
442 }; 442 };
443 443
444 &gmac0 { 444 &gmac0 {
445 phy-mode = "rgmii"; 445 phy-mode = "rgmii";
446 clock_in_out = "output"; 446 clock_in_out = "output";
447 447
448 snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ 448 snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
449 snps,reset-active-low; 449 snps,reset-active-low;
450 /* Reset time is 20ms, 100ms for rtl82 450 /* Reset time is 20ms, 100ms for rtl8211f */
451 snps,reset-delays-us = <0 20000 100000 451 snps,reset-delays-us = <0 20000 100000>;
452 452
453 assigned-clocks = <&cru SCLK_GMAC0_RX_ 453 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
454 assigned-clock-parents = <&cru SCLK_GM 454 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
455 455
456 pinctrl-names = "default"; 456 pinctrl-names = "default";
457 pinctrl-0 = <&gmac0_miim 457 pinctrl-0 = <&gmac0_miim
458 &gmac0_tx_bus2 458 &gmac0_tx_bus2
459 &gmac0_rx_bus2 459 &gmac0_rx_bus2
460 &gmac0_rgmii_clk 460 &gmac0_rgmii_clk
461 &gmac0_rgmii_bus>; 461 &gmac0_rgmii_bus>;
462 462
463 tx_delay = <0x22>; 463 tx_delay = <0x22>;
464 rx_delay = <0x0e>; 464 rx_delay = <0x0e>;
465 465
466 phy-handle = <&rgmii_phy0>; 466 phy-handle = <&rgmii_phy0>;
467 status = "okay"; 467 status = "okay";
468 }; 468 };
469 469
470 &mdio0 { 470 &mdio0 {
471 rgmii_phy0: phy@0 { 471 rgmii_phy0: phy@0 {
472 compatible = "ethernet-phy-iee 472 compatible = "ethernet-phy-ieee802.3-c22";
473 reg = <0x0>; 473 reg = <0x0>;
474 }; 474 };
475 }; 475 };
476 476
477 &gmac1 { 477 &gmac1 {
478 phy-mode = "rgmii"; 478 phy-mode = "rgmii";
479 clock_in_out = "output"; 479 clock_in_out = "output";
480 480
481 snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ 481 snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
482 snps,reset-active-low; 482 snps,reset-active-low;
483 /* Reset time is 20ms, 100ms for rtl82 483 /* Reset time is 20ms, 100ms for rtl8211f */
484 snps,reset-delays-us = <0 20000 100000 484 snps,reset-delays-us = <0 20000 100000>;
485 485
486 assigned-clocks = <&cru SCLK_GMAC1_RX_ 486 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
487 assigned-clock-parents = <&cru SCLK_GM 487 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
488 488
489 pinctrl-names = "default"; 489 pinctrl-names = "default";
490 pinctrl-0 = <&gmac1m1_miim 490 pinctrl-0 = <&gmac1m1_miim
491 &gmac1m1_tx_bus2 491 &gmac1m1_tx_bus2
492 &gmac1m1_rx_bus2 492 &gmac1m1_rx_bus2
493 &gmac1m1_rgmii_clk 493 &gmac1m1_rgmii_clk
494 &gmac1m1_rgmii_bus>; 494 &gmac1m1_rgmii_bus>;
495 495
496 tx_delay = <0x21>; 496 tx_delay = <0x21>;
497 rx_delay = <0x0e>; 497 rx_delay = <0x0e>;
498 498
499 phy-handle = <&rgmii_phy1>; 499 phy-handle = <&rgmii_phy1>;
500 status = "okay"; 500 status = "okay";
501 }; 501 };
502 502
503 &mdio1 { 503 &mdio1 {
504 rgmii_phy1: phy@0 { 504 rgmii_phy1: phy@0 {
505 compatible = "ethernet-phy-iee 505 compatible = "ethernet-phy-ieee802.3-c22";
506 reg = <0x0>; 506 reg = <0x0>;
507 }; 507 };
508 }; 508 };
509 509
510 &gic { 510 &gic {
511 mbi-ranges = <94 31>, <229 31>, <289 3 511 mbi-ranges = <94 31>, <229 31>, <289 31>;
512 }; 512 };
513 513
514 &pcie30phy { 514 &pcie30phy {
515 status = "okay"; 515 status = "okay";
516 }; 516 };
517 517
518 &pcie3x2 { 518 &pcie3x2 {
519 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTI 519 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
520 vpcie3v3-supply = <&vcc3v3_m2_pcie>; 520 vpcie3v3-supply = <&vcc3v3_m2_pcie>;
521 status = "okay"; 521 status = "okay";
522 }; 522 };
523 523
524 &pcie2x1 { 524 &pcie2x1 {
525 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTI 525 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
>> 526 disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
526 vpcie3v3-supply = <&vcc3v3_mini_pcie>; 527 vpcie3v3-supply = <&vcc3v3_mini_pcie>;
527 status = "okay"; 528 status = "okay";
528 }; 529 };
529 530
530 &pmu_io_domains { 531 &pmu_io_domains {
531 pmuio2-supply = <&vcc3v3_pmu>; 532 pmuio2-supply = <&vcc3v3_pmu>;
532 vccio1-supply = <&vccio_acodec>; 533 vccio1-supply = <&vccio_acodec>;
533 vccio3-supply = <&vccio_sd>; 534 vccio3-supply = <&vccio_sd>;
534 vccio4-supply = <&vcc_1v8>; 535 vccio4-supply = <&vcc_1v8>;
535 vccio5-supply = <&vcc_3v3>; 536 vccio5-supply = <&vcc_3v3>;
536 vccio6-supply = <&vcc_1v8>; 537 vccio6-supply = <&vcc_1v8>;
537 vccio7-supply = <&vcc_3v3>; 538 vccio7-supply = <&vcc_3v3>;
538 status = "okay"; 539 status = "okay";
539 }; 540 };
540 541
541 &pwm8 { 542 &pwm8 {
542 status = "okay"; 543 status = "okay";
543 }; 544 };
544 545
545 &pwm9 { 546 &pwm9 {
546 status = "disabled"; 547 status = "disabled";
547 }; 548 };
548 549
549 &pwm10 { 550 &pwm10 {
550 status = "disabled"; 551 status = "disabled";
551 }; 552 };
552 553
553 &pwm14 { 554 &pwm14 {
554 status = "disabled"; 555 status = "disabled";
555 }; 556 };
556 557
557 &spi3 { 558 &spi3 {
558 pinctrl-0 = <&spi3m1_pins>; 559 pinctrl-0 = <&spi3m1_pins>;
559 status = "disabled"; 560 status = "disabled";
560 }; 561 };
561 562
562 &uart2 { 563 &uart2 {
563 status = "okay"; 564 status = "okay";
564 }; 565 };
565 566
566 &uart3 { 567 &uart3 {
567 pinctrl-names = "default"; 568 pinctrl-names = "default";
568 pinctrl-0 = <&uart3m1_xfer>; 569 pinctrl-0 = <&uart3m1_xfer>;
569 status = "disabled"; 570 status = "disabled";
570 }; 571 };
571 572
572 &saradc { 573 &saradc {
573 vref-supply = <&vcca_1v8>; 574 vref-supply = <&vcca_1v8>;
574 status = "okay"; 575 status = "okay";
575 }; 576 };
576 577
577 &tsadc { 578 &tsadc {
578 rockchip,hw-tshut-mode = <1>; 579 rockchip,hw-tshut-mode = <1>;
579 rockchip,hw-tshut-polarity = <0>; 580 rockchip,hw-tshut-polarity = <0>;
580 status = "okay"; 581 status = "okay";
581 }; 582 };
582 583
583 &sdhci { 584 &sdhci {
584 assigned-clocks = <&cru BCLK_EMMC>, <& 585 assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>;
585 assigned-clock-rates = <200000000>, <2 586 assigned-clock-rates = <200000000>, <24000000>, <200000000>;
586 bus-width = <8>; 587 bus-width = <8>;
587 max-frequency = <200000000>; 588 max-frequency = <200000000>;
588 mmc-hs200-1_8v; 589 mmc-hs200-1_8v;
589 non-removable; 590 non-removable;
590 pinctrl-names = "default"; 591 pinctrl-names = "default";
591 pinctrl-0 = <&emmc_bus8 &emmc_clk &emm 592 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
>> 593 supports-emmc;
592 status = "okay"; 594 status = "okay";
593 }; 595 };
594 596
595 &sdmmc0 { 597 &sdmmc0 {
596 max-frequency = <150000000>; 598 max-frequency = <150000000>;
597 no-sdio; 599 no-sdio;
598 no-mmc; 600 no-mmc;
599 bus-width = <4>; 601 bus-width = <4>;
600 cap-mmc-highspeed; 602 cap-mmc-highspeed;
601 cap-sd-highspeed; 603 cap-sd-highspeed;
602 disable-wp; 604 disable-wp;
603 sd-uhs-sdr104; 605 sd-uhs-sdr104;
604 vmmc-supply = <&vcc3v3_sd>; 606 vmmc-supply = <&vcc3v3_sd>;
605 vqmmc-supply = <&vccio_sd>; 607 vqmmc-supply = <&vccio_sd>;
606 pinctrl-names = "default"; 608 pinctrl-names = "default";
607 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk 609 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
608 status = "okay"; 610 status = "okay";
609 }; 611 };
610 612
611 /* USB OTG/USB Host_1 USB 2.0 Comb */ 613 /* USB OTG/USB Host_1 USB 2.0 Comb */
612 &usb2phy0 { 614 &usb2phy0 {
613 status = "okay"; 615 status = "okay";
614 }; 616 };
615 617
616 &usb2phy0_host { 618 &usb2phy0_host {
617 phy-supply = <&vcc5v0_usb30_host>; 619 phy-supply = <&vcc5v0_usb30_host>;
618 status = "okay"; 620 status = "okay";
619 }; 621 };
620 622
621 &usb2phy0_otg { 623 &usb2phy0_otg {
622 phy-supply = <&vcc5v0_otg_vbus>; 624 phy-supply = <&vcc5v0_otg_vbus>;
623 status = "okay"; 625 status = "okay";
624 }; 626 };
625 627
626 &usb_host0_ehci { 628 &usb_host0_ehci {
627 status = "okay"; 629 status = "okay";
628 }; 630 };
629 631
630 &usb_host0_ohci { 632 &usb_host0_ohci {
631 status = "okay"; 633 status = "okay";
632 }; 634 };
633 635
634 /* USB Host_2/USB Host_3 USB 2.0 Comb */ 636 /* USB Host_2/USB Host_3 USB 2.0 Comb */
635 &usb2phy1 { 637 &usb2phy1 {
636 status = "okay"; 638 status = "okay";
637 }; 639 };
638 640
639 &usb2phy1_host { 641 &usb2phy1_host {
640 status = "okay"; 642 status = "okay";
641 }; 643 };
642 644
643 &usb2phy1_otg { 645 &usb2phy1_otg {
644 phy-supply = <&vcc5v0_usb20_host>; 646 phy-supply = <&vcc5v0_usb20_host>;
645 status = "okay"; 647 status = "okay";
646 }; 648 };
647 649
648 &usb_host1_ehci { 650 &usb_host1_ehci {
649 status = "okay"; 651 status = "okay";
650 }; 652 };
651 653
652 &usb_host1_ohci { 654 &usb_host1_ohci {
653 status = "okay"; 655 status = "okay";
654 }; 656 };
655 657
656 /* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2. 658 /* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2.0 */
657 &usb_host0_xhci { 659 &usb_host0_xhci {
658 phys = <&usb2phy0_otg>; 660 phys = <&usb2phy0_otg>;
659 phy-names = "usb2-phy"; 661 phy-names = "usb2-phy";
660 extcon = <&usb2phy0>; 662 extcon = <&usb2phy0>;
661 maximum-speed = "high-speed"; 663 maximum-speed = "high-speed";
662 dr_mode = "host"; 664 dr_mode = "host";
663 status = "okay"; 665 status = "okay";
664 }; 666 };
665 667
666 &sata0 { 668 &sata0 {
667 status = "okay"; 669 status = "okay";
668 }; 670 };
669 671
670 /* USB3.0 Host */ 672 /* USB3.0 Host */
671 &usb_host1_xhci { 673 &usb_host1_xhci {
672 status = "okay"; 674 status = "okay";
673 }; 675 };
674 676
675 &vop { 677 &vop {
676 assigned-clocks = <&cru DCLK_VOP0>, <& 678 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
677 assigned-clock-parents = <&pmucru PLL_ 679 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
678 status = "okay"; 680 status = "okay";
679 }; 681 };
680 682
681 &vop_mmu { 683 &vop_mmu {
682 status = "okay"; 684 status = "okay";
683 }; 685 };
684 686
685 &vp0 { 687 &vp0 {
686 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_E 688 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
687 reg = <ROCKCHIP_VOP2_EP_HDMI0> 689 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
688 remote-endpoint = <&hdmi_in_vp 690 remote-endpoint = <&hdmi_in_vp0>;
689 }; 691 };
690 }; 692 };
691 693
692 &pinctrl { 694 &pinctrl {
693 leds { 695 leds {
694 user_led_pin: user-status-led- 696 user_led_pin: user-status-led-pin {
695 rockchip,pins = <0 RK_ 697 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
696 }; 698 };
697 }; 699 };
698 700
699 usb { 701 usb {
700 vcc5v0_usb20_host_en: vcc5v0-u 702 vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
701 rockchip,pins = <0 RK_ 703 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
702 }; 704 };
703 705
704 vcc5v0_usb30_host_en: vcc5v0-u 706 vcc5v0_usb30_host_en: vcc5v0-usb30-host-en {
705 rockchip,pins = <0 RK_ 707 rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
706 }; 708 };
707 709
708 vcc5v0_otg_vbus_en: vcc5v0-otg 710 vcc5v0_otg_vbus_en: vcc5v0-otg-vbus-en {
709 rockchip,pins = <0 RK_ 711 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
710 }; 712 };
711 }; 713 };
712 714
713 pcie { 715 pcie {
714 vcc3v3_m2_pcie_en: vcc3v3-m2-p 716 vcc3v3_m2_pcie_en: vcc3v3-m2-pcie-en {
715 rockchip,pins = <0 RK_ 717 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
716 }; 718 };
717 719
718 vcc3v3_mini_pcie_en: vcc3v3-mi 720 vcc3v3_mini_pcie_en: vcc3v3-mini-pcie-en {
719 rockchip,pins = <3 RK_ 721 rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
720 }; 722 };
721 }; 723 };
722 724
723 pmic { 725 pmic {
724 pmic_int: pmic-int { 726 pmic_int: pmic-int {
725 rockchip,pins = <0 RK_ 727 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
726 }; 728 };
727 }; 729 };
728 }; 730 };
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