1 // SPDX-License-Identifier: GPL-2.0-or-later O
2 /*
3 * Copyright (c) 2022 FriendlyElec Computer Te
4 * (http://www.friendlyelec.com)
5 *
6 * Copyright (c) 2023 Tianling Shen <cnsztl@gma
7 */
8
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include <dt-bindings/soc/rockchip,vop2.h>
15 #include "rk3568.dtsi"
16
17 / {
18 aliases {
19 mmc0 = &sdmmc0;
20 mmc1 = &sdhci;
21 };
22
23 chosen: chosen {
24 stdout-path = "serial2:1500000
25 };
26
27 hdmi-con {
28 compatible = "hdmi-connector";
29 type = "a";
30
31 port {
32 hdmi_con_in: endpoint
33 remote-endpoin
34 };
35 };
36 };
37
38 vdd_usbc: vdd-usbc-regulator {
39 compatible = "regulator-fixed"
40 regulator-name = "vdd_usbc";
41 regulator-always-on;
42 regulator-boot-on;
43 regulator-min-microvolt = <500
44 regulator-max-microvolt = <500
45 };
46
47 vcc3v3_sys: vcc3v3-sys-regulator {
48 compatible = "regulator-fixed"
49 regulator-name = "vcc3v3_sys";
50 regulator-always-on;
51 regulator-boot-on;
52 regulator-min-microvolt = <330
53 regulator-max-microvolt = <330
54 vin-supply = <&vdd_usbc>;
55 };
56
57 vcc5v0_sys: vcc5v0-sys-regulator {
58 compatible = "regulator-fixed"
59 regulator-name = "vcc5v0_sys";
60 regulator-always-on;
61 regulator-boot-on;
62 regulator-min-microvolt = <500
63 regulator-max-microvolt = <500
64 vin-supply = <&vdd_usbc>;
65 };
66
67 vcc3v3_pcie: vcc3v3-pcie-regulator {
68 compatible = "regulator-fixed"
69 regulator-name = "vcc3v3_pcie"
70 regulator-min-microvolt = <330
71 regulator-max-microvolt = <330
72 enable-active-high;
73 gpios = <&gpio0 RK_PD4 GPIO_AC
74 startup-delay-us = <200000>;
75 vin-supply = <&vcc5v0_sys>;
76 };
77
78 vcc5v0_usb: vcc5v0-usb-regulator {
79 compatible = "regulator-fixed"
80 regulator-name = "vcc5v0_usb";
81 regulator-always-on;
82 regulator-boot-on;
83 regulator-min-microvolt = <500
84 regulator-max-microvolt = <500
85 vin-supply = <&vdd_usbc>;
86 };
87
88 vcc5v0_usb_host: vcc5v0-usb-host-regul
89 compatible = "regulator-fixed"
90 enable-active-high;
91 gpio = <&gpio0 RK_PA6 GPIO_ACT
92 pinctrl-names = "default";
93 pinctrl-0 = <&vcc5v0_usb_host_
94 regulator-name = "vcc5v0_usb_h
95 regulator-always-on;
96 regulator-boot-on;
97 regulator-min-microvolt = <500
98 regulator-max-microvolt = <500
99 vin-supply = <&vcc5v0_usb>;
100 };
101
102 vcc5v0_usb_otg: vcc5v0-usb-otg-regulat
103 compatible = "regulator-fixed"
104 enable-active-high;
105 gpio = <&gpio0 RK_PA5 GPIO_ACT
106 pinctrl-names = "default";
107 pinctrl-0 = <&vcc5v0_usb_otg_e
108 regulator-name = "vcc5v0_usb_o
109 regulator-min-microvolt = <500
110 regulator-max-microvolt = <500
111 vin-supply = <&vcc5v0_usb>;
112 };
113
114 pcie30_avdd0v9: pcie30-avdd0v9-regulat
115 compatible = "regulator-fixed"
116 regulator-name = "pcie30_avdd0
117 regulator-always-on;
118 regulator-boot-on;
119 regulator-min-microvolt = <900
120 regulator-max-microvolt = <900
121 vin-supply = <&vcc3v3_sys>;
122 };
123
124 pcie30_avdd1v8: pcie30-avdd1v8-regulat
125 compatible = "regulator-fixed"
126 regulator-name = "pcie30_avdd1
127 regulator-always-on;
128 regulator-boot-on;
129 regulator-min-microvolt = <180
130 regulator-max-microvolt = <180
131 vin-supply = <&vcc3v3_sys>;
132 };
133 };
134
135 &combphy0 {
136 status = "okay";
137 };
138
139 &combphy1 {
140 status = "okay";
141 };
142
143 &combphy2 {
144 status = "okay";
145 };
146
147 &cpu0 {
148 cpu-supply = <&vdd_cpu>;
149 };
150
151 &cpu1 {
152 cpu-supply = <&vdd_cpu>;
153 };
154
155 &cpu2 {
156 cpu-supply = <&vdd_cpu>;
157 };
158
159 &cpu3 {
160 cpu-supply = <&vdd_cpu>;
161 };
162
163 &gpu {
164 mali-supply = <&vdd_gpu>;
165 status = "okay";
166 };
167
168 &hdmi {
169 avdd-0v9-supply = <&vdda0v9_image>;
170 avdd-1v8-supply = <&vcca1v8_image>;
171 status = "okay";
172 };
173
174 &hdmi_in {
175 hdmi_in_vp0: endpoint {
176 remote-endpoint = <&vp0_out_hd
177 };
178 };
179
180 &hdmi_out {
181 hdmi_out_con: endpoint {
182 remote-endpoint = <&hdmi_con_i
183 };
184 };
185
186 &hdmi_sound {
187 status = "okay";
188 };
189
190 &i2c0 {
191 status = "okay";
192
193 vdd_cpu: regulator@1c {
194 compatible = "tcs,tcs4525";
195 reg = <0x1c>;
196 fcs,suspend-voltage-selector =
197 regulator-name = "vdd_cpu";
198 regulator-always-on;
199 regulator-boot-on;
200 regulator-min-microvolt = <800
201 regulator-max-microvolt = <115
202 regulator-ramp-delay = <2300>;
203 vin-supply = <&vcc5v0_sys>;
204
205 regulator-state-mem {
206 regulator-off-in-suspe
207 };
208 };
209
210 rk809: pmic@20 {
211 compatible = "rockchip,rk809";
212 reg = <0x20>;
213 interrupt-parent = <&gpio0>;
214 interrupts = <RK_PA3 IRQ_TYPE_
215 #clock-cells = <1>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pmic_int>;
218 rockchip,system-power-controll
219 vcc1-supply = <&vcc3v3_sys>;
220 vcc2-supply = <&vcc3v3_sys>;
221 vcc3-supply = <&vcc3v3_sys>;
222 vcc4-supply = <&vcc3v3_sys>;
223 vcc5-supply = <&vcc3v3_sys>;
224 vcc6-supply = <&vcc3v3_sys>;
225 vcc7-supply = <&vcc3v3_sys>;
226 vcc8-supply = <&vcc3v3_sys>;
227 vcc9-supply = <&vcc3v3_sys>;
228 wakeup-source;
229
230 regulators {
231 vdd_logic: DCDC_REG1 {
232 regulator-name
233 regulator-alwa
234 regulator-boot
235 regulator-init
236 regulator-min-
237 regulator-max-
238 regulator-ramp
239
240 regulator-stat
241 regula
242 };
243 };
244
245 vdd_gpu: DCDC_REG2 {
246 regulator-name
247 regulator-alwa
248 regulator-init
249 regulator-min-
250 regulator-max-
251 regulator-ramp
252
253 regulator-stat
254 regula
255 };
256 };
257
258 vcc_ddr: DCDC_REG3 {
259 regulator-name
260 regulator-alwa
261 regulator-boot
262 regulator-init
263
264 regulator-stat
265 regula
266 };
267 };
268
269 vdd_npu: DCDC_REG4 {
270 regulator-name
271 regulator-init
272 regulator-min-
273 regulator-max-
274 regulator-ramp
275
276 regulator-stat
277 regula
278 };
279 };
280
281 vcc_1v8: DCDC_REG5 {
282 regulator-name
283 regulator-alwa
284 regulator-boot
285 regulator-min-
286 regulator-max-
287
288 regulator-stat
289 regula
290 };
291 };
292
293 vdda0v9_image: LDO_REG
294 regulator-name
295 regulator-min-
296 regulator-max-
297
298 regulator-stat
299 regula
300 };
301 };
302
303 vdda_0v9: LDO_REG2 {
304 regulator-name
305 regulator-alwa
306 regulator-boot
307 regulator-min-
308 regulator-max-
309
310 regulator-stat
311 regula
312 };
313 };
314
315 vdda0v9_pmu: LDO_REG3
316 regulator-name
317 regulator-alwa
318 regulator-boot
319 regulator-min-
320 regulator-max-
321
322 regulator-stat
323 regula
324 regula
325 };
326 };
327
328 vccio_acodec: LDO_REG4
329 regulator-name
330 regulator-min-
331 regulator-max-
332
333 regulator-stat
334 regula
335 };
336 };
337
338 vccio_sd: LDO_REG5 {
339 regulator-name
340 regulator-min-
341 regulator-max-
342
343 regulator-stat
344 regula
345 };
346 };
347
348 vcc3v3_pmu: LDO_REG6 {
349 regulator-name
350 regulator-alwa
351 regulator-boot
352 regulator-min-
353 regulator-max-
354
355 regulator-stat
356 regula
357 regula
358 };
359 };
360
361 vcca_1v8: LDO_REG7 {
362 regulator-name
363 regulator-alwa
364 regulator-boot
365 regulator-min-
366 regulator-max-
367
368 regulator-stat
369 regula
370 };
371 };
372
373 vcca1v8_pmu: LDO_REG8
374 regulator-name
375 regulator-alwa
376 regulator-boot
377 regulator-min-
378 regulator-max-
379
380 regulator-stat
381 regula
382 regula
383 };
384 };
385
386 vcca1v8_image: LDO_REG
387 regulator-name
388 regulator-min-
389 regulator-max-
390
391 regulator-stat
392 regula
393 };
394 };
395
396 vcc_3v3: SWITCH_REG1 {
397 regulator-name
398 regulator-alwa
399 regulator-boot
400
401 regulator-stat
402 regula
403 };
404 };
405
406 vcc3v3_sd: SWITCH_REG2
407 regulator-name
408 regulator-alwa
409 regulator-boot
410
411 regulator-stat
412 regula
413 };
414 };
415 };
416
417 };
418 };
419
420 &i2c5 {
421 status = "okay";
422
423 hym8563: rtc@51 {
424 compatible = "haoyu,hym8563";
425 reg = <0x51>;
426 interrupt-parent = <&gpio0>;
427 interrupts = <RK_PD3 IRQ_TYPE_
428 #clock-cells = <0>;
429 clock-output-names = "rtcic_32
430 pinctrl-names = "default";
431 pinctrl-0 = <&hym8563_int>;
432 wakeup-source;
433 };
434 };
435
436 &i2s0_8ch {
437 status = "okay";
438 };
439
440 &pcie30phy {
441 data-lanes = <1 2>;
442 status = "okay";
443 };
444
445 &pinctrl {
446 hym8563 {
447 hym8563_int: hym8563-int {
448 rockchip,pins = <0 RK_
449 };
450 };
451
452 pmic {
453 pmic_int: pmic-int {
454 rockchip,pins = <0 RK_
455 };
456 };
457
458 usb {
459 vcc5v0_usb_host_en: vcc5v0-usb
460 rockchip,pins = <0 RK_
461 };
462
463 vcc5v0_usb_otg_en: vcc5v0-usb-
464 rockchip,pins = <0 RK_
465 };
466 };
467 };
468
469 &pmu_io_domains {
470 pmuio1-supply = <&vcc3v3_pmu>;
471 pmuio2-supply = <&vcc3v3_pmu>;
472 vccio1-supply = <&vccio_acodec>;
473 vccio3-supply = <&vccio_sd>;
474 vccio4-supply = <&vcc_1v8>;
475 vccio5-supply = <&vcc_3v3>;
476 vccio6-supply = <&vcc_1v8>;
477 vccio7-supply = <&vcc_3v3>;
478 status = "okay";
479 };
480
481 &saradc {
482 vref-supply = <&vcca_1v8>;
483 status = "okay";
484 };
485
486 &sdhci {
487 bus-width = <8>;
488 max-frequency = <200000000>;
489 non-removable;
490 pinctrl-names = "default";
491 pinctrl-0 = <&emmc_bus8 &emmc_clk &emm
492 status = "okay";
493 };
494
495 &sdmmc0 {
496 max-frequency = <150000000>;
497 no-sdio;
498 no-mmc;
499 bus-width = <4>;
500 cap-mmc-highspeed;
501 cap-sd-highspeed;
502 disable-wp;
503 vmmc-supply = <&vcc3v3_sd>;
504 vqmmc-supply = <&vccio_sd>;
505 pinctrl-names = "default";
506 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk
507 status = "okay";
508 };
509
510 &tsadc {
511 rockchip,hw-tshut-mode = <1>;
512 rockchip,hw-tshut-polarity = <0>;
513 status = "okay";
514 };
515
516 &uart2 {
517 status = "okay";
518 };
519
520 &usb_host0_ehci {
521 status = "okay";
522 };
523
524 &usb_host0_ohci {
525 status = "okay";
526 };
527
528 &usb_host0_xhci {
529 extcon = <&usb2phy0>;
530 dr_mode = "host";
531 status = "okay";
532 };
533
534 &usb_host1_ehci {
535 status = "okay";
536 };
537
538 &usb_host1_ohci {
539 status = "okay";
540 };
541
542 &usb_host1_xhci {
543 status = "okay";
544 };
545
546 &usb2phy0 {
547 status = "okay";
548 };
549
550 &usb2phy0_host {
551 phy-supply = <&vcc5v0_usb_host>;
552 status = "okay";
553 };
554
555 &usb2phy0_otg {
556 status = "okay";
557 };
558
559 &usb2phy1 {
560 status = "okay";
561 };
562
563 &usb2phy1_host {
564 phy-supply = <&vcc5v0_usb_otg>;
565 status = "okay";
566 };
567
568 &usb2phy1_otg {
569 status = "okay";
570 };
571
572 &vop {
573 assigned-clocks = <&cru DCLK_VOP0>, <&
574 assigned-clock-parents = <&pmucru PLL_
575 status = "okay";
576 };
577
578 &vop_mmu {
579 status = "okay";
580 };
581
582 &vp0 {
583 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_E
584 reg = <ROCKCHIP_VOP2_EP_HDMI0>
585 remote-endpoint = <&hdmi_in_vp
586 };
587 };
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