1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 2 /* 3 * Copyright (c) 2021 Rockchip Electronics Co. 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2024 Uwe Kleine-König 4 * Copyright (c) 2024 Uwe Kleine-König 5 */ 5 */ 6 6 7 /dts-v1/; 7 /dts-v1/; 8 8 9 #include <dt-bindings/input/input.h> << 10 #include <dt-bindings/leds/common.h> << 11 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/gpio.h> 12 #include "rk3568.dtsi" 10 #include "rk3568.dtsi" 13 11 14 / { 12 / { 15 model = "Qnap TS-433-4G NAS System 4-B 13 model = "Qnap TS-433-4G NAS System 4-Bay"; 16 compatible = "qnap,ts433", "rockchip,r 14 compatible = "qnap,ts433", "rockchip,rk3568"; 17 << 18 aliases { << 19 ethernet0 = &gmac0; << 20 mmc0 = &sdhci; << 21 rtc0 = &rtc_rv8263; << 22 }; << 23 << 24 chosen { << 25 stdout-path = "serial2:115200n << 26 }; << 27 << 28 keys { << 29 compatible = "gpio-keys"; << 30 pinctrl-0 = <©_button_pin> << 31 pinctrl-names = "default"; << 32 << 33 key-copy { << 34 label = "copy"; << 35 gpios = <&gpio0 RK_PB6 << 36 linux,code = <KEY_COPY << 37 }; << 38 << 39 key-reset { << 40 label = "reset"; << 41 gpios = <&gpio0 RK_PB5 << 42 linux,code = <KEY_REST << 43 }; << 44 }; << 45 << 46 leds { << 47 compatible = "gpio-leds"; << 48 << 49 led-0 { << 50 color = <LED_COLOR_ID_ << 51 function = LED_FUNCTIO << 52 gpios = <&gpio1 RK_PD5 << 53 linux,default-trigger << 54 pinctrl-names = "defau << 55 pinctrl-0 = <&hdd1_led << 56 }; << 57 << 58 led-1 { << 59 color = <LED_COLOR_ID_ << 60 function = LED_FUNCTIO << 61 gpios = <&gpio1 RK_PD6 << 62 linux,default-trigger << 63 pinctrl-names = "defau << 64 pinctrl-0 = <&hdd2_led << 65 }; << 66 << 67 led-2 { << 68 color = <LED_COLOR_ID_ << 69 function = LED_FUNCTIO << 70 gpios = <&gpio1 RK_PD7 << 71 linux,default-trigger << 72 pinctrl-names = "defau << 73 pinctrl-0 = <&hdd3_led << 74 }; << 75 << 76 led-3 { << 77 color = <LED_COLOR_ID_ << 78 function = LED_FUNCTIO << 79 gpios = <&gpio2 RK_PA0 << 80 linux,default-trigger << 81 pinctrl-names = "defau << 82 pinctrl-0 = <&hdd4_led << 83 }; << 84 }; << 85 << 86 dc_12v: regulator-dc-12v { << 87 compatible = "regulator-fixed" << 88 regulator-name = "dc_12v"; << 89 regulator-always-on; << 90 regulator-boot-on; << 91 regulator-min-microvolt = <120 << 92 regulator-max-microvolt = <120 << 93 }; << 94 << 95 vcc3v3_pcie: regulator-vcc3v3-pcie { << 96 compatible = "regulator-fixed" << 97 regulator-name = "vcc3v3_pcie" << 98 regulator-min-microvolt = <330 << 99 regulator-max-microvolt = <330 << 100 enable-active-high; << 101 gpios = <&gpio0 RK_PD4 GPIO_AC << 102 vin-supply = <&dc_12v>; << 103 }; << 104 << 105 vcc3v3_sys: regulator-vcc3v3-sys { << 106 compatible = "regulator-fixed" << 107 regulator-name = "vcc3v3_sys"; << 108 regulator-always-on; << 109 regulator-boot-on; << 110 regulator-min-microvolt = <330 << 111 regulator-max-microvolt = <330 << 112 vin-supply = <&dc_12v>; << 113 }; << 114 << 115 vcc5v0_host: regulator-vcc5v0-host { << 116 compatible = "regulator-fixed" << 117 enable-active-high; << 118 pinctrl-names = "default"; << 119 pinctrl-0 = <&vcc5v0_host_en>; << 120 gpio = <&gpio0 RK_PA6 GPIO_ACT << 121 regulator-name = "vcc5v0_host" << 122 regulator-always-on; << 123 regulator-boot-on; << 124 regulator-min-microvolt = <500 << 125 regulator-max-microvolt = <500 << 126 vin-supply = <&vcc5v0_usb>; << 127 }; << 128 << 129 vcc5v0_otg: regulator-vcc5v0-otg { << 130 compatible = "regulator-fixed" << 131 enable-active-high; << 132 gpio = <&gpio0 RK_PA5 GPIO_ACT << 133 pinctrl-names = "default"; << 134 pinctrl-0 = <&vcc5v0_otg_en>; << 135 regulator-name = "vcc5v0_otg"; << 136 regulator-always-on; << 137 regulator-boot-on; << 138 regulator-min-microvolt = <500 << 139 regulator-max-microvolt = <500 << 140 vin-supply = <&vcc5v0_usb>; << 141 }; << 142 << 143 vcc5v0_sys: regulator-vcc5v0-sys { << 144 compatible = "regulator-fixed" << 145 regulator-name = "vcc5v0_sys"; << 146 regulator-always-on; << 147 regulator-boot-on; << 148 regulator-min-microvolt = <500 << 149 regulator-max-microvolt = <500 << 150 vin-supply = <&dc_12v>; << 151 }; << 152 << 153 vcc5v0_usb: regulator-vcc5v0-usb { << 154 compatible = "regulator-fixed" << 155 regulator-name = "vcc5v0_usb"; << 156 regulator-always-on; << 157 regulator-boot-on; << 158 regulator-min-microvolt = <500 << 159 regulator-max-microvolt = <500 << 160 vin-supply = <&dc_12v>; << 161 }; << 162 }; << 163 << 164 /* connected to usb_host0_xhci */ << 165 &combphy0 { << 166 status = "okay"; << 167 }; << 168 << 169 /* connected to sata1 */ << 170 &combphy1 { << 171 status = "okay"; << 172 }; << 173 << 174 /* connected to sata2 */ << 175 &combphy2 { << 176 status = "okay"; << 177 }; << 178 << 179 &cpu0 { << 180 cpu-supply = <&vdd_cpu>; << 181 }; << 182 << 183 &cpu1 { << 184 cpu-supply = <&vdd_cpu>; << 185 }; << 186 << 187 &cpu2 { << 188 cpu-supply = <&vdd_cpu>; << 189 }; << 190 << 191 &cpu3 { << 192 cpu-supply = <&vdd_cpu>; << 193 }; 15 }; 194 16 195 &gmac0 { 17 &gmac0 { 196 assigned-clocks = <&cru SCLK_GMAC0_RX_ 18 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 197 assigned-clock-parents = <&cru SCLK_GM 19 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; 198 assigned-clock-rates = <0>, <125000000 20 assigned-clock-rates = <0>, <125000000>; 199 clock_in_out = "output"; 21 clock_in_out = "output"; 200 phy-handle = <&rgmii_phy0>; 22 phy-handle = <&rgmii_phy0>; 201 phy-mode = "rgmii-id"; !! 23 phy-mode = "rgmii"; 202 pinctrl-names = "default"; 24 pinctrl-names = "default"; 203 pinctrl-0 = <&gmac0_miim 25 pinctrl-0 = <&gmac0_miim 204 &gmac0_tx_bus2 26 &gmac0_tx_bus2 205 &gmac0_rx_bus2 27 &gmac0_rx_bus2 206 &gmac0_rgmii_clk 28 &gmac0_rgmii_clk 207 &gmac0_rgmii_bus>; 29 &gmac0_rgmii_bus>; 208 status = "okay"; !! 30 rx_delay = <0x2f>; 209 }; !! 31 tx_delay = <0x3c>; 210 << 211 &gpu { << 212 mali-supply = <&vdd_gpu>; << 213 status = "okay"; 32 status = "okay"; 214 }; 33 }; 215 34 216 &i2c0 { 35 &i2c0 { 217 status = "okay"; << 218 << 219 pmic@20 { 36 pmic@20 { 220 compatible = "rockchip,rk809"; 37 compatible = "rockchip,rk809"; 221 reg = <0x20>; 38 reg = <0x20>; 222 interrupt-parent = <&gpio0>; 39 interrupt-parent = <&gpio0>; 223 interrupts = <RK_PA3 IRQ_TYPE_ !! 40 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 224 #clock-cells = <1>; << 225 pinctrl-names = "default"; << 226 pinctrl-0 = <&pmic_int_l>; << 227 system-power-controller; << 228 vcc1-supply = <&vcc3v3_sys>; << 229 vcc2-supply = <&vcc3v3_sys>; << 230 vcc3-supply = <&vcc3v3_sys>; << 231 vcc4-supply = <&vcc3v3_sys>; << 232 vcc5-supply = <&vcc3v3_sys>; << 233 vcc6-supply = <&vcc3v3_sys>; << 234 vcc7-supply = <&vcc3v3_sys>; << 235 vcc8-supply = <&vcc3v3_sys>; << 236 vcc9-supply = <&vcc3v3_sys>; << 237 wakeup-source; << 238 << 239 regulators { << 240 vdd_logic: DCDC_REG1 { << 241 regulator-name << 242 regulator-alwa << 243 regulator-boot << 244 regulator-init << 245 regulator-min- << 246 regulator-max- << 247 regulator-ramp << 248 << 249 regulator-stat << 250 regula << 251 }; << 252 }; << 253 << 254 vdd_gpu: DCDC_REG2 { << 255 regulator-name << 256 regulator-alwa << 257 regulator-init << 258 regulator-min- << 259 regulator-max- << 260 regulator-ramp << 261 << 262 regulator-stat << 263 regula << 264 }; << 265 }; << 266 << 267 vcc_ddr: DCDC_REG3 { << 268 regulator-name << 269 regulator-alwa << 270 regulator-boot << 271 regulator-init << 272 << 273 regulator-stat << 274 regula << 275 }; << 276 }; << 277 << 278 vdd_npu: DCDC_REG4 { << 279 regulator-name << 280 regulator-init << 281 regulator-min- << 282 regulator-max- << 283 regulator-ramp << 284 << 285 regulator-stat << 286 regula << 287 }; << 288 }; << 289 << 290 vcc_1v8: DCDC_REG5 { << 291 regulator-name << 292 regulator-alwa << 293 regulator-boot << 294 regulator-min- << 295 regulator-max- << 296 << 297 regulator-stat << 298 regula << 299 }; << 300 }; << 301 << 302 vdda0v9_image: LDO_REG << 303 regulator-name << 304 regulator-alwa << 305 regulator-min- << 306 regulator-max- << 307 << 308 regulator-stat << 309 regula << 310 }; << 311 }; << 312 << 313 vdda_0v9: LDO_REG2 { << 314 regulator-name << 315 regulator-alwa << 316 regulator-boot << 317 regulator-min- << 318 regulator-max- << 319 << 320 regulator-stat << 321 regula << 322 }; << 323 }; << 324 << 325 vdda0v9_pmu: LDO_REG3 << 326 regulator-name << 327 regulator-alwa << 328 regulator-boot << 329 regulator-min- << 330 regulator-max- << 331 << 332 regulator-stat << 333 regula << 334 regula << 335 }; << 336 }; << 337 << 338 vccio_acodec: LDO_REG4 << 339 regulator-name << 340 regulator-alwa << 341 regulator-boot << 342 regulator-min- << 343 regulator-max- << 344 << 345 regulator-stat << 346 regula << 347 }; << 348 }; << 349 << 350 vccio_sd: LDO_REG5 { << 351 regulator-name << 352 regulator-min- << 353 regulator-max- << 354 << 355 regulator-stat << 356 regula << 357 }; << 358 }; << 359 << 360 vcc3v3_pmu: LDO_REG6 { << 361 regulator-name << 362 regulator-alwa << 363 regulator-boot << 364 regulator-min- << 365 regulator-max- << 366 << 367 regulator-stat << 368 regula << 369 regula << 370 }; << 371 }; << 372 << 373 vcca_1v8: LDO_REG7 { << 374 regulator-name << 375 regulator-alwa << 376 regulator-boot << 377 regulator-min- << 378 regulator-max- << 379 << 380 regulator-stat << 381 regula << 382 }; << 383 }; << 384 << 385 vcca1v8_pmu: LDO_REG8 << 386 regulator-name << 387 regulator-alwa << 388 regulator-boot << 389 regulator-min- << 390 regulator-max- << 391 << 392 regulator-stat << 393 regula << 394 regula << 395 }; << 396 }; << 397 << 398 vcca1v8_image: LDO_REG << 399 regulator-name << 400 regulator-alwa << 401 regulator-min- << 402 regulator-max- << 403 << 404 regulator-stat << 405 regula << 406 }; << 407 }; << 408 << 409 vcc_3v3: SWITCH_REG1 { << 410 regulator-name << 411 regulator-alwa << 412 regulator-boot << 413 << 414 regulator-stat << 415 regula << 416 }; << 417 }; << 418 << 419 vcc3v3_sd: SWITCH_REG2 << 420 regulator-name << 421 /* << 422 * turning thi << 423 * PCIe contro << 424 */ << 425 regulator-alwa << 426 regulator-boot << 427 << 428 regulator-stat << 429 regula << 430 }; << 431 }; << 432 }; << 433 }; << 434 << 435 vdd_cpu: regulator@40 { << 436 compatible = "silergy,syr827"; << 437 reg = <0x40>; << 438 fcs,suspend-voltage-selector = << 439 regulator-name = "vdd_cpu"; << 440 regulator-always-on; << 441 regulator-boot-on; << 442 regulator-min-microvolt = <712 << 443 regulator-max-microvolt = <139 << 444 regulator-ramp-delay = <2300>; << 445 vin-supply = <&vcc5v0_sys>; << 446 }; 41 }; 447 }; 42 }; 448 43 449 &i2c1 { 44 &i2c1 { 450 status = "okay"; 45 status = "okay"; 451 46 452 rtc_rv8263: rtc@51 { !! 47 rtc@51 { 453 compatible = "microcrystal,rv8 48 compatible = "microcrystal,rv8263"; 454 reg = <0x51>; 49 reg = <0x51>; 455 wakeup-source; 50 wakeup-source; 456 }; 51 }; 457 << 458 /* eeprom for vital-product-data on th << 459 eeprom@54 { << 460 compatible = "giantec,gt24c04a << 461 reg = <0x54>; << 462 label = "VPD_MB"; << 463 num-addresses = <2>; << 464 pagesize = <16>; << 465 read-only; << 466 }; << 467 << 468 /* eeprom for vital-product-data on th << 469 eeprom@56 { << 470 compatible = "giantec,gt24c04a << 471 reg = <0x56>; << 472 label = "VPD_BP"; << 473 num-addresses = <2>; << 474 pagesize = <16>; << 475 read-only; << 476 }; << 477 }; 52 }; 478 53 479 &mdio0 { 54 &mdio0 { 480 rgmii_phy0: ethernet-phy@0 { 55 rgmii_phy0: ethernet-phy@0 { 481 compatible = "ethernet-phy-iee 56 compatible = "ethernet-phy-ieee802.3-c22"; 482 reg = <0x0>; 57 reg = <0x0>; 483 }; 58 }; 484 }; 59 }; 485 60 486 &pcie30phy { 61 &pcie30phy { 487 data-lanes = <1 2>; << 488 status = "okay"; 62 status = "okay"; 489 }; 63 }; 490 64 491 /* Connected to a JMicron AHCI SATA controller << 492 &pcie3x1 { 65 &pcie3x1 { >> 66 /* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */ 493 reset-gpios = <&gpio0 RK_PC7 GPIO_ACTI 67 reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 494 vpcie3v3-supply = <&vcc3v3_pcie>; << 495 status = "okay"; << 496 }; << 497 << 498 /* Connected to the 2.5G NIC for the upper net << 499 &pcie3x2 { << 500 num-lanes = <1>; << 501 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTI << 502 vpcie3v3-supply = <&vcc3v3_pcie>; << 503 status = "okay"; << 504 }; << 505 << 506 &pinctrl { << 507 keys { << 508 copy_button_pin: copy-button-p << 509 rockchip,pins = <0 RK_ << 510 }; << 511 << 512 reset_button_pin: reset-button << 513 rockchip,pins = <0 RK_ << 514 }; << 515 }; << 516 << 517 leds { << 518 hdd1_led_pin: hdd1-led-pin { << 519 rockchip,pins = <1 RK_ << 520 }; << 521 << 522 hdd2_led_pin: hdd2-led-pin { << 523 rockchip,pins = <1 RK_ << 524 }; << 525 << 526 hdd3_led_pin: hdd3-led-pin { << 527 rockchip,pins = <1 RK_ << 528 }; << 529 << 530 hdd4_led_pin: hdd4_led-pin { << 531 rockchip,pins = <2 RK_ << 532 }; << 533 }; << 534 << 535 pmic { << 536 pmic_int_l: pmic-int-l { << 537 rockchip,pins = <0 RK_ << 538 }; << 539 }; << 540 << 541 usb { << 542 vcc5v0_host_en: vcc5v0-host-en << 543 rockchip,pins = <0 RK_ << 544 }; << 545 << 546 vcc5v0_otg_en: vcc5v0-otg-en { << 547 rockchip,pins = <0 RK_ << 548 }; << 549 }; << 550 }; << 551 << 552 &pmu_io_domains { << 553 vccio4-supply = <&vcc_1v8>; << 554 vccio6-supply = <&vcc_1v8>; << 555 status = "okay"; << 556 }; << 557 << 558 &sata1 { << 559 status = "okay"; << 560 }; << 561 << 562 &sata2 { << 563 status = "okay"; 68 status = "okay"; 564 }; 69 }; 565 70 566 &sdhci { 71 &sdhci { 567 bus-width = <8>; 72 bus-width = <8>; 568 max-frequency = <200000000>; 73 max-frequency = <200000000>; 569 non-removable; 74 non-removable; 570 status = "okay"; 75 status = "okay"; 571 }; 76 }; 572 77 573 &tsadc { << 574 rockchip,hw-tshut-mode = <1>; << 575 rockchip,hw-tshut-polarity = <0>; << 576 status = "okay"; << 577 }; << 578 << 579 /* << 580 * Connected to an MCU, that provides access t << 581 * buzzer, fan control and more. << 582 */ << 583 &uart0 { << 584 status = "okay"; << 585 }; << 586 << 587 /* 78 /* 588 * Pins available on CN3 connector at TTL volt 79 * Pins available on CN3 connector at TTL voltage level (3V3). 589 * ,_ _. 80 * ,_ _. 590 * |1234| 1=TX 2=VCC 81 * |1234| 1=TX 2=VCC 591 * `----' 3=RX 4=GND 82 * `----' 3=RX 4=GND 592 */ 83 */ 593 &uart2 { 84 &uart2 { 594 status = "okay"; << 595 }; << 596 << 597 &usb2phy0 { << 598 status = "okay"; << 599 }; << 600 << 601 /* connected to usb_host0_xhci */ << 602 &usb2phy0_otg { << 603 phy-supply = <&vcc5v0_otg>; << 604 status = "okay"; << 605 }; << 606 << 607 &usb2phy1 { << 608 status = "okay"; << 609 }; << 610 << 611 /* connected to usb_host1_ehci/ohci */ << 612 &usb2phy1_host { << 613 phy-supply = <&vcc5v0_host>; << 614 status = "okay"; << 615 }; << 616 << 617 /* connected to usb_host0_ehci/ohci */ << 618 &usb2phy1_otg { << 619 phy-supply = <&vcc5v0_host>; << 620 status = "okay"; << 621 }; << 622 << 623 /* right port backside */ << 624 &usb_host0_ehci { << 625 status = "okay"; << 626 }; << 627 << 628 &usb_host0_ohci { << 629 status = "okay"; << 630 }; << 631 << 632 /* front port */ << 633 &usb_host0_xhci { << 634 dr_mode = "host"; << 635 status = "okay"; << 636 }; << 637 << 638 /* left port backside */ << 639 &usb_host1_ehci { << 640 status = "okay"; << 641 }; << 642 << 643 &usb_host1_ohci { << 644 status = "okay"; 85 status = "okay"; 645 }; 86 };
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