1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 2
3 /dts-v1/; 3 /dts-v1/;
4 #include "rk3568-radxa-cm3i.dtsi" 4 #include "rk3568-radxa-cm3i.dtsi"
5 5
6 / { 6 / {
7 model = "Radxa E25 Carrier Board"; 7 model = "Radxa E25 Carrier Board";
8 compatible = "radxa,e25", "radxa,cm3i" 8 compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
9 9
10 aliases { 10 aliases {
11 mmc1 = &sdmmc0; 11 mmc1 = &sdmmc0;
12 }; 12 };
13 13
14 pwm-leds { 14 pwm-leds {
15 compatible = "pwm-leds-multico 15 compatible = "pwm-leds-multicolor";
16 16
17 multi-led { 17 multi-led {
18 color = <LED_COLOR_ID_ 18 color = <LED_COLOR_ID_RGB>;
19 max-brightness = <255> 19 max-brightness = <255>;
20 20
21 led-red { 21 led-red {
22 color = <LED_C 22 color = <LED_COLOR_ID_RED>;
23 pwms = <&pwm1 23 pwms = <&pwm1 0 1000000 0>;
24 }; 24 };
25 25
26 led-green { 26 led-green {
27 color = <LED_C 27 color = <LED_COLOR_ID_GREEN>;
28 pwms = <&pwm2 28 pwms = <&pwm2 0 1000000 0>;
29 }; 29 };
30 30
31 led-blue { 31 led-blue {
32 color = <LED_C 32 color = <LED_COLOR_ID_BLUE>;
33 pwms = <&pwm12 33 pwms = <&pwm12 0 1000000 0>;
34 }; 34 };
35 }; 35 };
36 }; 36 };
37 37
38 vbus_typec: vbus-typec-regulator { 38 vbus_typec: vbus-typec-regulator {
39 compatible = "regulator-fixed" 39 compatible = "regulator-fixed";
40 enable-active-high; 40 enable-active-high;
41 gpio = <&gpio0 RK_PB7 GPIO_ACT 41 gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
42 pinctrl-names = "default"; 42 pinctrl-names = "default";
43 pinctrl-0 = <&vbus_typec_en>; 43 pinctrl-0 = <&vbus_typec_en>;
44 regulator-name = "vbus_typec"; 44 regulator-name = "vbus_typec";
45 regulator-min-microvolt = <500 45 regulator-min-microvolt = <5000000>;
46 regulator-max-microvolt = <500 46 regulator-max-microvolt = <5000000>;
47 vin-supply = <&vcc5v0_sys>; 47 vin-supply = <&vcc5v0_sys>;
48 }; 48 };
49 49
50 /* actually fed by vcc5v0_sys, depende <<
51 * on pi6c clock generator <<
52 */ <<
53 vcc3v3_minipcie: vcc3v3-minipcie-regul 50 vcc3v3_minipcie: vcc3v3-minipcie-regulator {
54 compatible = "regulator-fixed" 51 compatible = "regulator-fixed";
55 enable-active-high; 52 enable-active-high;
56 gpio = <&gpio3 RK_PA7 GPIO_ACT 53 gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
57 pinctrl-names = "default"; 54 pinctrl-names = "default";
58 pinctrl-0 = <&minipcie_enable_ 55 pinctrl-0 = <&minipcie_enable_h>;
59 regulator-name = "vcc3v3_minip 56 regulator-name = "vcc3v3_minipcie";
60 regulator-min-microvolt = <330 !! 57 regulator-min-microvolt = <5000000>;
61 regulator-max-microvolt = <330 !! 58 regulator-max-microvolt = <5000000>;
62 vin-supply = <&vcc3v3_pi6c_05> !! 59 vin-supply = <&vcc5v0_sys>;
63 }; 60 };
64 61
65 vcc3v3_ngff: vcc3v3-ngff-regulator { 62 vcc3v3_ngff: vcc3v3-ngff-regulator {
66 compatible = "regulator-fixed" 63 compatible = "regulator-fixed";
67 enable-active-high; 64 enable-active-high;
68 gpio = <&gpio0 RK_PD6 GPIO_ACT 65 gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
69 pinctrl-names = "default"; 66 pinctrl-names = "default";
70 pinctrl-0 = <&ngffpcie_enable_ 67 pinctrl-0 = <&ngffpcie_enable_h>;
71 regulator-name = "vcc3v3_ngff" 68 regulator-name = "vcc3v3_ngff";
72 regulator-min-microvolt = <330 69 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <330 70 regulator-max-microvolt = <3300000>;
74 vin-supply = <&vcc5v0_sys>; 71 vin-supply = <&vcc5v0_sys>;
75 }; 72 };
76 73
>> 74 /* actually fed by vcc5v0_sys, dependent
>> 75 * on pi6c clock generator
>> 76 */
77 vcc3v3_pcie30x1: vcc3v3-pcie30x1-regul 77 vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
78 compatible = "regulator-fixed" 78 compatible = "regulator-fixed";
79 enable-active-high; 79 enable-active-high;
80 gpio = <&gpio0 RK_PC5 GPIO_ACT 80 gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
81 pinctrl-names = "default"; 81 pinctrl-names = "default";
82 pinctrl-0 = <&pcie30x1_enable_ 82 pinctrl-0 = <&pcie30x1_enable_h>;
83 regulator-name = "vcc3v3_pcie3 83 regulator-name = "vcc3v3_pcie30x1";
84 regulator-min-microvolt = <330 84 regulator-min-microvolt = <3300000>;
85 regulator-max-microvolt = <330 85 regulator-max-microvolt = <3300000>;
86 vin-supply = <&vcc5v0_sys>; !! 86 vin-supply = <&vcc3v3_pi6c_05>;
87 }; 87 };
88 88
89 vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulat 89 vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
90 compatible = "regulator-fixed" 90 compatible = "regulator-fixed";
91 enable-active-high; 91 enable-active-high;
92 gpios = <&gpio0 RK_PC7 GPIO_AC 92 gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
93 pinctrl-names = "default"; 93 pinctrl-names = "default";
94 pinctrl-0 = <&pcie_enable_h>; 94 pinctrl-0 = <&pcie_enable_h>;
95 regulator-name = "vcc3v3_pcie" 95 regulator-name = "vcc3v3_pcie";
96 regulator-min-microvolt = <330 96 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <330 97 regulator-max-microvolt = <3300000>;
98 vin-supply = <&vcc5v0_sys>; 98 vin-supply = <&vcc5v0_sys>;
99 }; 99 };
100 }; 100 };
101 101
102 &combphy1 { <<
103 phy-supply = <&vcc3v3_pcie30x1>; <<
104 }; <<
105 <<
106 &display_subsystem { <<
107 status = "disabled"; <<
108 }; <<
109 <<
110 &pcie2x1 { 102 &pcie2x1 {
111 pinctrl-names = "default"; 103 pinctrl-names = "default";
112 pinctrl-0 = <&pcie20_reset_h>; 104 pinctrl-0 = <&pcie20_reset_h>;
113 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTI 105 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
114 vpcie3v3-supply = <&vcc3v3_pi6c_05>; 106 vpcie3v3-supply = <&vcc3v3_pi6c_05>;
115 status = "okay"; 107 status = "okay";
116 }; 108 };
117 109
118 &pcie30phy { 110 &pcie30phy {
119 data-lanes = <1 2>; 111 data-lanes = <1 2>;
120 status = "okay"; 112 status = "okay";
121 }; 113 };
122 114
123 &pcie3x1 { 115 &pcie3x1 {
124 num-lanes = <1>; 116 num-lanes = <1>;
125 pinctrl-names = "default"; 117 pinctrl-names = "default";
126 pinctrl-0 = <&pcie30x1m0_pins>; 118 pinctrl-0 = <&pcie30x1m0_pins>;
127 reset-gpios = <&gpio0 RK_PC3 GPIO_ACTI 119 reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
128 vpcie3v3-supply = <&vcc3v3_minipcie>; !! 120 vpcie3v3-supply = <&vcc3v3_pcie30x1>;
129 status = "okay"; 121 status = "okay";
130 }; 122 };
131 123
132 &pcie3x2 { 124 &pcie3x2 {
133 num-lanes = <1>; 125 num-lanes = <1>;
134 pinctrl-names = "default"; 126 pinctrl-names = "default";
135 pinctrl-0 = <&pcie30x2_reset_h>; 127 pinctrl-0 = <&pcie30x2_reset_h>;
136 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTI 128 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
137 vpcie3v3-supply = <&vcc3v3_pi6c_05>; 129 vpcie3v3-supply = <&vcc3v3_pi6c_05>;
138 status = "okay"; 130 status = "okay";
139 }; 131 };
140 132
141 &pinctrl { 133 &pinctrl {
142 pcie { 134 pcie {
143 pcie20_reset_h: pcie20-reset-h 135 pcie20_reset_h: pcie20-reset-h {
144 rockchip,pins = <1 RK_ 136 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
145 }; 137 };
146 138
147 pcie30x1_enable_h: pcie30x1-en 139 pcie30x1_enable_h: pcie30x1-enable-h {
148 rockchip,pins = <0 RK_ 140 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
149 }; 141 };
150 142
151 pcie30x2_reset_h: pcie30x2-res 143 pcie30x2_reset_h: pcie30x2-reset-h {
152 rockchip,pins = <2 RK_ 144 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
153 }; 145 };
154 146
155 pcie_enable_h: pcie-enable-h { 147 pcie_enable_h: pcie-enable-h {
156 rockchip,pins = <0 RK_ 148 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
157 }; 149 };
158 }; 150 };
159 151
160 usb { 152 usb {
161 minipcie_enable_h: minipcie-en 153 minipcie_enable_h: minipcie-enable-h {
162 rockchip,pins = <3 RK_ 154 rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
163 }; 155 };
164 156
165 ngffpcie_enable_h: ngffpcie-en 157 ngffpcie_enable_h: ngffpcie-enable-h {
166 rockchip,pins = <0 RK_ 158 rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
167 }; 159 };
168 160
169 vbus_typec_en: vbus_typec_en { 161 vbus_typec_en: vbus_typec_en {
170 rockchip,pins = <0 RK_ 162 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
171 }; 163 };
172 }; 164 };
173 }; 165 };
174 166
175 &pwm1 { 167 &pwm1 {
176 status = "okay"; 168 status = "okay";
177 }; 169 };
178 170
179 &pwm2 { 171 &pwm2 {
180 status = "okay"; 172 status = "okay";
181 }; 173 };
182 174
183 &pwm12 { 175 &pwm12 {
184 pinctrl-names = "default"; 176 pinctrl-names = "default";
185 pinctrl-0 = <&pwm12m1_pins>; 177 pinctrl-0 = <&pwm12m1_pins>;
186 status = "okay"; <<
187 }; <<
188 <<
189 &sata1 { <<
190 status = "okay"; 178 status = "okay";
191 }; 179 };
192 180
193 &sdmmc0 { 181 &sdmmc0 {
194 bus-width = <4>; 182 bus-width = <4>;
195 cap-sd-highspeed; 183 cap-sd-highspeed;
196 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_ 184 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
197 /* Also used in pcie30x1_clkreqnm0 */ 185 /* Also used in pcie30x1_clkreqnm0 */
198 disable-wp; 186 disable-wp;
199 pinctrl-names = "default"; 187 pinctrl-names = "default";
200 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk 188 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
201 sd-uhs-sdr104; 189 sd-uhs-sdr104;
202 vmmc-supply = <&vcc3v3_sd>; 190 vmmc-supply = <&vcc3v3_sd>;
203 vqmmc-supply = <&vccio_sd>; 191 vqmmc-supply = <&vccio_sd>;
204 status = "okay"; 192 status = "okay";
205 }; 193 };
206 194
207 &usb_host0_ehci { 195 &usb_host0_ehci {
208 status = "okay"; 196 status = "okay";
209 }; 197 };
210 198
211 &usb_host0_ohci { 199 &usb_host0_ohci {
212 status = "okay"; 200 status = "okay";
213 }; 201 };
214 202
215 &usb_host0_xhci { 203 &usb_host0_xhci {
216 status = "okay"; 204 status = "okay";
217 }; 205 };
218 206
219 &usb_host1_ehci { 207 &usb_host1_ehci {
220 status = "okay"; 208 status = "okay";
221 }; 209 };
222 210
223 &usb_host1_ohci { 211 &usb_host1_ohci {
224 status = "okay"; 212 status = "okay";
225 }; 213 };
226 214
227 &usb2phy0_otg { 215 &usb2phy0_otg {
228 phy-supply = <&vbus_typec>; 216 phy-supply = <&vbus_typec>;
229 status = "okay"; 217 status = "okay";
230 }; 218 };
231 219
232 &usb2phy1_host { 220 &usb2phy1_host {
233 phy-supply = <&vcc3v3_minipcie>; 221 phy-supply = <&vcc3v3_minipcie>;
234 status = "okay"; 222 status = "okay";
235 }; 223 };
236 224
237 &usb2phy1_otg { 225 &usb2phy1_otg {
238 phy-supply = <&vcc3v3_ngff>; 226 phy-supply = <&vcc3v3_ngff>;
239 status = "okay"; 227 status = "okay";
240 }; 228 };
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