1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
8 #include "rk3568.dtsi"
9
10 / {
11 model = "Radxa ROCK 3A";
12 compatible = "radxa,rock3a", "rockchip
13
14 aliases {
15 ethernet0 = &gmac1;
16 mmc0 = &sdhci;
17 mmc1 = &sdmmc0;
18 mmc2 = &sdmmc2;
19 };
20
21 chosen: chosen {
22 stdout-path = "serial2:1500000
23 };
24
25 hdmi-con {
26 compatible = "hdmi-connector";
27 type = "a";
28
29 port {
30 hdmi_con_in: endpoint
31 remote-endpoin
32 };
33 };
34 };
35
36 gmac1_clkin: external-gmac1-clock {
37 compatible = "fixed-clock";
38 clock-frequency = <125000000>;
39 clock-output-names = "gmac1_cl
40 #clock-cells = <0>;
41 };
42
43 leds {
44 compatible = "gpio-leds";
45
46 led_user: led-0 {
47 gpios = <&gpio0 RK_PB7
48 function = LED_FUNCTIO
49 color = <LED_COLOR_ID_
50 linux,default-trigger
51 pinctrl-names = "defau
52 pinctrl-0 = <&led_user
53 };
54 };
55
56 rk809-sound {
57 compatible = "simple-audio-car
58 simple-audio-card,format = "i2
59 simple-audio-card,name = "Anal
60 simple-audio-card,mclk-fs = <2
61
62 simple-audio-card,cpu {
63 sound-dai = <&i2s1_8ch
64 };
65
66 simple-audio-card,codec {
67 sound-dai = <&rk809>;
68 };
69 };
70
71 sdio_pwrseq: sdio-pwrseq {
72 compatible = "mmc-pwrseq-simpl
73 clocks = <&rk809 1>;
74 clock-names = "ext_clock";
75 pinctrl-names = "default";
76 pinctrl-0 = <&wifi_enable>;
77 post-power-on-delay-ms = <100>
78 power-off-delay-us = <5000000>
79 reset-gpios = <&gpio3 RK_PD4 G
80 };
81
82 vcc12v_dcin: vcc12v-dcin-regulator {
83 compatible = "regulator-fixed"
84 regulator-name = "vcc12v_dcin"
85 regulator-always-on;
86 regulator-boot-on;
87 };
88
89 pcie30_avdd0v9: pcie30-avdd0v9-regulat
90 compatible = "regulator-fixed"
91 regulator-name = "pcie30_avdd0
92 regulator-always-on;
93 regulator-boot-on;
94 regulator-min-microvolt = <900
95 regulator-max-microvolt = <900
96 vin-supply = <&vcc3v3_sys>;
97 };
98
99 pcie30_avdd1v8: pcie30-avdd1v8-regulat
100 compatible = "regulator-fixed"
101 regulator-name = "pcie30_avdd1
102 regulator-always-on;
103 regulator-boot-on;
104 regulator-min-microvolt = <180
105 regulator-max-microvolt = <180
106 vin-supply = <&vcc3v3_sys>;
107 };
108
109 /* pi6c pcie clock generator */
110 vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulat
111 compatible = "regulator-fixed"
112 regulator-name = "vcc3v3_pi6c_
113 regulator-always-on;
114 regulator-boot-on;
115 regulator-min-microvolt = <330
116 regulator-max-microvolt = <330
117 vin-supply = <&vcc5v0_sys>;
118 };
119
120 vcc3v3_pcie: vcc3v3-pcie-regulator {
121 compatible = "regulator-fixed"
122 enable-active-high;
123 gpios = <&gpio0 RK_PD4 GPIO_AC
124 pinctrl-names = "default";
125 pinctrl-0 = <&pcie_enable_h>;
126 regulator-name = "vcc3v3_pcie"
127 regulator-min-microvolt = <330
128 regulator-max-microvolt = <330
129 vin-supply = <&vcc5v0_sys>;
130 };
131
132 vcc3v3_sys: vcc3v3-sys-regulator {
133 compatible = "regulator-fixed"
134 regulator-name = "vcc3v3_sys";
135 regulator-always-on;
136 regulator-boot-on;
137 regulator-min-microvolt = <330
138 regulator-max-microvolt = <330
139 vin-supply = <&vcc12v_dcin>;
140 };
141
142 vcc5v0_sys: vcc5v0-sys-regulator {
143 compatible = "regulator-fixed"
144 regulator-name = "vcc5v0_sys";
145 regulator-always-on;
146 regulator-boot-on;
147 regulator-min-microvolt = <500
148 regulator-max-microvolt = <500
149 vin-supply = <&vcc12v_dcin>;
150 };
151
152 vcc5v0_usb: vcc5v0-usb-regulator {
153 compatible = "regulator-fixed"
154 regulator-name = "vcc5v0_usb";
155 regulator-always-on;
156 regulator-boot-on;
157 regulator-min-microvolt = <500
158 regulator-max-microvolt = <500
159 vin-supply = <&vcc12v_dcin>;
160 };
161
162 vcc5v0_usb_host: vcc5v0-usb-host-regul
163 compatible = "regulator-fixed"
164 enable-active-high;
165 gpio = <&gpio0 RK_PA6 GPIO_ACT
166 pinctrl-names = "default";
167 pinctrl-0 = <&vcc5v0_usb_host_
168 regulator-name = "vcc5v0_usb_h
169 regulator-min-microvolt = <500
170 regulator-max-microvolt = <500
171 vin-supply = <&vcc5v0_usb>;
172 };
173
174 vcc5v0_usb_hub: vcc5v0-usb-hub-regulat
175 compatible = "regulator-fixed"
176 enable-active-high;
177 gpio = <&gpio0 RK_PD5 GPIO_ACT
178 pinctrl-names = "default";
179 pinctrl-0 = <&vcc5v0_usb_hub_e
180 regulator-name = "vcc5v0_usb_h
181 regulator-always-on;
182 vin-supply = <&vcc5v0_usb>;
183 };
184
185 vcc5v0_usb_otg: vcc5v0-usb-otg-regulat
186 compatible = "regulator-fixed"
187 enable-active-high;
188 gpio = <&gpio0 RK_PA5 GPIO_ACT
189 pinctrl-names = "default";
190 pinctrl-0 = <&vcc5v0_usb_otg_e
191 regulator-name = "vcc5v0_usb_o
192 regulator-min-microvolt = <500
193 regulator-max-microvolt = <500
194 vin-supply = <&vcc5v0_usb>;
195 };
196
197 vcc_cam: vcc-cam-regulator {
198 compatible = "regulator-fixed"
199 enable-active-high;
200 gpio = <&gpio1 RK_PB1 GPIO_ACT
201 pinctrl-names = "default";
202 pinctrl-0 = <&vcc_cam_en>;
203 regulator-name = "vcc_cam";
204 regulator-min-microvolt = <330
205 regulator-max-microvolt = <330
206 vin-supply = <&vcc3v3_sys>;
207
208 regulator-state-mem {
209 regulator-off-in-suspe
210 };
211 };
212
213 vcc_mipi: vcc-mipi-regulator {
214 compatible = "regulator-fixed"
215 enable-active-high;
216 gpio = <&gpio3 RK_PC0 GPIO_ACT
217 pinctrl-names = "default";
218 pinctrl-0 = <&vcc_mipi_en>;
219 regulator-name = "vcc_mipi";
220 regulator-min-microvolt = <330
221 regulator-max-microvolt = <330
222 vin-supply = <&vcc3v3_sys>;
223
224 regulator-state-mem {
225 regulator-off-in-suspe
226 };
227 };
228 };
229
230 &combphy0 {
231 status = "okay";
232 };
233
234 &combphy1 {
235 status = "okay";
236 };
237
238 &combphy2 {
239 status = "okay";
240 };
241
242 &cpu0 {
243 cpu-supply = <&vdd_cpu>;
244 };
245
246 &cpu1 {
247 cpu-supply = <&vdd_cpu>;
248 };
249
250 &cpu2 {
251 cpu-supply = <&vdd_cpu>;
252 };
253
254 &cpu3 {
255 cpu-supply = <&vdd_cpu>;
256 };
257
258 &gmac1 {
259 assigned-clocks = <&cru SCLK_GMAC1_RX_
260 assigned-clock-parents = <&cru SCLK_GM
261 clock_in_out = "input";
262 phy-handle = <&rgmii_phy1>;
263 phy-mode = "rgmii-id";
264 phy-supply = <&vcc_3v3>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&gmac1m1_miim
267 &gmac1m1_tx_bus2
268 &gmac1m1_rx_bus2
269 &gmac1m1_rgmii_clk
270 &gmac1m1_clkinout
271 &gmac1m1_rgmii_bus>;
272 status = "okay";
273 };
274
275 &gpu {
276 mali-supply = <&vdd_gpu>;
277 status = "okay";
278 };
279
280 &hdmi {
281 avdd-0v9-supply = <&vdda0v9_image>;
282 avdd-1v8-supply = <&vcca1v8_image>;
283 pinctrl-names = "default";
284 pinctrl-0 = <&hdmitx_scl &hdmitx_sda &
285 status = "okay";
286 };
287
288 &hdmi_in {
289 hdmi_in_vp0: endpoint {
290 remote-endpoint = <&vp0_out_hd
291 };
292 };
293
294 &hdmi_out {
295 hdmi_out_con: endpoint {
296 remote-endpoint = <&hdmi_con_i
297 };
298 };
299
300 &hdmi_sound {
301 status = "okay";
302 };
303
304 &i2c0 {
305 status = "okay";
306
307 vdd_cpu: regulator@1c {
308 compatible = "tcs,tcs4525";
309 reg = <0x1c>;
310 fcs,suspend-voltage-selector =
311 regulator-name = "vdd_cpu";
312 regulator-always-on;
313 regulator-boot-on;
314 regulator-min-microvolt = <800
315 regulator-max-microvolt = <115
316 regulator-ramp-delay = <2300>;
317 vin-supply = <&vcc5v0_sys>;
318
319 regulator-state-mem {
320 regulator-off-in-suspe
321 };
322 };
323
324 rk809: pmic@20 {
325 compatible = "rockchip,rk809";
326 reg = <0x20>;
327 interrupt-parent = <&gpio0>;
328 interrupts = <RK_PA3 IRQ_TYPE_
329 assigned-clocks = <&cru I2S1_M
330 assigned-clock-parents = <&cru
331 #clock-cells = <1>;
332 clock-names = "mclk";
333 clocks = <&cru I2S1_MCLKOUT_TX
334 pinctrl-names = "default";
335 pinctrl-0 = <&pmic_int>, <&i2s
336 rockchip,system-power-controll
337 #sound-dai-cells = <0>;
338 vcc1-supply = <&vcc3v3_sys>;
339 vcc2-supply = <&vcc3v3_sys>;
340 vcc3-supply = <&vcc3v3_sys>;
341 vcc4-supply = <&vcc3v3_sys>;
342 vcc5-supply = <&vcc3v3_sys>;
343 vcc6-supply = <&vcc3v3_sys>;
344 vcc7-supply = <&vcc3v3_sys>;
345 vcc8-supply = <&vcc3v3_sys>;
346 vcc9-supply = <&vcc3v3_sys>;
347 wakeup-source;
348
349 regulators {
350 vdd_logic: DCDC_REG1 {
351 regulator-name
352 regulator-alwa
353 regulator-boot
354 regulator-init
355 regulator-min-
356 regulator-max-
357 regulator-ramp
358
359 regulator-stat
360 regula
361 };
362 };
363
364 vdd_gpu: DCDC_REG2 {
365 regulator-name
366 regulator-alwa
367 regulator-init
368 regulator-min-
369 regulator-max-
370 regulator-ramp
371
372 regulator-stat
373 regula
374 };
375 };
376
377 vcc_ddr: DCDC_REG3 {
378 regulator-name
379 regulator-alwa
380 regulator-boot
381 regulator-init
382
383 regulator-stat
384 regula
385 };
386 };
387
388 vdd_npu: DCDC_REG4 {
389 regulator-name
390 regulator-init
391 regulator-min-
392 regulator-max-
393 regulator-ramp
394
395 regulator-stat
396 regula
397 };
398 };
399
400 vcc_1v8: DCDC_REG5 {
401 regulator-name
402 regulator-alwa
403 regulator-boot
404 regulator-min-
405 regulator-max-
406
407 regulator-stat
408 regula
409 };
410 };
411
412 vdda0v9_image: LDO_REG
413 regulator-name
414 regulator-min-
415 regulator-max-
416
417 regulator-stat
418 regula
419 };
420 };
421
422 vdda_0v9: LDO_REG2 {
423 regulator-name
424 regulator-alwa
425 regulator-boot
426 regulator-min-
427 regulator-max-
428
429 regulator-stat
430 regula
431 };
432 };
433
434 vdda0v9_pmu: LDO_REG3
435 regulator-name
436 regulator-alwa
437 regulator-boot
438 regulator-min-
439 regulator-max-
440
441 regulator-stat
442 regula
443 regula
444 };
445 };
446
447 vccio_acodec: LDO_REG4
448 regulator-name
449 regulator-alwa
450 regulator-min-
451 regulator-max-
452
453 regulator-stat
454 regula
455 };
456 };
457
458 vccio_sd: LDO_REG5 {
459 regulator-name
460 regulator-min-
461 regulator-max-
462
463 regulator-stat
464 regula
465 };
466 };
467
468 vcc3v3_pmu: LDO_REG6 {
469 regulator-name
470 regulator-alwa
471 regulator-boot
472 regulator-min-
473 regulator-max-
474
475 regulator-stat
476 regula
477 regula
478 };
479 };
480
481 vcca_1v8: LDO_REG7 {
482 regulator-name
483 regulator-alwa
484 regulator-boot
485 regulator-min-
486 regulator-max-
487
488 regulator-stat
489 regula
490 };
491 };
492
493 vcca1v8_pmu: LDO_REG8
494 regulator-name
495 regulator-alwa
496 regulator-boot
497 regulator-min-
498 regulator-max-
499
500 regulator-stat
501 regula
502 regula
503 };
504 };
505
506 vcca1v8_image: LDO_REG
507 regulator-name
508 regulator-min-
509 regulator-max-
510
511 regulator-stat
512 regula
513 };
514 };
515
516 vcc_3v3: SWITCH_REG1 {
517 regulator-name
518 regulator-alwa
519 regulator-boot
520
521 regulator-stat
522 regula
523 };
524 };
525
526 vcc3v3_sd: SWITCH_REG2
527 regulator-name
528
529 regulator-stat
530 regula
531 };
532 };
533 };
534 };
535 };
536
537 &i2c3 {
538 pinctrl-names = "default";
539 pinctrl-0 = <&i2c3m1_xfer>;
540 status = "disabled";
541 };
542
543 &i2c4 {
544 pinctrl-names = "default";
545 pinctrl-0 = <&i2c4m1_xfer>;
546 status = "disabled";
547 };
548
549 &i2c5 {
550 status = "okay";
551
552 hym8563: rtc@51 {
553 compatible = "haoyu,hym8563";
554 reg = <0x51>;
555 interrupt-parent = <&gpio0>;
556 interrupts = <RK_PD3 IRQ_TYPE_
557 #clock-cells = <0>;
558 clock-output-names = "rtcic_32
559 pinctrl-names = "default";
560 pinctrl-0 = <&hym8563_int>;
561 wakeup-source;
562 };
563 };
564
565 &i2s0_8ch {
566 status = "okay";
567 };
568
569 &i2s1_8ch {
570 pinctrl-names = "default";
571 pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lr
572 rockchip,trcm-sync-tx-only;
573 status = "okay";
574 };
575
576 &i2s2_2ch {
577 rockchip,trcm-sync-tx-only;
578 status = "okay";
579 };
580
581 &mdio1 {
582 rgmii_phy1: ethernet-phy@0 {
583 compatible = "ethernet-phy-iee
584 reg = <0x0>;
585 pinctrl-names = "default";
586 pinctrl-0 = <ð_phy_rst>;
587 reset-assert-us = <20000>;
588 reset-deassert-us = <100000>;
589 reset-gpios = <&gpio3 RK_PB0 G
590 };
591 };
592
593 &pcie2x1 {
594 pinctrl-names = "default";
595 pinctrl-0 = <&pcie_reset_h>;
596 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTI
597 vpcie3v3-supply = <&vcc3v3_pcie>;
598 status = "okay";
599 };
600
601 &pcie30phy {
602 phy-supply = <&vcc3v3_pi6c_03>;
603 status = "okay";
604 };
605
606 &pcie3x2 {
607 pinctrl-names = "default";
608 pinctrl-0 = <&pcie30x2m1_pins>;
609 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTI
610 vpcie3v3-supply = <&vcc3v3_pcie>;
611 status = "okay";
612 };
613
614 &pinctrl {
615 cam {
616 vcc_cam_en: vcc_cam_en {
617 rockchip,pins = <1 RK_
618 };
619 };
620
621 display {
622 vcc_mipi_en: vcc_mipi_en {
623 rockchip,pins = <3 RK_
624 };
625 };
626
627 ethernet {
628 eth_phy_rst: eth_phy_rst {
629 rockchip,pins = <3 RK_
630 };
631 };
632
633 hym8563 {
634 hym8563_int: hym8563-int {
635 rockchip,pins = <0 RK_
636 };
637 };
638
639 leds {
640 led_user_en: led_user_en {
641 rockchip,pins = <0 RK_
642 };
643 };
644
645 pcie {
646 pcie_enable_h: pcie-enable-h {
647 rockchip,pins = <0 RK_
648 };
649
650 pcie_reset_h: pcie-reset-h {
651 rockchip,pins = <3 RK_
652 };
653 };
654
655 pmic {
656 pmic_int: pmic_int {
657 rockchip,pins =
658 <0 RK_PA3 RK_F
659 };
660 };
661
662 usb {
663 vcc5v0_usb_host_en: vcc5v0_usb
664 rockchip,pins = <0 RK_
665 };
666 vcc5v0_usb_hub_en: vcc5v0_usb_
667 rockchip,pins = <0 RK_
668 };
669 vcc5v0_usb_otg_en: vcc5v0_usb_
670 rockchip,pins = <0 RK_
671 };
672 };
673
674 bt {
675 bt_enable: bt-enable {
676 rockchip,pins = <4 RK_
677 };
678
679 bt_host_wake: bt-host-wake {
680 rockchip,pins = <4 RK_
681 };
682
683 bt_wake: bt-wake {
684 rockchip,pins = <4 RK_
685 };
686 };
687
688 sdio-pwrseq {
689 wifi_enable: wifi-enable {
690 rockchip,pins = <3 RK_
691 };
692 };
693 };
694
695 &pmu_io_domains {
696 pmuio1-supply = <&vcc3v3_pmu>;
697 pmuio2-supply = <&vcc3v3_pmu>;
698 vccio1-supply = <&vccio_acodec>;
699 vccio2-supply = <&vcc_1v8>;
700 vccio3-supply = <&vccio_sd>;
701 vccio4-supply = <&vcc_1v8>;
702 vccio5-supply = <&vcc_3v3>;
703 vccio6-supply = <&vcc_1v8>;
704 vccio7-supply = <&vcc_3v3>;
705 status = "okay";
706 };
707
708 &saradc {
709 vref-supply = <&vcca_1v8>;
710 status = "okay";
711 };
712
713 &sdhci {
714 bus-width = <8>;
715 max-frequency = <200000000>;
716 non-removable;
717 pinctrl-names = "default";
718 pinctrl-0 = <&emmc_bus8 &emmc_clk &emm
719 vmmc-supply = <&vcc_3v3>;
720 vqmmc-supply = <&vcc_1v8>;
721 status = "okay";
722 };
723
724 &sdmmc0 {
725 bus-width = <4>;
726 cap-sd-highspeed;
727 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_
728 disable-wp;
729 pinctrl-names = "default";
730 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk
731 sd-uhs-sdr50;
732 vmmc-supply = <&vcc3v3_sd>;
733 vqmmc-supply = <&vccio_sd>;
734 status = "okay";
735 };
736
737 &sdmmc2 {
738 bus-width = <4>;
739 disable-wp;
740 cap-sd-highspeed;
741 cap-sdio-irq;
742 keep-power-in-suspend;
743 mmc-pwrseq = <&sdio_pwrseq>;
744 non-removable;
745 pinctrl-names = "default";
746 pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_
747 sd-uhs-sdr12;
748 sd-uhs-sdr25;
749 sd-uhs-sdr50;
750 sd-uhs-sdr104;
751 vmmc-supply = <&vcc3v3_sys>;
752 vqmmc-supply = <&vcc_1v8>;
753 status = "okay";
754 };
755
756 &sfc {
757 #address-cells = <1>;
758 #size-cells = <0>;
759 status = "okay";
760
761 flash@0 {
762 compatible = "jedec,spi-nor";
763 reg = <0x0>;
764 spi-max-frequency = <104000000
765 spi-rx-bus-width = <4>;
766 spi-tx-bus-width = <1>;
767 };
768 };
769
770 &tsadc {
771 rockchip,hw-tshut-mode = <1>;
772 rockchip,hw-tshut-polarity = <0>;
773 status = "okay";
774 };
775
776 &uart1 {
777 pinctrl-names = "default";
778 pinctrl-0 = <&uart1m0_xfer &uart1m0_ct
779 uart-has-rtscts;
780 status = "okay";
781
782 bluetooth {
783 compatible = "brcm,bcm43438-bt
784 clocks = <&rk809 1>;
785 clock-names = "lpo";
786 device-wakeup-gpios = <&gpio4
787 host-wakeup-gpios = <&gpio4 RK
788 shutdown-gpios = <&gpio4 RK_PB
789 pinctrl-names = "default";
790 pinctrl-0 = <&bt_host_wake &bt
791 vbat-supply = <&vcc3v3_sys>;
792 vddio-supply = <&vcc_1v8>;
793 /* vddio comes from regulator
794 };
795 };
796
797 &uart2 {
798 status = "okay";
799 };
800
801 &usb_host0_ehci {
802 status = "okay";
803 };
804
805 &usb_host0_ohci {
806 status = "okay";
807 };
808
809 &usb_host0_xhci {
810 extcon = <&usb2phy0>;
811 status = "okay";
812 };
813
814 &usb_host1_ehci {
815 status = "okay";
816 };
817
818 &usb_host1_ohci {
819 status = "okay";
820 };
821
822 &usb_host1_xhci {
823 status = "okay";
824 };
825
826 &usb2phy0 {
827 status = "okay";
828 };
829
830 &usb2phy0_host {
831 phy-supply = <&vcc5v0_usb_host>;
832 status = "okay";
833 };
834
835 &usb2phy0_otg {
836 phy-supply = <&vcc5v0_usb_otg>;
837 status = "okay";
838 };
839
840 &usb2phy1 {
841 status = "okay";
842 };
843
844 &usb2phy1_host {
845 phy-supply = <&vcc5v0_usb_host>;
846 status = "okay";
847 };
848
849 &usb2phy1_otg {
850 phy-supply = <&vcc5v0_usb_host>;
851 status = "okay";
852 };
853
854 &vop {
855 assigned-clocks = <&cru DCLK_VOP0>, <&
856 assigned-clock-parents = <&pmucru PLL_
857 status = "okay";
858 };
859
860 &vop_mmu {
861 status = "okay";
862 };
863
864 &vp0 {
865 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_E
866 reg = <ROCKCHIP_VOP2_EP_HDMI0>
867 remote-endpoint = <&hdmi_in_vp
868 };
869 };
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