1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2021 Rockchip Electronics Co. 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 * Copyright (c) 2023 Thomas McKahan 4 * Copyright (c) 2023 Thomas McKahan
5 * Copyright (c) 2024 Sebastian Kropatsch 5 * Copyright (c) 2024 Sebastian Kropatsch
6 * 6 *
7 */ 7 */
8 8
9 /dts-v1/; 9 /dts-v1/;
10 10
11 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/rockchip.h> 13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include "rk3588.dtsi" 14 #include "rk3588.dtsi"
15 15
16 / { 16 / {
17 model = "FriendlyElec CM3588"; 17 model = "FriendlyElec CM3588";
18 compatible = "friendlyarm,cm3588", "ro 18 compatible = "friendlyarm,cm3588", "rockchip,rk3588";
19 19
20 aliases { 20 aliases {
21 mmc0 = &sdhci; 21 mmc0 = &sdhci;
22 mmc1 = &sdmmc; 22 mmc1 = &sdmmc;
23 }; 23 };
24 24
25 chosen { 25 chosen {
26 stdout-path = "serial2:1500000 26 stdout-path = "serial2:1500000n8";
27 }; 27 };
28 28
29 leds { 29 leds {
30 compatible = "gpio-leds"; 30 compatible = "gpio-leds";
31 31
32 led_sys: led-0 { 32 led_sys: led-0 {
33 color = <LED_COLOR_ID_ 33 color = <LED_COLOR_ID_AMBER>;
34 function = LED_FUNCTIO 34 function = LED_FUNCTION_HEARTBEAT;
35 gpios = <&gpio2 RK_PC5 35 gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
36 linux,default-trigger 36 linux,default-trigger = "heartbeat";
37 pinctrl-names = "defau 37 pinctrl-names = "default";
38 pinctrl-0 = <&led_sys_ 38 pinctrl-0 = <&led_sys_pin>;
39 }; 39 };
40 40
41 led_usr: led-1 { 41 led_usr: led-1 {
42 color = <LED_COLOR_ID_ 42 color = <LED_COLOR_ID_GREEN>;
43 function = LED_FUNCTIO 43 function = LED_FUNCTION_INDICATOR;
44 gpios = <&gpio1 RK_PC6 44 gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
45 pinctrl-names = "defau 45 pinctrl-names = "default";
46 pinctrl-0 = <&led_usr_ 46 pinctrl-0 = <&led_usr_pin>;
47 }; 47 };
48 }; 48 };
49 49
50 /* vcc_4v0_sys powers the RK806 and RK 50 /* vcc_4v0_sys powers the RK806 and RK860's */
51 vcc_4v0_sys: regulator-vcc-4v0-sys { 51 vcc_4v0_sys: regulator-vcc-4v0-sys {
52 compatible = "regulator-fixed" 52 compatible = "regulator-fixed";
53 regulator-name = "vcc_4v0_sys" 53 regulator-name = "vcc_4v0_sys";
54 regulator-always-on; 54 regulator-always-on;
55 regulator-boot-on; 55 regulator-boot-on;
56 regulator-min-microvolt = <400 56 regulator-min-microvolt = <4000000>;
57 regulator-max-microvolt = <400 57 regulator-max-microvolt = <4000000>;
58 }; 58 };
59 59
60 vcc_3v3_pcie20: regulator-vcc-3v3-pcie 60 vcc_3v3_pcie20: regulator-vcc-3v3-pcie20 {
61 compatible = "regulator-fixed" 61 compatible = "regulator-fixed";
62 regulator-name = "vcc_3v3_pcie 62 regulator-name = "vcc_3v3_pcie20";
63 regulator-always-on; 63 regulator-always-on;
64 regulator-boot-on; 64 regulator-boot-on;
65 regulator-min-microvolt = <330 65 regulator-min-microvolt = <3300000>;
66 regulator-max-microvolt = <330 66 regulator-max-microvolt = <3300000>;
67 vin-supply = <&vcc_3v3_s3>; 67 vin-supply = <&vcc_3v3_s3>;
68 }; 68 };
69 69
70 vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 70 vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
71 compatible = "regulator-fixed" 71 compatible = "regulator-fixed";
72 gpios = <&gpio4 RK_PA5 GPIO_AC 72 gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
73 pinctrl-names = "default"; 73 pinctrl-names = "default";
74 pinctrl-0 = <&sd_s0_pwr>; 74 pinctrl-0 = <&sd_s0_pwr>;
75 regulator-boot-on; 75 regulator-boot-on;
76 regulator-max-microvolt = <330 76 regulator-max-microvolt = <3300000>;
77 regulator-min-microvolt = <330 77 regulator-min-microvolt = <3300000>;
78 regulator-name = "vcc_3v3_sd_s 78 regulator-name = "vcc_3v3_sd_s0";
79 vin-supply = <&vcc_3v3_s3>; 79 vin-supply = <&vcc_3v3_s3>;
80 }; 80 };
81 81
82 vcc_1v1_nldo_s3: regulator-vcc-1v1-nld 82 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
83 compatible = "regulator-fixed" 83 compatible = "regulator-fixed";
84 regulator-name = "vcc-1v1-nldo 84 regulator-name = "vcc-1v1-nldo-s3";
85 regulator-always-on; 85 regulator-always-on;
86 regulator-boot-on; 86 regulator-boot-on;
87 regulator-min-microvolt = <110 87 regulator-min-microvolt = <1100000>;
88 regulator-max-microvolt = <110 88 regulator-max-microvolt = <1100000>;
89 vin-supply = <&vcc_4v0_sys>; 89 vin-supply = <&vcc_4v0_sys>;
90 }; 90 };
91 }; 91 };
92 92
93 /* Combo PHY 0 is configured to act as as PCIe 93 /* Combo PHY 0 is configured to act as as PCIe 2.0 PHY */
94 /* Used by PCIe controller 4 (pcie2x1l2) */ 94 /* Used by PCIe controller 4 (pcie2x1l2) */
95 &combphy0_ps { 95 &combphy0_ps {
96 status = "okay"; 96 status = "okay";
97 }; 97 };
98 98
99 &cpu_l0 { 99 &cpu_l0 {
100 cpu-supply = <&vdd_cpu_lit_s0>; 100 cpu-supply = <&vdd_cpu_lit_s0>;
101 }; 101 };
102 102
103 &cpu_l1 { 103 &cpu_l1 {
104 cpu-supply = <&vdd_cpu_lit_s0>; 104 cpu-supply = <&vdd_cpu_lit_s0>;
105 }; 105 };
106 106
107 &cpu_l2 { 107 &cpu_l2 {
108 cpu-supply = <&vdd_cpu_lit_s0>; 108 cpu-supply = <&vdd_cpu_lit_s0>;
109 }; 109 };
110 110
111 &cpu_l3 { 111 &cpu_l3 {
112 cpu-supply = <&vdd_cpu_lit_s0>; 112 cpu-supply = <&vdd_cpu_lit_s0>;
113 }; 113 };
114 114
115 &cpu_b0 { 115 &cpu_b0 {
116 cpu-supply = <&vdd_cpu_big0_s0>; 116 cpu-supply = <&vdd_cpu_big0_s0>;
117 }; 117 };
118 118
119 &cpu_b1 { 119 &cpu_b1 {
120 cpu-supply = <&vdd_cpu_big0_s0>; 120 cpu-supply = <&vdd_cpu_big0_s0>;
121 }; 121 };
122 122
123 &cpu_b2 { 123 &cpu_b2 {
124 cpu-supply = <&vdd_cpu_big1_s0>; 124 cpu-supply = <&vdd_cpu_big1_s0>;
125 }; 125 };
126 126
127 &cpu_b3 { 127 &cpu_b3 {
128 cpu-supply = <&vdd_cpu_big1_s0>; 128 cpu-supply = <&vdd_cpu_big1_s0>;
129 }; 129 };
130 130
131 &gpu { 131 &gpu {
132 mali-supply = <&vdd_gpu_s0>; 132 mali-supply = <&vdd_gpu_s0>;
133 sram-supply = <&vdd_gpu_mem_s0>; 133 sram-supply = <&vdd_gpu_mem_s0>;
134 status = "okay"; 134 status = "okay";
135 }; 135 };
136 136
137 &i2c0 { 137 &i2c0 {
138 pinctrl-names = "default"; 138 pinctrl-names = "default";
139 pinctrl-0 = <&i2c0m2_xfer>; 139 pinctrl-0 = <&i2c0m2_xfer>;
140 status = "okay"; 140 status = "okay";
141 141
142 vdd_cpu_big0_s0: regulator@42 { 142 vdd_cpu_big0_s0: regulator@42 {
143 compatible = "rockchip,rk8602" 143 compatible = "rockchip,rk8602";
144 reg = <0x42>; 144 reg = <0x42>;
145 fcs,suspend-voltage-selector = 145 fcs,suspend-voltage-selector = <1>;
146 regulator-name = "vdd_cpu_big0 146 regulator-name = "vdd_cpu_big0_s0";
147 regulator-always-on; 147 regulator-always-on;
148 regulator-boot-on; 148 regulator-boot-on;
149 regulator-min-microvolt = <550 149 regulator-min-microvolt = <550000>;
150 regulator-max-microvolt = <105 150 regulator-max-microvolt = <1050000>;
151 regulator-ramp-delay = <2300>; 151 regulator-ramp-delay = <2300>;
152 vin-supply = <&vcc_4v0_sys>; 152 vin-supply = <&vcc_4v0_sys>;
153 153
154 regulator-state-mem { 154 regulator-state-mem {
155 regulator-off-in-suspe 155 regulator-off-in-suspend;
156 }; 156 };
157 }; 157 };
158 158
159 vdd_cpu_big1_s0: regulator@43 { 159 vdd_cpu_big1_s0: regulator@43 {
160 compatible = "rockchip,rk8603" 160 compatible = "rockchip,rk8603", "rockchip,rk8602";
161 reg = <0x43>; 161 reg = <0x43>;
162 fcs,suspend-voltage-selector = 162 fcs,suspend-voltage-selector = <1>;
163 regulator-name = "vdd_cpu_big1 163 regulator-name = "vdd_cpu_big1_s0";
164 regulator-always-on; 164 regulator-always-on;
165 regulator-boot-on; 165 regulator-boot-on;
166 regulator-min-microvolt = <550 166 regulator-min-microvolt = <550000>;
167 regulator-max-microvolt = <105 167 regulator-max-microvolt = <1050000>;
168 regulator-ramp-delay = <2300>; 168 regulator-ramp-delay = <2300>;
169 vin-supply = <&vcc_4v0_sys>; 169 vin-supply = <&vcc_4v0_sys>;
170 170
171 regulator-state-mem { 171 regulator-state-mem {
172 regulator-off-in-suspe 172 regulator-off-in-suspend;
173 }; 173 };
174 }; 174 };
175 }; 175 };
176 176
177 &i2c2 { 177 &i2c2 {
178 status = "okay"; 178 status = "okay";
179 179
180 vdd_npu_s0: regulator@42 { 180 vdd_npu_s0: regulator@42 {
181 compatible = "rockchip,rk8602" 181 compatible = "rockchip,rk8602";
182 reg = <0x42>; 182 reg = <0x42>;
183 fcs,suspend-voltage-selector = 183 fcs,suspend-voltage-selector = <1>;
184 regulator-name = "vdd_npu_s0"; 184 regulator-name = "vdd_npu_s0";
185 regulator-always-on; 185 regulator-always-on;
186 regulator-boot-on; 186 regulator-boot-on;
187 regulator-min-microvolt = <550 187 regulator-min-microvolt = <550000>;
188 regulator-max-microvolt = <950 188 regulator-max-microvolt = <950000>;
189 regulator-ramp-delay = <2300>; 189 regulator-ramp-delay = <2300>;
190 vin-supply = <&vcc_4v0_sys>; 190 vin-supply = <&vcc_4v0_sys>;
191 191
192 regulator-state-mem { 192 regulator-state-mem {
193 regulator-off-in-suspe 193 regulator-off-in-suspend;
194 }; 194 };
195 }; 195 };
196 }; 196 };
197 197
198 &i2c6 { 198 &i2c6 {
199 clock-frequency = <200000>; 199 clock-frequency = <200000>;
200 pinctrl-names = "default"; 200 pinctrl-names = "default";
201 pinctrl-0 = <&i2c6m0_xfer>; 201 pinctrl-0 = <&i2c6m0_xfer>;
202 status = "okay"; 202 status = "okay";
203 203
204 hym8563: rtc@51 { 204 hym8563: rtc@51 {
205 compatible = "haoyu,hym8563"; 205 compatible = "haoyu,hym8563";
206 reg = <0x51>; 206 reg = <0x51>;
207 #clock-cells = <0>; 207 #clock-cells = <0>;
208 clock-output-names = "hym8563" 208 clock-output-names = "hym8563";
209 interrupt-parent = <&gpio0>; 209 interrupt-parent = <&gpio0>;
210 interrupts = <RK_PB0 IRQ_TYPE_ 210 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
211 pinctrl-names = "default"; 211 pinctrl-names = "default";
212 pinctrl-0 = <&hym8563_int>; 212 pinctrl-0 = <&hym8563_int>;
213 wakeup-source; 213 wakeup-source;
214 }; 214 };
215 }; 215 };
216 216
217 &i2c7 { 217 &i2c7 {
218 clock-frequency = <200000>; 218 clock-frequency = <200000>;
219 status = "okay"; 219 status = "okay";
220 220
221 rt5616: audio-codec@1b { 221 rt5616: audio-codec@1b {
222 compatible = "realtek,rt5616"; 222 compatible = "realtek,rt5616";
223 reg = <0x1b>; 223 reg = <0x1b>;
224 #sound-dai-cells = <0>; 224 #sound-dai-cells = <0>;
225 }; 225 };
226 }; 226 };
227 227
228 &i2s0_8ch { 228 &i2s0_8ch {
229 pinctrl-names = "default"; 229 pinctrl-names = "default";
230 pinctrl-0 = <&i2s0_lrck 230 pinctrl-0 = <&i2s0_lrck
231 &i2s0_mclk 231 &i2s0_mclk
232 &i2s0_sclk 232 &i2s0_sclk
233 &i2s0_sdi0 233 &i2s0_sdi0
234 &i2s0_sdo0>; 234 &i2s0_sdo0>;
235 status = "okay"; 235 status = "okay";
236 }; 236 };
237 237
238 &i2s5_8ch { 238 &i2s5_8ch {
239 status = "okay"; 239 status = "okay";
240 }; 240 };
241 241
242 &i2s6_8ch { 242 &i2s6_8ch {
243 status = "okay"; 243 status = "okay";
244 }; 244 };
245 245
246 &i2s7_8ch { 246 &i2s7_8ch {
247 status = "okay"; 247 status = "okay";
248 }; 248 };
249 249
250 &pcie2x1l2 { 250 &pcie2x1l2 {
251 /* r8125 ethernet, @fe190000 */ 251 /* r8125 ethernet, @fe190000 */
252 pinctrl-names = "default"; 252 pinctrl-names = "default";
253 pinctrl-0 = <&pcie2_2_rst>; 253 pinctrl-0 = <&pcie2_2_rst>;
254 reset-gpios = <&gpio4 RK_PA4 GPIO_ACTI 254 reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
255 vpcie3v3-supply = <&vcc_3v3_pcie20>; 255 vpcie3v3-supply = <&vcc_3v3_pcie20>;
256 status = "okay"; 256 status = "okay";
257 }; 257 };
258 258
259 &pinctrl { 259 &pinctrl {
260 gpio-leds { 260 gpio-leds {
261 led_sys_pin: led-sys-pin { 261 led_sys_pin: led-sys-pin {
262 rockchip,pins = <2 RK_ 262 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
263 }; 263 };
264 264
265 led_usr_pin: led-usr-pin { 265 led_usr_pin: led-usr-pin {
266 rockchip,pins = <1 RK_ 266 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
267 }; 267 };
268 }; 268 };
269 269
270 hym8563 { 270 hym8563 {
271 hym8563_int: rtc-int { 271 hym8563_int: rtc-int {
272 rockchip,pins = <0 RK_ 272 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
273 }; 273 };
274 }; 274 };
275 275
276 pcie { 276 pcie {
277 pcie2_2_rst: pcie2-2-rst { 277 pcie2_2_rst: pcie2-2-rst {
278 rockchip,pins = <4 RK_ 278 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
279 }; 279 };
280 }; 280 };
281 281
282 sdmmc { 282 sdmmc {
283 sd_s0_pwr: sd-s0-pwr { 283 sd_s0_pwr: sd-s0-pwr {
284 rockchip,pins = <4 RK_ 284 rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
285 }; 285 };
286 }; 286 };
287 }; 287 };
288 288
289 &saradc { 289 &saradc {
290 vref-supply = <&avcc_1v8_s0>; 290 vref-supply = <&avcc_1v8_s0>;
291 status = "okay"; 291 status = "okay";
292 }; 292 };
293 293
294 /* eMMC */ 294 /* eMMC */
295 &sdhci { 295 &sdhci {
296 bus-width = <8>; 296 bus-width = <8>;
297 mmc-hs400-1_8v; 297 mmc-hs400-1_8v;
298 mmc-hs400-enhanced-strobe; 298 mmc-hs400-enhanced-strobe;
299 no-sd; 299 no-sd;
300 no-sdio; 300 no-sdio;
301 non-removable; 301 non-removable;
302 vmmc-supply = <&vcc_3v3_s3>; 302 vmmc-supply = <&vcc_3v3_s3>;
303 vqmmc-supply = <&vcc_1v8_s3>; 303 vqmmc-supply = <&vcc_1v8_s3>;
304 status = "okay"; 304 status = "okay";
305 }; 305 };
306 306
307 /* microSD card */ 307 /* microSD card */
308 &sdmmc { 308 &sdmmc {
309 bus-width = <4>; 309 bus-width = <4>;
310 cap-sd-highspeed; 310 cap-sd-highspeed;
311 disable-wp; 311 disable-wp;
312 max-frequency = <150000000>; 312 max-frequency = <150000000>;
313 no-mmc; 313 no-mmc;
314 no-sdio; 314 no-sdio;
315 sd-uhs-sdr104; 315 sd-uhs-sdr104;
316 vmmc-supply = <&vcc_3v3_sd_s0>; 316 vmmc-supply = <&vcc_3v3_sd_s0>;
317 vqmmc-supply = <&vccio_sd_s0>; 317 vqmmc-supply = <&vccio_sd_s0>;
318 }; 318 };
319 319
320 &spi2 { 320 &spi2 {
321 assigned-clocks = <&cru CLK_SPI2>; 321 assigned-clocks = <&cru CLK_SPI2>;
322 assigned-clock-rates = <200000000>; 322 assigned-clock-rates = <200000000>;
323 num-cs = <1>; 323 num-cs = <1>;
324 pinctrl-names = "default"; 324 pinctrl-names = "default";
325 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins> 325 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
326 status = "okay"; 326 status = "okay";
327 327
328 rk806_single: pmic@0 { 328 rk806_single: pmic@0 {
329 compatible = "rockchip,rk806"; 329 compatible = "rockchip,rk806";
330 reg = <0x0>; 330 reg = <0x0>;
331 331
332 interrupt-parent = <&gpio0>; 332 interrupt-parent = <&gpio0>;
333 interrupts = <7 IRQ_TYPE_LEVEL 333 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
334 334
335 pinctrl-names = "default"; 335 pinctrl-names = "default";
336 pinctrl-0 = <&pmic_pins>, <&rk 336 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
337 <&rk806_dvs2_null> 337 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
338 338
339 spi-max-frequency = <1000000>; 339 spi-max-frequency = <1000000>;
340 system-power-controller; 340 system-power-controller;
341 341
342 vcc1-supply = <&vcc_4v0_sys>; 342 vcc1-supply = <&vcc_4v0_sys>;
343 vcc2-supply = <&vcc_4v0_sys>; 343 vcc2-supply = <&vcc_4v0_sys>;
344 vcc3-supply = <&vcc_4v0_sys>; 344 vcc3-supply = <&vcc_4v0_sys>;
345 vcc4-supply = <&vcc_4v0_sys>; 345 vcc4-supply = <&vcc_4v0_sys>;
346 vcc5-supply = <&vcc_4v0_sys>; 346 vcc5-supply = <&vcc_4v0_sys>;
347 vcc6-supply = <&vcc_4v0_sys>; 347 vcc6-supply = <&vcc_4v0_sys>;
348 vcc7-supply = <&vcc_4v0_sys>; 348 vcc7-supply = <&vcc_4v0_sys>;
349 vcc8-supply = <&vcc_4v0_sys>; 349 vcc8-supply = <&vcc_4v0_sys>;
350 vcc9-supply = <&vcc_4v0_sys>; 350 vcc9-supply = <&vcc_4v0_sys>;
351 vcc10-supply = <&vcc_4v0_sys>; 351 vcc10-supply = <&vcc_4v0_sys>;
352 vcc11-supply = <&vcc_2v0_pldo_ 352 vcc11-supply = <&vcc_2v0_pldo_s3>;
353 vcc12-supply = <&vcc_4v0_sys>; 353 vcc12-supply = <&vcc_4v0_sys>;
354 vcc13-supply = <&vcc_1v1_nldo_ 354 vcc13-supply = <&vcc_1v1_nldo_s3>;
355 vcc14-supply = <&vcc_1v1_nldo_ 355 vcc14-supply = <&vcc_1v1_nldo_s3>;
356 vcca-supply = <&vcc_4v0_sys>; 356 vcca-supply = <&vcc_4v0_sys>;
357 357
358 gpio-controller; 358 gpio-controller;
359 #gpio-cells = <2>; 359 #gpio-cells = <2>;
360 360
361 rk806_dvs1_null: dvs1-null-pin 361 rk806_dvs1_null: dvs1-null-pins {
362 pins = "gpio_pwrctrl1" 362 pins = "gpio_pwrctrl1";
363 function = "pin_fun0"; 363 function = "pin_fun0";
364 }; 364 };
365 365
366 rk806_dvs2_null: dvs2-null-pin 366 rk806_dvs2_null: dvs2-null-pins {
367 pins = "gpio_pwrctrl2" 367 pins = "gpio_pwrctrl2";
368 function = "pin_fun0"; 368 function = "pin_fun0";
369 }; 369 };
370 370
371 rk806_dvs3_null: dvs3-null-pin 371 rk806_dvs3_null: dvs3-null-pins {
372 pins = "gpio_pwrctrl3" 372 pins = "gpio_pwrctrl3";
373 function = "pin_fun0"; 373 function = "pin_fun0";
374 }; 374 };
375 375
376 regulators { 376 regulators {
377 vdd_gpu_s0: vdd_gpu_me 377 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
378 regulator-boot 378 regulator-boot-on;
379 regulator-min- 379 regulator-min-microvolt = <550000>;
380 regulator-max- 380 regulator-max-microvolt = <950000>;
381 regulator-ramp 381 regulator-ramp-delay = <12500>;
382 regulator-name 382 regulator-name = "vdd_gpu_s0";
383 regulator-enab 383 regulator-enable-ramp-delay = <400>;
384 384
385 regulator-stat 385 regulator-state-mem {
386 regula 386 regulator-off-in-suspend;
387 }; 387 };
388 }; 388 };
389 389
390 vdd_cpu_lit_s0: vdd_cp 390 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
391 regulator-alwa 391 regulator-always-on;
392 regulator-boot 392 regulator-boot-on;
393 regulator-min- 393 regulator-min-microvolt = <550000>;
394 regulator-max- 394 regulator-max-microvolt = <950000>;
395 regulator-ramp 395 regulator-ramp-delay = <12500>;
396 regulator-name 396 regulator-name = "vdd_cpu_lit_s0";
397 397
398 regulator-stat 398 regulator-state-mem {
399 regula 399 regulator-off-in-suspend;
400 }; 400 };
401 }; 401 };
402 402
403 vdd_log_s0: dcdc-reg3 403 vdd_log_s0: dcdc-reg3 {
404 regulator-alwa 404 regulator-always-on;
405 regulator-boot 405 regulator-boot-on;
406 regulator-min- 406 regulator-min-microvolt = <675000>;
407 regulator-max- 407 regulator-max-microvolt = <750000>;
408 regulator-ramp 408 regulator-ramp-delay = <12500>;
409 regulator-name 409 regulator-name = "vdd_log_s0";
410 410
411 regulator-stat 411 regulator-state-mem {
412 regula 412 regulator-off-in-suspend;
413 regula 413 regulator-suspend-microvolt = <750000>;
414 }; 414 };
415 }; 415 };
416 416
417 vdd_vdenc_s0: vdd_vden 417 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
418 regulator-alwa 418 regulator-always-on;
419 regulator-boot 419 regulator-boot-on;
420 regulator-min- 420 regulator-min-microvolt = <550000>;
421 regulator-max- 421 regulator-max-microvolt = <950000>;
422 regulator-ramp 422 regulator-ramp-delay = <12500>;
423 regulator-name 423 regulator-name = "vdd_vdenc_s0";
424 424
425 regulator-stat 425 regulator-state-mem {
426 regula 426 regulator-off-in-suspend;
427 }; 427 };
428 }; 428 };
429 429
430 vdd_ddr_s0: dcdc-reg5 430 vdd_ddr_s0: dcdc-reg5 {
431 regulator-alwa 431 regulator-always-on;
432 regulator-boot 432 regulator-boot-on;
433 regulator-min- 433 regulator-min-microvolt = <675000>;
434 regulator-max- 434 regulator-max-microvolt = <900000>;
435 regulator-ramp 435 regulator-ramp-delay = <12500>;
436 regulator-name 436 regulator-name = "vdd_ddr_s0";
437 437
438 regulator-stat 438 regulator-state-mem {
439 regula 439 regulator-off-in-suspend;
440 regula 440 regulator-suspend-microvolt = <850000>;
441 }; 441 };
442 }; 442 };
443 443
444 vdd2_ddr_s3: dcdc-reg6 444 vdd2_ddr_s3: dcdc-reg6 {
445 regulator-alwa 445 regulator-always-on;
446 regulator-boot 446 regulator-boot-on;
447 regulator-name 447 regulator-name = "vdd2_ddr_s3";
448 448
449 regulator-stat 449 regulator-state-mem {
450 regula 450 regulator-on-in-suspend;
451 }; 451 };
452 }; 452 };
453 453
454 vcc_2v0_pldo_s3: dcdc- 454 vcc_2v0_pldo_s3: dcdc-reg7 {
455 regulator-alwa 455 regulator-always-on;
456 regulator-boot 456 regulator-boot-on;
457 regulator-min- 457 regulator-min-microvolt = <2000000>;
458 regulator-max- 458 regulator-max-microvolt = <2000000>;
459 regulator-ramp 459 regulator-ramp-delay = <12500>;
460 regulator-name 460 regulator-name = "vdd_2v0_pldo_s3";
461 461
462 regulator-stat 462 regulator-state-mem {
463 regula 463 regulator-on-in-suspend;
464 regula 464 regulator-suspend-microvolt = <2000000>;
465 }; 465 };
466 }; 466 };
467 467
468 vcc_3v3_s3: dcdc-reg8 468 vcc_3v3_s3: dcdc-reg8 {
469 regulator-alwa 469 regulator-always-on;
470 regulator-boot 470 regulator-boot-on;
471 regulator-min- 471 regulator-min-microvolt = <3300000>;
472 regulator-max- 472 regulator-max-microvolt = <3300000>;
473 regulator-name 473 regulator-name = "vcc_3v3_s3";
474 474
475 regulator-stat 475 regulator-state-mem {
476 regula 476 regulator-on-in-suspend;
477 regula 477 regulator-suspend-microvolt = <3300000>;
478 }; 478 };
479 }; 479 };
480 480
481 vddq_ddr_s0: dcdc-reg9 481 vddq_ddr_s0: dcdc-reg9 {
482 regulator-alwa 482 regulator-always-on;
483 regulator-boot 483 regulator-boot-on;
484 regulator-name 484 regulator-name = "vddq_ddr_s0";
485 485
486 regulator-stat 486 regulator-state-mem {
487 regula 487 regulator-off-in-suspend;
488 }; 488 };
489 }; 489 };
490 490
491 vcc_1v8_s3: dcdc-reg10 491 vcc_1v8_s3: dcdc-reg10 {
492 regulator-alwa 492 regulator-always-on;
493 regulator-boot 493 regulator-boot-on;
494 regulator-min- 494 regulator-min-microvolt = <1800000>;
495 regulator-max- 495 regulator-max-microvolt = <1800000>;
496 regulator-name 496 regulator-name = "vcc_1v8_s3";
497 497
498 regulator-stat 498 regulator-state-mem {
499 regula 499 regulator-on-in-suspend;
500 regula 500 regulator-suspend-microvolt = <1800000>;
501 }; 501 };
502 }; 502 };
503 503
504 avcc_1v8_s0: pldo-reg1 504 avcc_1v8_s0: pldo-reg1 {
505 regulator-alwa 505 regulator-always-on;
506 regulator-boot 506 regulator-boot-on;
507 regulator-min- 507 regulator-min-microvolt = <1800000>;
508 regulator-max- 508 regulator-max-microvolt = <1800000>;
509 regulator-name 509 regulator-name = "avcc_1v8_s0";
510 510
511 regulator-stat 511 regulator-state-mem {
512 regula 512 regulator-off-in-suspend;
513 }; 513 };
514 }; 514 };
515 515
516 vcc_1v8_s0: pldo-reg2 516 vcc_1v8_s0: pldo-reg2 {
517 regulator-alwa 517 regulator-always-on;
518 regulator-boot 518 regulator-boot-on;
519 regulator-min- 519 regulator-min-microvolt = <1800000>;
520 regulator-max- 520 regulator-max-microvolt = <1800000>;
521 regulator-name 521 regulator-name = "vcc_1v8_s0";
522 522
523 regulator-stat 523 regulator-state-mem {
524 regula 524 regulator-off-in-suspend;
525 regula 525 regulator-suspend-microvolt = <1800000>;
526 }; 526 };
527 }; 527 };
528 528
529 avdd_1v2_s0: pldo-reg3 529 avdd_1v2_s0: pldo-reg3 {
530 regulator-alwa 530 regulator-always-on;
531 regulator-boot 531 regulator-boot-on;
532 regulator-min- 532 regulator-min-microvolt = <1200000>;
533 regulator-max- 533 regulator-max-microvolt = <1200000>;
534 regulator-name 534 regulator-name = "avdd_1v2_s0";
535 535
536 regulator-stat 536 regulator-state-mem {
537 regula 537 regulator-off-in-suspend;
538 }; 538 };
539 }; 539 };
540 540
541 vcc_3v3_s0: pldo-reg4 541 vcc_3v3_s0: pldo-reg4 {
542 regulator-alwa 542 regulator-always-on;
543 regulator-boot 543 regulator-boot-on;
544 regulator-min- 544 regulator-min-microvolt = <3300000>;
545 regulator-max- 545 regulator-max-microvolt = <3300000>;
546 regulator-ramp 546 regulator-ramp-delay = <12500>;
547 regulator-name 547 regulator-name = "vcc_3v3_s0";
548 548
549 regulator-stat 549 regulator-state-mem {
550 regula 550 regulator-off-in-suspend;
551 }; 551 };
552 }; 552 };
553 553
554 vccio_sd_s0: pldo-reg5 554 vccio_sd_s0: pldo-reg5 {
555 regulator-alwa 555 regulator-always-on;
556 regulator-boot 556 regulator-boot-on;
557 regulator-min- 557 regulator-min-microvolt = <1800000>;
558 regulator-max- 558 regulator-max-microvolt = <3300000>;
559 regulator-ramp 559 regulator-ramp-delay = <12500>;
560 regulator-name 560 regulator-name = "vccio_sd_s0";
561 561
562 regulator-stat 562 regulator-state-mem {
563 regula 563 regulator-off-in-suspend;
564 }; 564 };
565 }; 565 };
566 566
567 pldo6_s3: pldo-reg6 { 567 pldo6_s3: pldo-reg6 {
568 regulator-alwa 568 regulator-always-on;
569 regulator-boot 569 regulator-boot-on;
570 regulator-min- 570 regulator-min-microvolt = <1800000>;
571 regulator-max- 571 regulator-max-microvolt = <1800000>;
572 regulator-name 572 regulator-name = "pldo6_s3";
573 573
574 regulator-stat 574 regulator-state-mem {
575 regula 575 regulator-on-in-suspend;
576 regula 576 regulator-suspend-microvolt = <1800000>;
577 }; 577 };
578 }; 578 };
579 579
580 vdd_0v75_s3: nldo-reg1 580 vdd_0v75_s3: nldo-reg1 {
581 regulator-alwa 581 regulator-always-on;
582 regulator-boot 582 regulator-boot-on;
583 regulator-min- 583 regulator-min-microvolt = <750000>;
584 regulator-max- 584 regulator-max-microvolt = <750000>;
585 regulator-name 585 regulator-name = "vdd_0v75_s3";
586 586
587 regulator-stat 587 regulator-state-mem {
588 regula 588 regulator-on-in-suspend;
589 regula 589 regulator-suspend-microvolt = <750000>;
590 }; 590 };
591 }; 591 };
592 592
593 vdd_ddr_pll_s0: nldo-r 593 vdd_ddr_pll_s0: nldo-reg2 {
594 regulator-alwa 594 regulator-always-on;
595 regulator-boot 595 regulator-boot-on;
596 regulator-min- 596 regulator-min-microvolt = <850000>;
597 regulator-max- 597 regulator-max-microvolt = <850000>;
598 regulator-name 598 regulator-name = "vdd_ddr_pll_s0";
599 599
600 regulator-stat 600 regulator-state-mem {
601 regula 601 regulator-off-in-suspend;
602 regula 602 regulator-suspend-microvolt = <850000>;
603 }; 603 };
604 }; 604 };
605 605
606 avdd_0v75_s0: nldo-reg 606 avdd_0v75_s0: nldo-reg3 {
607 regulator-alwa 607 regulator-always-on;
608 regulator-boot 608 regulator-boot-on;
609 regulator-min- 609 regulator-min-microvolt = <750000>;
610 regulator-max- 610 regulator-max-microvolt = <750000>;
611 regulator-name 611 regulator-name = "avdd_0v75_s0";
612 612
613 regulator-stat 613 regulator-state-mem {
614 regula 614 regulator-off-in-suspend;
615 }; 615 };
616 }; 616 };
617 617
618 vdd_0v85_s0: nldo-reg4 618 vdd_0v85_s0: nldo-reg4 {
619 regulator-alwa 619 regulator-always-on;
620 regulator-boot 620 regulator-boot-on;
621 regulator-min- 621 regulator-min-microvolt = <850000>;
622 regulator-max- 622 regulator-max-microvolt = <850000>;
623 regulator-name 623 regulator-name = "vdd_0v85_s0";
624 624
625 regulator-stat 625 regulator-state-mem {
626 regula 626 regulator-off-in-suspend;
627 }; 627 };
628 }; 628 };
629 629
630 vdd_0v75_s0: nldo-reg5 630 vdd_0v75_s0: nldo-reg5 {
631 regulator-alwa 631 regulator-always-on;
632 regulator-boot 632 regulator-boot-on;
633 regulator-min- 633 regulator-min-microvolt = <750000>;
634 regulator-max- 634 regulator-max-microvolt = <750000>;
635 regulator-name 635 regulator-name = "vdd_0v75_s0";
636 636
637 regulator-stat 637 regulator-state-mem {
638 regula 638 regulator-off-in-suspend;
639 }; 639 };
640 }; 640 };
641 }; 641 };
642 }; 642 };
643 }; 643 };
644 644
645 &tsadc { 645 &tsadc {
646 status = "okay"; 646 status = "okay";
647 }; 647 };
648 648
649 /* Debug UART */ 649 /* Debug UART */
650 &uart2 { 650 &uart2 {
651 pinctrl-names = "default"; 651 pinctrl-names = "default";
652 pinctrl-0 = <&uart2m0_xfer>; 652 pinctrl-0 = <&uart2m0_xfer>;
653 }; 653 };
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