1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Copyright (c) 2023 Theobroma Systems Design 3 * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH
4 */ 4 */
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include "rk3588.dtsi" 9 #include "rk3588.dtsi"
10 10
11 / { 11 / {
12 compatible = "tsd,rk3588-tiger", "rock 12 compatible = "tsd,rk3588-tiger", "rockchip,rk3588";
13 13
14 aliases { 14 aliases {
15 mmc0 = &sdhci; 15 mmc0 = &sdhci;
16 rtc0 = &rtc_twi; 16 rtc0 = &rtc_twi;
17 }; 17 };
18 18
19 emmc_pwrseq: emmc-pwrseq { 19 emmc_pwrseq: emmc-pwrseq {
20 compatible = "mmc-pwrseq-emmc" 20 compatible = "mmc-pwrseq-emmc";
21 pinctrl-0 = <&emmc_reset>; 21 pinctrl-0 = <&emmc_reset>;
22 pinctrl-names = "default"; 22 pinctrl-names = "default";
23 reset-gpios = <&gpio2 RK_PA3 G 23 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
24 }; 24 };
25 25
26 extcon_usb3: extcon-usb3 { <<
27 compatible = "linux,extcon-usb <<
28 id-gpios = <&gpio3 RK_PC0 GPIO <<
29 pinctrl-names = "default"; <<
30 pinctrl-0 = <&usb3_id>; <<
31 status = "disabled"; <<
32 }; <<
33 <<
34 leds { 26 leds {
35 compatible = "gpio-leds"; 27 compatible = "gpio-leds";
36 pinctrl-names = "default"; 28 pinctrl-names = "default";
37 pinctrl-0 = <&module_led_pin>; 29 pinctrl-0 = <&module_led_pin>;
38 30
39 /* Named LED1 on the board */ 31 /* Named LED1 on the board */
40 led-1 { 32 led-1 {
41 gpios = <&gpio1 RK_PD3 33 gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
42 function = LED_FUNCTIO 34 function = LED_FUNCTION_HEARTBEAT;
43 linux,default-trigger 35 linux,default-trigger = "heartbeat";
44 color = <LED_COLOR_ID_ 36 color = <LED_COLOR_ID_AMBER>;
45 }; 37 };
46 }; 38 };
47 39
48 /* 40 /*
49 * 100MHz reference clock for PCIe per 41 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE
50 * clock generator. 42 * clock generator.
51 * The clock output is gated via the O 43 * The clock output is gated via the OE pin on the clock generator.
52 * This is modeled as a fixed-clock pl 44 * This is modeled as a fixed-clock plus a gpio-gate-clock.
53 */ 45 */
54 pcie_refclk_gen: pcie-refclk-gen-clock 46 pcie_refclk_gen: pcie-refclk-gen-clock {
55 compatible = "fixed-clock"; 47 compatible = "fixed-clock";
56 #clock-cells = <0>; 48 #clock-cells = <0>;
57 clock-frequency = <100000000>; !! 49 clock-frequency = <1000000000>;
58 }; 50 };
59 51
60 pcie_refclk: pcie-refclk-clock { 52 pcie_refclk: pcie-refclk-clock {
61 compatible = "gpio-gate-clock" 53 compatible = "gpio-gate-clock";
62 clocks = <&pcie_refclk_gen>; 54 clocks = <&pcie_refclk_gen>;
63 #clock-cells = <0>; 55 #clock-cells = <0>;
64 enable-gpios = <&gpio4 RK_PB4 56 enable-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; /* PCIE30X4_CLKREQN_M1_L */
65 }; 57 };
66 58
67 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regul 59 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
68 compatible = "regulator-fixed" 60 compatible = "regulator-fixed";
69 regulator-name = "vcc_1v1_nldo 61 regulator-name = "vcc_1v1_nldo_s3";
70 regulator-always-on; 62 regulator-always-on;
71 regulator-boot-on; 63 regulator-boot-on;
72 regulator-min-microvolt = <110 64 regulator-min-microvolt = <1100000>;
73 regulator-max-microvolt = <110 65 regulator-max-microvolt = <1100000>;
74 vin-supply = <&vcc5v0_sys>; 66 vin-supply = <&vcc5v0_sys>;
75 }; 67 };
76 68
77 vcc_1v2_s3: vcc-1v2-s3-regulator { 69 vcc_1v2_s3: vcc-1v2-s3-regulator {
78 compatible = "regulator-fixed" 70 compatible = "regulator-fixed";
79 regulator-name = "vcc_1v2_s3"; 71 regulator-name = "vcc_1v2_s3";
80 regulator-always-on; 72 regulator-always-on;
81 regulator-boot-on; 73 regulator-boot-on;
82 regulator-min-microvolt = <120 74 regulator-min-microvolt = <1200000>;
83 regulator-max-microvolt = <120 75 regulator-max-microvolt = <1200000>;
84 vin-supply = <&vcc5v0_sys>; 76 vin-supply = <&vcc5v0_sys>;
85 }; 77 };
86 78
87 vcc5v0_sys: vcc5v0-sys-regulator { 79 vcc5v0_sys: vcc5v0-sys-regulator {
88 compatible = "regulator-fixed" 80 compatible = "regulator-fixed";
89 regulator-name = "vcc5v0_sys"; 81 regulator-name = "vcc5v0_sys";
90 regulator-always-on; 82 regulator-always-on;
91 regulator-boot-on; 83 regulator-boot-on;
92 regulator-min-microvolt = <500 84 regulator-min-microvolt = <5000000>;
93 regulator-max-microvolt = <500 85 regulator-max-microvolt = <5000000>;
94 vin-supply = <&vcc5v0_baseboar 86 vin-supply = <&vcc5v0_baseboard>;
95 }; 87 };
96 }; 88 };
97 89
98 &cpu_b0 { 90 &cpu_b0 {
99 cpu-supply = <&vdd_cpu_big0_s0>; 91 cpu-supply = <&vdd_cpu_big0_s0>;
100 }; 92 };
101 93
102 &cpu_b1 { 94 &cpu_b1 {
103 cpu-supply = <&vdd_cpu_big0_s0>; 95 cpu-supply = <&vdd_cpu_big0_s0>;
104 }; 96 };
105 97
106 &cpu_b2 { 98 &cpu_b2 {
107 cpu-supply = <&vdd_cpu_big1_s0>; 99 cpu-supply = <&vdd_cpu_big1_s0>;
108 }; 100 };
109 101
110 &cpu_b3 { 102 &cpu_b3 {
111 cpu-supply = <&vdd_cpu_big1_s0>; 103 cpu-supply = <&vdd_cpu_big1_s0>;
112 }; 104 };
113 105
114 &cpu_l0 { 106 &cpu_l0 {
115 cpu-supply = <&vdd_cpu_lit_s0>; 107 cpu-supply = <&vdd_cpu_lit_s0>;
116 }; 108 };
117 109
118 &cpu_l1 { 110 &cpu_l1 {
119 cpu-supply = <&vdd_cpu_lit_s0>; 111 cpu-supply = <&vdd_cpu_lit_s0>;
120 }; 112 };
121 113
122 &cpu_l2 { 114 &cpu_l2 {
123 cpu-supply = <&vdd_cpu_lit_s0>; 115 cpu-supply = <&vdd_cpu_lit_s0>;
124 }; 116 };
125 117
126 &cpu_l3 { 118 &cpu_l3 {
127 cpu-supply = <&vdd_cpu_lit_s0>; 119 cpu-supply = <&vdd_cpu_lit_s0>;
128 }; 120 };
129 121
130 &gmac0 { 122 &gmac0 {
131 clock_in_out = "output"; 123 clock_in_out = "output";
132 phy-handle = <&rgmii_phy>; 124 phy-handle = <&rgmii_phy>;
133 phy-mode = "rgmii"; 125 phy-mode = "rgmii";
134 phy-supply = <&vcc_1v2_s3>; 126 phy-supply = <&vcc_1v2_s3>;
135 pinctrl-names = "default"; 127 pinctrl-names = "default";
136 pinctrl-0 = <&gmac0_miim 128 pinctrl-0 = <&gmac0_miim
137 &gmac0_rx_bus2 129 &gmac0_rx_bus2
138 &gmac0_tx_bus2 130 &gmac0_tx_bus2
139 &gmac0_rgmii_clk 131 &gmac0_rgmii_clk
140 &gmac0_rgmii_bus 132 &gmac0_rgmii_bus
141 ð0_pins 133 ð0_pins
142 ð_reset>; 134 ð_reset>;
143 tx_delay = <0x10>; 135 tx_delay = <0x10>;
144 rx_delay = <0x10>; 136 rx_delay = <0x10>;
145 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ 137 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>;
146 snps,reset-active-low; 138 snps,reset-active-low;
147 snps,reset-delays-us = <0 10000 100000 139 snps,reset-delays-us = <0 10000 100000>;
148 }; 140 };
149 141
150 &gpu { <<
151 mali-supply = <&vdd_gpu_s0>; <<
152 status = "okay"; <<
153 }; <<
154 <<
155 &i2c1 { 142 &i2c1 {
156 pinctrl-0 = <&i2c1m0_xfer>; 143 pinctrl-0 = <&i2c1m0_xfer>;
157 }; 144 };
158 145
159 &i2c1m0_xfer { 146 &i2c1m0_xfer {
160 rockchip,pins = 147 rockchip,pins =
161 /* i2c1_scl_m0 */ 148 /* i2c1_scl_m0 */
162 <0 RK_PB5 9 &pcfg_pull_none_dr 149 <0 RK_PB5 9 &pcfg_pull_none_drv_level_0>,
163 /* i2c1_sda_m0 */ 150 /* i2c1_sda_m0 */
164 <0 RK_PB6 9 &pcfg_pull_none_dr 151 <0 RK_PB6 9 &pcfg_pull_none_drv_level_0>;
165 }; 152 };
166 153
167 &i2c2 { 154 &i2c2 {
168 pinctrl-0 = <&i2c2m3_xfer>; 155 pinctrl-0 = <&i2c2m3_xfer>;
169 status = "okay"; 156 status = "okay";
170 }; 157 };
171 158
172 &i2c2m3_xfer { 159 &i2c2m3_xfer {
173 rockchip,pins = 160 rockchip,pins =
174 /* i2c2_scl_m3 */ 161 /* i2c2_scl_m3 */
175 <1 RK_PC5 9 &pcfg_pull_none_dr 162 <1 RK_PC5 9 &pcfg_pull_none_drv_level_0>,
176 /* i2c2_sda_m3 */ 163 /* i2c2_sda_m3 */
177 <1 RK_PC4 9 &pcfg_pull_none_dr 164 <1 RK_PC4 9 &pcfg_pull_none_drv_level_0>;
178 }; 165 };
179 166
180 &i2c3 { 167 &i2c3 {
181 pinctrl-0 = <&i2c3m0_xfer>; 168 pinctrl-0 = <&i2c3m0_xfer>;
182 }; 169 };
183 170
184 &i2c4 { 171 &i2c4 {
185 pinctrl-0 = <&i2c4m4_xfer>; 172 pinctrl-0 = <&i2c4m4_xfer>;
186 status = "okay"; 173 status = "okay";
187 174
188 vdd_npu_s0: regulator@42 { 175 vdd_npu_s0: regulator@42 {
189 compatible = "rockchip,rk8602" 176 compatible = "rockchip,rk8602";
190 reg = <0x42>; 177 reg = <0x42>;
191 fcs,suspend-voltage-selector = 178 fcs,suspend-voltage-selector = <1>;
192 regulator-name = "vdd_npu_s0"; 179 regulator-name = "vdd_npu_s0";
193 regulator-always-on; 180 regulator-always-on;
194 regulator-boot-on; 181 regulator-boot-on;
195 regulator-min-microvolt = <550 182 regulator-min-microvolt = <550000>;
196 regulator-max-microvolt = <950 183 regulator-max-microvolt = <950000>;
197 regulator-ramp-delay = <2300>; 184 regulator-ramp-delay = <2300>;
198 vin-supply = <&vcc5v0_sys>; 185 vin-supply = <&vcc5v0_sys>;
199 186
200 regulator-state-mem { 187 regulator-state-mem {
201 regulator-off-in-suspe 188 regulator-off-in-suspend;
202 }; 189 };
203 }; 190 };
204 }; 191 };
205 192
206 &i2c5 { 193 &i2c5 {
207 pinctrl-0 = <&i2c5m1_xfer>; 194 pinctrl-0 = <&i2c5m1_xfer>;
208 }; 195 };
209 196
210 &i2c5m1_xfer { 197 &i2c5m1_xfer {
211 rockchip,pins = 198 rockchip,pins =
212 /* i2c5_scl_m1 */ 199 /* i2c5_scl_m1 */
213 <4 RK_PB6 9 &pcfg_pull_none_dr 200 <4 RK_PB6 9 &pcfg_pull_none_drv_level_0>,
214 /* i2c5_sda_m1 */ 201 /* i2c5_sda_m1 */
215 <4 RK_PB7 9 &pcfg_pull_none_dr 202 <4 RK_PB7 9 &pcfg_pull_none_drv_level_0>;
216 }; 203 };
217 204
218 &i2c6 { 205 &i2c6 {
219 /* 206 /*
220 * Mule-ATtiny can handle up to Fast m 207 * Mule-ATtiny can handle up to Fast mode Plus (1MHz) on I2C bus,
221 * but SOC can handle only up to (400k 208 * but SOC can handle only up to (400kHz).
222 */ 209 */
223 clock-frequency = <400000>; 210 clock-frequency = <400000>;
224 status = "okay"; 211 status = "okay";
225 212
226 fan@18 { 213 fan@18 {
227 compatible = "ti,amc6821"; 214 compatible = "ti,amc6821";
228 reg = <0x18>; 215 reg = <0x18>;
229 }; 216 };
230 217
231 rtc_twi: rtc@6f { 218 rtc_twi: rtc@6f {
232 compatible = "isil,isl1208"; 219 compatible = "isil,isl1208";
233 reg = <0x6f>; 220 reg = <0x6f>;
234 }; 221 };
235 }; 222 };
236 223
237 &i2c6m0_xfer { 224 &i2c6m0_xfer {
238 rockchip,pins = 225 rockchip,pins =
239 /* i2c6_scl_m0 */ 226 /* i2c6_scl_m0 */
240 <0 RK_PD0 9 &pcfg_pull_none_dr 227 <0 RK_PD0 9 &pcfg_pull_none_drv_level_0>,
241 /* i2c6_sda_m0 */ 228 /* i2c6_sda_m0 */
242 <0 RK_PC7 9 &pcfg_pull_none_dr 229 <0 RK_PC7 9 &pcfg_pull_none_drv_level_0>;
243 }; 230 };
244 231
245 &i2c7 { 232 &i2c7 {
246 status = "okay"; 233 status = "okay";
247 234
248 vdd_cpu_big0_s0: regulator@42 { 235 vdd_cpu_big0_s0: regulator@42 {
249 compatible = "rockchip,rk8602" 236 compatible = "rockchip,rk8602";
250 reg = <0x42>; 237 reg = <0x42>;
251 fcs,suspend-voltage-selector = 238 fcs,suspend-voltage-selector = <1>;
252 regulator-name = "vdd_cpu_big0 239 regulator-name = "vdd_cpu_big0_s0";
253 regulator-always-on; 240 regulator-always-on;
254 regulator-boot-on; 241 regulator-boot-on;
255 regulator-min-microvolt = <550 242 regulator-min-microvolt = <550000>;
256 regulator-max-microvolt = <105 243 regulator-max-microvolt = <1050000>;
257 regulator-ramp-delay = <2300>; 244 regulator-ramp-delay = <2300>;
258 vin-supply = <&vcc5v0_sys>; 245 vin-supply = <&vcc5v0_sys>;
259 246
260 regulator-state-mem { 247 regulator-state-mem {
261 regulator-off-in-suspe 248 regulator-off-in-suspend;
262 }; 249 };
263 }; 250 };
264 251
265 vdd_cpu_big1_s0: regulator@43 { 252 vdd_cpu_big1_s0: regulator@43 {
266 compatible = "rockchip,rk8603" 253 compatible = "rockchip,rk8603", "rockchip,rk8602";
267 reg = <0x43>; 254 reg = <0x43>;
268 fcs,suspend-voltage-selector = 255 fcs,suspend-voltage-selector = <1>;
269 regulator-name = "vdd_cpu_big1 256 regulator-name = "vdd_cpu_big1_s0";
270 regulator-always-on; 257 regulator-always-on;
271 regulator-boot-on; 258 regulator-boot-on;
272 regulator-min-microvolt = <550 259 regulator-min-microvolt = <550000>;
273 regulator-max-microvolt = <105 260 regulator-max-microvolt = <1050000>;
274 regulator-ramp-delay = <2300>; 261 regulator-ramp-delay = <2300>;
275 vin-supply = <&vcc5v0_sys>; 262 vin-supply = <&vcc5v0_sys>;
276 263
277 regulator-state-mem { 264 regulator-state-mem {
278 regulator-off-in-suspe 265 regulator-off-in-suspend;
279 }; 266 };
280 }; 267 };
281 }; 268 };
282 269
283 &i2c7m0_xfer { 270 &i2c7m0_xfer {
284 rockchip,pins = 271 rockchip,pins =
285 /* i2c7_scl_m0 */ 272 /* i2c7_scl_m0 */
286 <1 RK_PD0 9 &pcfg_pull_none_dr 273 <1 RK_PD0 9 &pcfg_pull_none_drv_level_0>,
287 /* i2c7_sda_m0 */ 274 /* i2c7_sda_m0 */
288 <1 RK_PD1 9 &pcfg_pull_none_dr 275 <1 RK_PD1 9 &pcfg_pull_none_drv_level_0>;
289 }; 276 };
290 277
291 &i2c8 { 278 &i2c8 {
292 pinctrl-0 = <&i2c8m2_xfer>; 279 pinctrl-0 = <&i2c8m2_xfer>;
293 }; 280 };
294 281
295 &mdio0 { 282 &mdio0 {
296 rgmii_phy: ethernet-phy@6 { 283 rgmii_phy: ethernet-phy@6 {
297 /* KSZ9031 or KSZ9131 */ 284 /* KSZ9031 or KSZ9131 */
298 compatible = "ethernet-phy-iee 285 compatible = "ethernet-phy-ieee802.3-c22";
299 reg = <0x6>; 286 reg = <0x6>;
300 clocks = <&cru REFCLKO25M_ETH0 287 clocks = <&cru REFCLKO25M_ETH0_OUT>;
301 }; 288 };
302 }; 289 };
303 290
304 &pcie3x4 { 291 &pcie3x4 {
305 /* 292 /*
306 * The board has a gpio-controlled "pc 293 * The board has a gpio-controlled "pcie_refclk" generator,
307 * so add it to the list of clocks. 294 * so add it to the list of clocks.
308 */ 295 */
309 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&c 296 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
310 <&cru ACLK_PCIE_4L_DBI>, <&cr 297 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
311 <&cru CLK_PCIE_AUX0>, <&cru C 298 <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>,
312 <&pcie_refclk>; 299 <&pcie_refclk>;
313 clock-names = "aclk_mst", "aclk_slv", 300 clock-names = "aclk_mst", "aclk_slv",
314 "aclk_dbi", "pclk", 301 "aclk_dbi", "pclk",
315 "aux", "pipe", 302 "aux", "pipe",
316 "ref"; 303 "ref";
317 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTI 304 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
318 }; 305 };
319 306
320 &pinctrl { 307 &pinctrl {
321 emmc { 308 emmc {
322 emmc_reset: emmc-reset { 309 emmc_reset: emmc-reset {
323 rockchip,pins = <2 RK_ 310 rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
324 }; 311 };
325 }; 312 };
326 313
327 ethernet { 314 ethernet {
328 eth_reset: eth-reset { 315 eth_reset: eth-reset {
329 rockchip,pins = <4 RK_ 316 rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
330 }; 317 };
331 }; 318 };
332 319
333 leds { 320 leds {
334 module_led_pin: module-led-pin 321 module_led_pin: module-led-pin {
335 rockchip,pins = <1 RK_ 322 rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
336 }; 323 };
337 }; 324 };
338 <<
339 usb3 { <<
340 usb3_id: usb3-id { <<
341 rockchip,pins = <<
342 <3 RK_PC0 RK_FUNC_GP <<
343 }; <<
344 }; <<
345 }; 325 };
346 326
347 &pwm0 { 327 &pwm0 {
348 pinctrl-0 = <&pwm0m1_pins>; 328 pinctrl-0 = <&pwm0m1_pins>;
349 pinctrl-names = "default"; 329 pinctrl-names = "default";
350 }; 330 };
351 331
352 &saradc { 332 &saradc {
353 vref-supply = <&vcc_1v8_s0>; 333 vref-supply = <&vcc_1v8_s0>;
354 status = "okay"; 334 status = "okay";
355 }; 335 };
356 336
357 &sdhci { 337 &sdhci {
358 bus-width = <8>; 338 bus-width = <8>;
359 cap-mmc-highspeed; 339 cap-mmc-highspeed;
360 mmc-ddr-1_8v; 340 mmc-ddr-1_8v;
361 mmc-hs200-1_8v; 341 mmc-hs200-1_8v;
362 mmc-hs400-1_8v; 342 mmc-hs400-1_8v;
363 mmc-hs400-enhanced-strobe; 343 mmc-hs400-enhanced-strobe;
364 mmc-pwrseq = <&emmc_pwrseq>; 344 mmc-pwrseq = <&emmc_pwrseq>;
365 no-sdio; 345 no-sdio;
366 no-sd; 346 no-sd;
367 non-removable; 347 non-removable;
368 pinctrl-names = "default"; 348 pinctrl-names = "default";
369 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emm 349 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
370 supports-cqe; 350 supports-cqe;
371 vmmc-supply = <&vcc_3v3_s3>; 351 vmmc-supply = <&vcc_3v3_s3>;
372 vqmmc-supply = <&vcc_1v8_s3>; 352 vqmmc-supply = <&vcc_1v8_s3>;
373 status = "okay"; 353 status = "okay";
374 }; 354 };
375 355
376 &sdmmc { 356 &sdmmc {
377 bus-width = <4>; 357 bus-width = <4>;
378 cap-sd-highspeed; 358 cap-sd-highspeed;
379 max-frequency = <150000000>; 359 max-frequency = <150000000>;
380 vqmmc-supply = <&vccio_sd_s0>; 360 vqmmc-supply = <&vccio_sd_s0>;
381 }; 361 };
382 362
383 &spi0 { 363 &spi0 {
384 pinctrl-0 = <&spi0m1_cs0 &spi0m1_cs1 & 364 pinctrl-0 = <&spi0m1_cs0 &spi0m1_cs1 &spi0m3_pins>;
385 }; 365 };
386 366
387 &spi2 { 367 &spi2 {
388 assigned-clocks = <&cru CLK_SPI2>; 368 assigned-clocks = <&cru CLK_SPI2>;
389 assigned-clock-rates = <200000000>; 369 assigned-clock-rates = <200000000>;
390 num-cs = <1>; 370 num-cs = <1>;
391 pinctrl-names = "default"; 371 pinctrl-names = "default";
392 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins> 372 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
393 status = "okay"; 373 status = "okay";
394 374
395 pmic@0 { 375 pmic@0 {
396 compatible = "rockchip,rk806"; 376 compatible = "rockchip,rk806";
397 reg = <0x0>; 377 reg = <0x0>;
398 interrupt-parent = <&gpio0>; 378 interrupt-parent = <&gpio0>;
399 interrupts = <7 IRQ_TYPE_LEVEL 379 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
400 gpio-controller; 380 gpio-controller;
401 #gpio-cells = <2>; 381 #gpio-cells = <2>;
402 pinctrl-names = "default"; 382 pinctrl-names = "default";
403 pinctrl-0 = <&pmic_pins>, <&rk 383 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
404 <&rk806_dvs2_null> 384 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
405 spi-max-frequency = <1000000>; 385 spi-max-frequency = <1000000>;
406 system-power-controller; 386 system-power-controller;
407 vcc1-supply = <&vcc5v0_sys>; 387 vcc1-supply = <&vcc5v0_sys>;
408 vcc2-supply = <&vcc5v0_sys>; 388 vcc2-supply = <&vcc5v0_sys>;
409 vcc3-supply = <&vcc5v0_sys>; 389 vcc3-supply = <&vcc5v0_sys>;
410 vcc4-supply = <&vcc5v0_sys>; 390 vcc4-supply = <&vcc5v0_sys>;
411 vcc5-supply = <&vcc5v0_sys>; 391 vcc5-supply = <&vcc5v0_sys>;
412 vcc6-supply = <&vcc5v0_sys>; 392 vcc6-supply = <&vcc5v0_sys>;
413 vcc7-supply = <&vcc5v0_sys>; 393 vcc7-supply = <&vcc5v0_sys>;
414 vcc8-supply = <&vcc5v0_sys>; 394 vcc8-supply = <&vcc5v0_sys>;
415 vcc9-supply = <&vcc5v0_sys>; 395 vcc9-supply = <&vcc5v0_sys>;
416 vcc10-supply = <&vcc5v0_sys>; 396 vcc10-supply = <&vcc5v0_sys>;
417 vcc11-supply = <&vcc_2v0_pldo_ 397 vcc11-supply = <&vcc_2v0_pldo_s3>;
418 vcc12-supply = <&vcc5v0_sys>; 398 vcc12-supply = <&vcc5v0_sys>;
419 vcc13-supply = <&vcc_1v1_nldo_ 399 vcc13-supply = <&vcc_1v1_nldo_s3>;
420 vcc14-supply = <&vcc_1v1_nldo_ 400 vcc14-supply = <&vcc_1v1_nldo_s3>;
421 vcca-supply = <&vcc5v0_sys>; 401 vcca-supply = <&vcc5v0_sys>;
422 402
423 rk806_dvs1_null: dvs1-null-pin 403 rk806_dvs1_null: dvs1-null-pins {
424 pins = "gpio_pwrctrl1" !! 404 pins = "gpio_pwrctrl2";
425 function = "pin_fun0"; 405 function = "pin_fun0";
426 }; 406 };
427 407
428 rk806_dvs2_null: dvs2-null-pin 408 rk806_dvs2_null: dvs2-null-pins {
429 pins = "gpio_pwrctrl2" 409 pins = "gpio_pwrctrl2";
430 function = "pin_fun0"; 410 function = "pin_fun0";
431 }; 411 };
432 412
433 rk806_dvs3_null: dvs3-null-pin 413 rk806_dvs3_null: dvs3-null-pins {
434 pins = "gpio_pwrctrl3" 414 pins = "gpio_pwrctrl3";
435 function = "pin_fun0"; 415 function = "pin_fun0";
436 }; 416 };
437 417
438 regulators { 418 regulators {
439 vdd_gpu_s0: dcdc-reg1 419 vdd_gpu_s0: dcdc-reg1 {
440 regulator-boot 420 regulator-boot-on;
441 regulator-min- 421 regulator-min-microvolt = <550000>;
442 regulator-max- 422 regulator-max-microvolt = <950000>;
443 regulator-ramp 423 regulator-ramp-delay = <12500>;
444 regulator-name 424 regulator-name = "vdd_gpu_s0";
445 regulator-enab 425 regulator-enable-ramp-delay = <400>;
446 426
447 regulator-stat 427 regulator-state-mem {
448 regula 428 regulator-off-in-suspend;
449 }; 429 };
450 }; 430 };
451 431
452 vdd_cpu_lit_s0: dcdc-r 432 vdd_cpu_lit_s0: dcdc-reg2 {
453 regulator-name 433 regulator-name = "vdd_cpu_lit_s0";
454 regulator-alwa 434 regulator-always-on;
455 regulator-boot 435 regulator-boot-on;
456 regulator-min- 436 regulator-min-microvolt = <550000>;
457 regulator-max- 437 regulator-max-microvolt = <950000>;
458 regulator-ramp 438 regulator-ramp-delay = <12500>;
459 439
460 regulator-stat 440 regulator-state-mem {
461 regula 441 regulator-off-in-suspend;
462 }; 442 };
463 }; 443 };
464 444
465 vdd_log_s0: dcdc-reg3 445 vdd_log_s0: dcdc-reg3 {
466 regulator-name 446 regulator-name = "vdd_log_s0";
467 regulator-alwa 447 regulator-always-on;
468 regulator-boot 448 regulator-boot-on;
469 regulator-min- 449 regulator-min-microvolt = <675000>;
470 regulator-max- 450 regulator-max-microvolt = <750000>;
471 regulator-ramp 451 regulator-ramp-delay = <12500>;
472 452
473 regulator-stat 453 regulator-state-mem {
474 regula 454 regulator-off-in-suspend;
475 regula 455 regulator-suspend-microvolt = <750000>;
476 }; 456 };
477 }; 457 };
478 458
479 vdd_vdenc_s0: dcdc-reg 459 vdd_vdenc_s0: dcdc-reg4 {
480 regulator-name 460 regulator-name = "vdd_vdenc_s0";
481 regulator-alwa 461 regulator-always-on;
482 regulator-boot 462 regulator-boot-on;
483 regulator-min- 463 regulator-min-microvolt = <550000>;
484 regulator-max- 464 regulator-max-microvolt = <950000>;
485 regulator-ramp 465 regulator-ramp-delay = <12500>;
486 466
487 regulator-stat 467 regulator-state-mem {
488 regula 468 regulator-off-in-suspend;
489 }; 469 };
490 }; 470 };
491 471
492 vdd_ddr_s0: dcdc-reg5 472 vdd_ddr_s0: dcdc-reg5 {
493 regulator-name 473 regulator-name = "vdd_ddr_s0";
494 regulator-alwa 474 regulator-always-on;
495 regulator-boot 475 regulator-boot-on;
496 regulator-min- 476 regulator-min-microvolt = <675000>;
497 regulator-max- 477 regulator-max-microvolt = <900000>;
498 regulator-ramp 478 regulator-ramp-delay = <12500>;
499 479
500 regulator-stat 480 regulator-state-mem {
501 regula 481 regulator-off-in-suspend;
502 regula 482 regulator-suspend-microvolt = <850000>;
503 }; 483 };
504 }; 484 };
505 485
506 vdd2_ddr_s3: dcdc-reg6 486 vdd2_ddr_s3: dcdc-reg6 {
507 regulator-name 487 regulator-name = "vdd2_ddr_s3";
508 regulator-alwa 488 regulator-always-on;
509 regulator-boot 489 regulator-boot-on;
510 490
511 regulator-stat 491 regulator-state-mem {
512 regula 492 regulator-on-in-suspend;
513 }; 493 };
514 }; 494 };
515 495
516 vcc_2v0_pldo_s3: dcdc- 496 vcc_2v0_pldo_s3: dcdc-reg7 {
517 regulator-name 497 regulator-name = "vcc_2v0_pldo_s3";
518 regulator-alwa 498 regulator-always-on;
519 regulator-boot 499 regulator-boot-on;
520 regulator-min- 500 regulator-min-microvolt = <2000000>;
521 regulator-max- 501 regulator-max-microvolt = <2000000>;
522 regulator-ramp 502 regulator-ramp-delay = <12500>;
523 503
524 regulator-stat 504 regulator-state-mem {
525 regula 505 regulator-on-in-suspend;
526 regula 506 regulator-suspend-microvolt = <2000000>;
527 }; 507 };
528 }; 508 };
529 509
530 vcc_3v3_s3: dcdc-reg8 510 vcc_3v3_s3: dcdc-reg8 {
531 regulator-name 511 regulator-name = "vcc_3v3_s3";
532 regulator-alwa 512 regulator-always-on;
533 regulator-boot 513 regulator-boot-on;
534 regulator-min- 514 regulator-min-microvolt = <3300000>;
535 regulator-max- 515 regulator-max-microvolt = <3300000>;
536 516
537 regulator-stat 517 regulator-state-mem {
538 regula 518 regulator-on-in-suspend;
539 regula 519 regulator-suspend-microvolt = <3300000>;
540 }; 520 };
541 }; 521 };
542 522
543 vddq_ddr_s0: dcdc-reg9 523 vddq_ddr_s0: dcdc-reg9 {
544 regulator-name 524 regulator-name = "vddq_ddr_s0";
545 regulator-alwa 525 regulator-always-on;
546 regulator-boot 526 regulator-boot-on;
547 527
548 regulator-stat 528 regulator-state-mem {
549 regula 529 regulator-off-in-suspend;
550 }; 530 };
551 }; 531 };
552 532
553 vcc_1v8_s3: dcdc-reg10 533 vcc_1v8_s3: dcdc-reg10 {
554 regulator-name 534 regulator-name = "vcc_1v8_s3";
555 regulator-alwa 535 regulator-always-on;
556 regulator-boot 536 regulator-boot-on;
557 regulator-min- 537 regulator-min-microvolt = <1800000>;
558 regulator-max- 538 regulator-max-microvolt = <1800000>;
559 539
560 regulator-stat 540 regulator-state-mem {
561 regula 541 regulator-on-in-suspend;
562 regula 542 regulator-suspend-microvolt = <1800000>;
563 }; 543 };
564 }; 544 };
565 545
566 vcca_1v8_s0: pldo-reg1 546 vcca_1v8_s0: pldo-reg1 {
567 regulator-name 547 regulator-name = "vcca_1v8_s0";
568 regulator-alwa 548 regulator-always-on;
569 regulator-boot 549 regulator-boot-on;
570 regulator-min- 550 regulator-min-microvolt = <1800000>;
571 regulator-max- 551 regulator-max-microvolt = <1800000>;
572 552
573 regulator-stat 553 regulator-state-mem {
574 regula 554 regulator-off-in-suspend;
575 }; 555 };
576 }; 556 };
577 557
578 vcc_1v8_s0: pldo-reg2 558 vcc_1v8_s0: pldo-reg2 {
579 regulator-name 559 regulator-name = "vcc_1v8_s0";
580 regulator-alwa 560 regulator-always-on;
581 regulator-boot 561 regulator-boot-on;
582 regulator-min- 562 regulator-min-microvolt = <1800000>;
583 regulator-max- 563 regulator-max-microvolt = <1800000>;
584 564
585 regulator-stat 565 regulator-state-mem {
586 regula 566 regulator-off-in-suspend;
587 regula 567 regulator-suspend-microvolt = <1800000>;
588 }; 568 };
589 }; 569 };
590 570
591 vdda_1v2_s0: pldo-reg3 571 vdda_1v2_s0: pldo-reg3 {
592 regulator-name 572 regulator-name = "vdda_1v2_s0";
593 regulator-alwa 573 regulator-always-on;
594 regulator-boot 574 regulator-boot-on;
595 regulator-min- 575 regulator-min-microvolt = <1200000>;
596 regulator-max- 576 regulator-max-microvolt = <1200000>;
597 577
598 regulator-stat 578 regulator-state-mem {
599 regula 579 regulator-off-in-suspend;
600 }; 580 };
601 }; 581 };
602 582
603 vcca_3v3_s0: pldo-reg4 583 vcca_3v3_s0: pldo-reg4 {
604 regulator-name 584 regulator-name = "vcca_3v3_s0";
605 regulator-alwa 585 regulator-always-on;
606 regulator-boot 586 regulator-boot-on;
607 regulator-min- 587 regulator-min-microvolt = <3300000>;
608 regulator-max- 588 regulator-max-microvolt = <3300000>;
609 regulator-ramp 589 regulator-ramp-delay = <12500>;
610 590
611 regulator-stat 591 regulator-state-mem {
612 regula 592 regulator-off-in-suspend;
613 }; 593 };
614 }; 594 };
615 595
616 vccio_sd_s0: pldo-reg5 596 vccio_sd_s0: pldo-reg5 {
617 regulator-name 597 regulator-name = "vccio_sd_s0";
618 regulator-alwa 598 regulator-always-on;
619 regulator-boot 599 regulator-boot-on;
620 regulator-min- 600 regulator-min-microvolt = <1800000>;
621 regulator-max- 601 regulator-max-microvolt = <3300000>;
622 regulator-ramp 602 regulator-ramp-delay = <12500>;
623 603
624 regulator-stat 604 regulator-state-mem {
625 regula 605 regulator-off-in-suspend;
626 }; 606 };
627 }; 607 };
628 608
629 pldo6_s3: pldo-reg6 { 609 pldo6_s3: pldo-reg6 {
630 regulator-name 610 regulator-name = "pldo6_s3";
631 regulator-alwa 611 regulator-always-on;
632 regulator-boot 612 regulator-boot-on;
633 regulator-min- 613 regulator-min-microvolt = <1800000>;
634 regulator-max- 614 regulator-max-microvolt = <1800000>;
635 615
636 regulator-stat 616 regulator-state-mem {
637 regula 617 regulator-on-in-suspend;
638 regula 618 regulator-suspend-microvolt = <1800000>;
639 }; 619 };
640 }; 620 };
641 621
642 vdd_0v75_s3: nldo-reg1 622 vdd_0v75_s3: nldo-reg1 {
643 regulator-name 623 regulator-name = "vdd_0v75_s3";
644 regulator-alwa 624 regulator-always-on;
645 regulator-boot 625 regulator-boot-on;
646 regulator-min- 626 regulator-min-microvolt = <750000>;
647 regulator-max- 627 regulator-max-microvolt = <750000>;
648 628
649 regulator-stat 629 regulator-state-mem {
650 regula 630 regulator-on-in-suspend;
651 regula 631 regulator-suspend-microvolt = <750000>;
652 }; 632 };
653 }; 633 };
654 634
655 vdda_ddr_pll_s0: nldo- 635 vdda_ddr_pll_s0: nldo-reg2 {
656 regulator-name 636 regulator-name = "vdda_ddr_pll_s0";
657 regulator-alwa 637 regulator-always-on;
658 regulator-boot 638 regulator-boot-on;
659 regulator-min- 639 regulator-min-microvolt = <850000>;
660 regulator-max- 640 regulator-max-microvolt = <850000>;
661 641
662 regulator-stat 642 regulator-state-mem {
663 regula 643 regulator-off-in-suspend;
664 regula 644 regulator-suspend-microvolt = <850000>;
665 }; 645 };
666 }; 646 };
667 647
668 vdda_0v75_s0: nldo-reg 648 vdda_0v75_s0: nldo-reg3 {
669 regulator-name 649 regulator-name = "vdda_0v75_s0";
670 regulator-alwa 650 regulator-always-on;
671 regulator-boot 651 regulator-boot-on;
672 regulator-min- 652 regulator-min-microvolt = <750000>;
673 regulator-max- 653 regulator-max-microvolt = <750000>;
674 654
675 regulator-stat 655 regulator-state-mem {
676 regula 656 regulator-off-in-suspend;
677 }; 657 };
678 }; 658 };
679 659
680 vdda_0v85_s0: nldo-reg 660 vdda_0v85_s0: nldo-reg4 {
681 regulator-name 661 regulator-name = "vdda_0v85_s0";
682 regulator-alwa 662 regulator-always-on;
683 regulator-boot 663 regulator-boot-on;
684 regulator-min- 664 regulator-min-microvolt = <850000>;
685 regulator-max- 665 regulator-max-microvolt = <850000>;
686 666
687 regulator-stat 667 regulator-state-mem {
688 regula 668 regulator-off-in-suspend;
689 }; 669 };
690 }; 670 };
691 671
692 vdd_0v75_s0: nldo-reg5 672 vdd_0v75_s0: nldo-reg5 {
693 regulator-name 673 regulator-name = "vdd_0v75_s0";
694 regulator-alwa 674 regulator-always-on;
695 regulator-boot 675 regulator-boot-on;
696 regulator-min- 676 regulator-min-microvolt = <750000>;
697 regulator-max- 677 regulator-max-microvolt = <750000>;
698 678
699 regulator-stat 679 regulator-state-mem {
700 regula 680 regulator-off-in-suspend;
701 }; 681 };
702 }; 682 };
703 }; 683 };
704 }; 684 };
705 }; 685 };
706 686
707 &tsadc { 687 &tsadc {
708 status = "okay"; 688 status = "okay";
709 }; <<
710 <<
711 /* Routed to UART0 on the Q7 connector */ <<
712 &uart2 { <<
713 pinctrl-0 = <&uart2m2_xfer>; <<
714 }; 689 };
715 690
716 /* Mule-ATtiny UPDI */ 691 /* Mule-ATtiny UPDI */
717 &uart4 { 692 &uart4 {
718 pinctrl-0 = <&uart4m2_xfer>; 693 pinctrl-0 = <&uart4m2_xfer>;
719 status = "okay"; 694 status = "okay";
720 }; 695 };
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