1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2024 Rockchip Electronics Co.
4 *
5 */
6
7 /dts-v1/;
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include "rk3588.dtsi"
13
14 / {
15 model = "Rockchip Toybrick TB-RK3588X
16 compatible = "rockchip,rk3588-toybrick
17
18 aliases {
19 mmc0 = &sdhci;
20 };
21
22 chosen {
23 stdout-path = "serial2:1500000
24 };
25
26 adc-keys {
27 compatible = "adc-keys";
28 io-channels = <&saradc 1>;
29 io-channel-names = "buttons";
30 keyup-threshold-microvolt = <1
31 poll-interval = <100>;
32
33 button-vol-up {
34 label = "Volume Up";
35 linux,code = <KEY_VOLU
36 press-threshold-microv
37 };
38
39 button-vol-down {
40 label = "Volume Down";
41 linux,code = <KEY_VOLU
42 press-threshold-microv
43 };
44
45 button-menu {
46 label = "Menu";
47 linux,code = <KEY_MENU
48 press-threshold-microv
49 };
50
51 button-escape {
52 label = "Escape";
53 linux,code = <KEY_ESC>
54 press-threshold-microv
55 };
56 };
57
58 backlight: backlight {
59 compatible = "pwm-backlight";
60 power-supply = <&vcc12v_dcin>;
61 pwms = <&pwm2 0 25000 0>;
62 };
63
64 pcie20_avdd0v85: pcie20-avdd0v85-regul
65 compatible = "regulator-fixed"
66 regulator-name = "pcie20_avdd0
67 regulator-always-on;
68 regulator-boot-on;
69 regulator-min-microvolt = <850
70 regulator-max-microvolt = <850
71 vin-supply = <&vdd_0v85_s0>;
72 };
73
74 pcie20_avdd1v8: pcie20-avdd1v8-regulat
75 compatible = "regulator-fixed"
76 regulator-name = "pcie20_avdd1
77 regulator-always-on;
78 regulator-boot-on;
79 regulator-min-microvolt = <180
80 regulator-max-microvolt = <180
81 vin-supply = <&avcc_1v8_s0>;
82 };
83
84 pcie30_avdd0v75: pcie30-avdd0v75-regul
85 compatible = "regulator-fixed"
86 regulator-name = "pcie30_avdd0
87 regulator-always-on;
88 regulator-boot-on;
89 regulator-min-microvolt = <750
90 regulator-max-microvolt = <750
91 vin-supply = <&avdd_0v75_s0>;
92 };
93
94 pcie30_avdd1v8: pcie30-avdd1v8-regulat
95 compatible = "regulator-fixed"
96 regulator-name = "pcie30_avdd1
97 regulator-always-on;
98 regulator-boot-on;
99 regulator-min-microvolt = <180
100 regulator-max-microvolt = <180
101 vin-supply = <&avcc_1v8_s0>;
102 };
103
104 vcc12v_dcin: vcc12v-dcin-regulator {
105 compatible = "regulator-fixed"
106 regulator-name = "vcc12v_dcin"
107 regulator-always-on;
108 regulator-boot-on;
109 regulator-min-microvolt = <120
110 regulator-max-microvolt = <120
111 };
112
113 vcc5v0_host: vcc5v0-host-regulator {
114 compatible = "regulator-fixed"
115 enable-active-high;
116 gpio = <&gpio4 RK_PB0 GPIO_ACT
117 pinctrl-names = "default";
118 pinctrl-0 = <&vcc5v0_host_en>;
119 regulator-name = "vcc5v0_host"
120 regulator-boot-on;
121 regulator-always-on;
122 regulator-min-microvolt = <500
123 regulator-max-microvolt = <500
124 vin-supply = <&vcc5v0_usb>;
125 };
126
127 vcc5v0_sys: vcc5v0-sys-regulator {
128 compatible = "regulator-fixed"
129 regulator-name = "vcc5v0_sys";
130 regulator-always-on;
131 regulator-boot-on;
132 regulator-min-microvolt = <500
133 regulator-max-microvolt = <500
134 vin-supply = <&vcc12v_dcin>;
135 };
136
137 vcc5v0_usbdcin: vcc5v0-usbdcin-regulat
138 compatible = "regulator-fixed"
139 regulator-name = "vcc5v0_usbdc
140 regulator-always-on;
141 regulator-boot-on;
142 regulator-min-microvolt = <500
143 regulator-max-microvolt = <500
144 vin-supply = <&vcc12v_dcin>;
145 };
146
147 vcc5v0_usb: vcc5v0-usb-regulator {
148 compatible = "regulator-fixed"
149 regulator-name = "vcc5v0_usb";
150 regulator-always-on;
151 regulator-boot-on;
152 regulator-min-microvolt = <500
153 regulator-max-microvolt = <500
154 vin-supply = <&vcc5v0_usbdcin>
155 };
156
157 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regul
158 compatible = "regulator-fixed"
159 regulator-name = "vcc_1v1_nldo
160 regulator-always-on;
161 regulator-boot-on;
162 regulator-min-microvolt = <110
163 regulator-max-microvolt = <110
164 vin-supply = <&vcc5v0_sys>;
165 };
166 };
167
168 &combphy0_ps {
169 status = "okay";
170 };
171
172 &combphy2_psu {
173 status = "okay";
174 };
175
176 &cpu_b0 {
177 cpu-supply = <&vdd_cpu_big0_s0>;
178 };
179
180 &cpu_b1 {
181 cpu-supply = <&vdd_cpu_big0_s0>;
182 };
183
184 &cpu_b2 {
185 cpu-supply = <&vdd_cpu_big1_s0>;
186 };
187
188 &cpu_b3 {
189 cpu-supply = <&vdd_cpu_big1_s0>;
190 };
191
192 &cpu_l0 {
193 cpu-supply = <&vdd_cpu_lit_s0>;
194 };
195
196 &cpu_l1 {
197 cpu-supply = <&vdd_cpu_lit_s0>;
198 };
199
200 &cpu_l2 {
201 cpu-supply = <&vdd_cpu_lit_s0>;
202 };
203
204 &cpu_l3 {
205 cpu-supply = <&vdd_cpu_lit_s0>;
206 };
207
208 &gmac0 {
209 clock_in_out = "output";
210 phy-handle = <&rgmii_phy>;
211 phy-mode = "rgmii-rxid";
212 pinctrl-0 = <&gmac0_miim
213 &gmac0_tx_bus2
214 &gmac0_rx_bus2
215 &gmac0_rgmii_clk
216 &gmac0_rgmii_bus>;
217 pinctrl-names = "default";
218 rx_delay = <0x00>;
219 tx_delay = <0x43>;
220 status = "okay";
221 };
222
223 &i2c0 {
224 pinctrl-names = "default";
225 pinctrl-0 = <&i2c0m2_xfer>;
226 status = "okay";
227
228 vdd_cpu_big0_s0: regulator@42 {
229 compatible = "rockchip,rk8602"
230 reg = <0x42>;
231 fcs,suspend-voltage-selector =
232 regulator-name = "vdd_cpu_big0
233 regulator-always-on;
234 regulator-boot-on;
235 regulator-min-microvolt = <550
236 regulator-max-microvolt = <105
237 regulator-ramp-delay = <2300>;
238 vin-supply = <&vcc5v0_sys>;
239
240 regulator-state-mem {
241 regulator-off-in-suspe
242 };
243 };
244
245 vdd_cpu_big1_s0: regulator@43 {
246 compatible = "rockchip,rk8603"
247 reg = <0x43>;
248 fcs,suspend-voltage-selector =
249 regulator-name = "vdd_cpu_big1
250 regulator-always-on;
251 regulator-boot-on;
252 regulator-min-microvolt = <550
253 regulator-max-microvolt = <105
254 regulator-ramp-delay = <2300>;
255 vin-supply = <&vcc5v0_sys>;
256
257 regulator-state-mem {
258 regulator-off-in-suspe
259 };
260 };
261 };
262
263 &i2c2 {
264 status = "okay";
265
266 hym8563: rtc@51 {
267 compatible = "haoyu,hym8563";
268 reg = <0x51>;
269 #clock-cells = <0>;
270 clock-output-names = "hym8563"
271 interrupt-parent = <&gpio0>;
272 interrupts = <RK_PD4 IRQ_TYPE_
273 pinctrl-names = "default";
274 pinctrl-0 = <&hym8563_int>;
275 wakeup-source;
276 };
277 };
278
279 &mdio0 {
280 rgmii_phy: ethernet-phy@1 {
281 /* RTL8211F */
282 compatible = "ethernet-phy-id0
283 reg = <0x1>;
284 pinctrl-names = "default";
285 pinctrl-0 = <&rtl8211f_rst>;
286 reset-assert-us = <20000>;
287 reset-deassert-us = <100000>;
288 reset-gpios = <&gpio4 RK_PB3 G
289 };
290 };
291
292 &pinctrl {
293 rtl8211f {
294 rtl8211f_rst: rtl8211f-rst {
295 rockchip,pins = <4 RK_
296 };
297
298 };
299
300 hym8563 {
301 hym8563_int: hym8563-int {
302 rockchip,pins = <0 RK_
303 };
304 };
305
306 usb {
307 vcc5v0_host_en: vcc5v0-host-en
308 rockchip,pins = <4 RK_
309 };
310 };
311 };
312
313 &pwm2 {
314 status = "okay";
315 };
316
317 &saradc {
318 vref-supply = <&vcc_1v8_s0>;
319 status = "okay";
320 };
321
322 &sdhci {
323 bus-width = <8>;
324 mmc-hs400-1_8v;
325 mmc-hs400-enhanced-strobe;
326 no-sdio;
327 no-sd;
328 non-removable;
329 status = "okay";
330 };
331
332 &spi2 {
333 assigned-clocks = <&cru CLK_SPI2>;
334 assigned-clock-rates = <200000000>;
335 num-cs = <1>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>
338 status = "okay";
339
340 pmic@0 {
341 compatible = "rockchip,rk806";
342 reg = <0x0>;
343 gpio-controller;
344 #gpio-cells = <2>;
345 interrupt-parent = <&gpio0>;
346 interrupts = <7 IRQ_TYPE_LEVEL
347 pinctrl-names = "default";
348 pinctrl-0 = <&pmic_pins>, <&rk
349 <&rk806_dvs2_null>
350 spi-max-frequency = <1000000>;
351 system-power-controller;
352
353 vcc1-supply = <&vcc5v0_sys>;
354 vcc2-supply = <&vcc5v0_sys>;
355 vcc3-supply = <&vcc5v0_sys>;
356 vcc4-supply = <&vcc5v0_sys>;
357 vcc5-supply = <&vcc5v0_sys>;
358 vcc6-supply = <&vcc5v0_sys>;
359 vcc7-supply = <&vcc5v0_sys>;
360 vcc8-supply = <&vcc5v0_sys>;
361 vcc9-supply = <&vcc5v0_sys>;
362 vcc10-supply = <&vcc5v0_sys>;
363 vcc11-supply = <&vcc_2v0_pldo_
364 vcc12-supply = <&vcc5v0_sys>;
365 vcc13-supply = <&vcc_1v1_nldo_
366 vcc14-supply = <&vcc_1v1_nldo_
367 vcca-supply = <&vcc5v0_sys>;
368
369 rk806_dvs1_null: dvs1-null-pin
370 pins = "gpio_pwrctrl1"
371 function = "pin_fun0";
372 };
373
374 rk806_dvs2_null: dvs2-null-pin
375 pins = "gpio_pwrctrl2"
376 function = "pin_fun0";
377 };
378
379 rk806_dvs3_null: dvs3-null-pin
380 pins = "gpio_pwrctrl3"
381 function = "pin_fun0";
382 };
383
384 regulators {
385 vdd_gpu_s0: vdd_gpu_me
386 regulator-name
387 regulator-boot
388 regulator-enab
389 regulator-min-
390 regulator-max-
391 regulator-ramp
392
393 regulator-stat
394 regula
395 };
396 };
397
398 vdd_cpu_lit_s0: vdd_cp
399 regulator-name
400 regulator-alwa
401 regulator-boot
402 regulator-min-
403 regulator-max-
404 regulator-ramp
405
406 regulator-stat
407 regula
408 };
409 };
410
411 vdd_log_s0: dcdc-reg3
412 regulator-name
413 regulator-alwa
414 regulator-boot
415 regulator-min-
416 regulator-max-
417 regulator-ramp
418
419 regulator-stat
420 regula
421 regula
422 };
423 };
424
425 vdd_vdenc_s0: vdd_vden
426 regulator-name
427 regulator-alwa
428 regulator-boot
429 regulator-min-
430 regulator-max-
431 regulator-ramp
432
433 regulator-stat
434 regula
435 };
436 };
437
438 vdd_ddr_s0: dcdc-reg5
439 regulator-name
440 regulator-alwa
441 regulator-boot
442 regulator-min-
443 regulator-max-
444 regulator-ramp
445
446 regulator-stat
447 regula
448 regula
449 };
450 };
451
452 vdd2_ddr_s3: dcdc-reg6
453 regulator-name
454 regulator-alwa
455 regulator-boot
456
457 regulator-stat
458 regula
459 };
460 };
461
462 vcc_2v0_pldo_s3: dcdc-
463 regulator-name
464 regulator-alwa
465 regulator-boot
466 regulator-min-
467 regulator-max-
468
469 regulator-stat
470 regula
471 regula
472 };
473 };
474
475 vcc_3v3_s3: dcdc-reg8
476 regulator-name
477 regulator-alwa
478 regulator-boot
479 regulator-min-
480 regulator-max-
481
482 regulator-stat
483 regula
484 regula
485 };
486 };
487
488 vddq_ddr_s0: dcdc-reg9
489 regulator-name
490 regulator-alwa
491 regulator-boot
492
493 regulator-stat
494 regula
495 };
496 };
497
498 vcc_1v8_s3: dcdc-reg10
499 regulator-name
500 regulator-alwa
501 regulator-boot
502 regulator-min-
503 regulator-max-
504
505 regulator-stat
506 regula
507 regula
508 };
509 };
510
511 avcc_1v8_s0: pldo-reg1
512 regulator-name
513 regulator-alwa
514 regulator-boot
515 regulator-min-
516 regulator-max-
517
518 regulator-stat
519 regula
520 };
521 };
522
523 vcc_1v8_s0: pldo-reg2
524 regulator-name
525 regulator-alwa
526 regulator-boot
527 regulator-min-
528 regulator-max-
529
530 regulator-stat
531 regula
532 regula
533 };
534 };
535
536 avdd_1v2_s0: pldo-reg3
537 regulator-name
538 regulator-alwa
539 regulator-boot
540 regulator-min-
541 regulator-max-
542
543 regulator-stat
544 regula
545 };
546 };
547
548 vcc_3v3_s0: pldo-reg4
549 regulator-name
550 regulator-alwa
551 regulator-boot
552 regulator-min-
553 regulator-max-
554
555 regulator-stat
556 regula
557 };
558 };
559
560 vccio_sd_s0: pldo-reg5
561 regulator-name
562 regulator-alwa
563 regulator-boot
564 regulator-min-
565 regulator-max-
566
567 regulator-stat
568 regula
569 };
570 };
571
572 pldo6_s3: pldo-reg6 {
573 regulator-name
574 regulator-alwa
575 regulator-boot
576 regulator-min-
577 regulator-max-
578
579 regulator-stat
580 regula
581 regula
582 };
583 };
584
585 vdd_0v75_s3: nldo-reg1
586 regulator-name
587 regulator-alwa
588 regulator-boot
589 regulator-min-
590 regulator-max-
591
592 regulator-stat
593 regula
594 regula
595 };
596 };
597
598 vdd_ddr_pll_s0: nldo-r
599 regulator-name
600 regulator-alwa
601 regulator-boot
602 regulator-min-
603 regulator-max-
604
605 regulator-stat
606 regula
607 regula
608 };
609 };
610
611 avdd_0v75_s0: nldo-reg
612 regulator-name
613 regulator-alwa
614 regulator-boot
615 regulator-min-
616 regulator-max-
617
618 regulator-stat
619 regula
620 };
621 };
622
623 vdd_0v85_s0: nldo-reg4
624 regulator-name
625 regulator-alwa
626 regulator-boot
627 regulator-min-
628 regulator-max-
629
630 regulator-stat
631 regula
632 };
633 };
634
635 vdd_0v75_s0: nldo-reg5
636 regulator-name
637 regulator-alwa
638 regulator-boot
639 regulator-min-
640 regulator-max-
641
642 regulator-stat
643 regula
644 };
645 };
646 };
647 };
648 };
649
650 &tsadc {
651 status = "okay";
652 };
653
654 &u2phy2 {
655 status = "okay";
656 };
657
658 &u2phy2_host {
659 phy-supply = <&vcc5v0_host>;
660 status = "okay";
661 };
662
663 &u2phy3 {
664 status = "okay";
665 };
666
667 &u2phy3_host {
668 phy-supply = <&vcc5v0_host>;
669 status = "okay";
670 };
671
672 &uart2 {
673 pinctrl-0 = <&uart2m0_xfer>;
674 status = "okay";
675 };
676
677 &usb_host0_ehci {
678 status = "okay";
679 };
680
681 &usb_host0_ohci {
682 status = "okay";
683 };
684
685 &usb_host1_ehci {
686 status = "okay";
687 };
688
689 &usb_host1_ohci {
690 status = "okay";
691 };
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