1 // SPDX-License-Identifier: GPL-2.0-only OR MI !! 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * AM625 SK: https://www.ti.com/lit/zip/sprr44 3 * AM625 SK: https://www.ti.com/lit/zip/sprr448
4 * 4 *
5 * Copyright (C) 2021-2024 Texas Instruments I !! 5 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 9
10 #include "k3-am62x-sk-common.dtsi" !! 10 #include <dt-bindings/leds/common.h>
>> 11 #include <dt-bindings/gpio/gpio.h>
>> 12 #include <dt-bindings/net/ti-dp83867.h>
>> 13 #include "k3-am625.dtsi"
11 14
12 / { 15 / {
13 compatible = "ti,am625-sk", "ti,am625" !! 16 compatible = "ti,am625-sk", "ti,am625";
14 model = "Texas Instruments AM625 SK"; 17 model = "Texas Instruments AM625 SK";
15 18
16 opp-table { !! 19 aliases {
17 /* Add 1.4GHz OPP for am625-sk !! 20 serial2 = &main_uart0;
18 opp-1400000000 { !! 21 mmc0 = &sdhci0;
19 opp-hz = /bits/ 64 <14 !! 22 mmc1 = &sdhci1;
20 opp-supported-hw = <0x !! 23 mmc2 = &sdhci2;
21 clock-latency-ns = <60 !! 24 spi0 = &ospi0;
22 }; !! 25 ethernet0 = &cpsw_port1;
>> 26 ethernet1 = &cpsw_port2;
>> 27 };
>> 28
>> 29 chosen {
>> 30 stdout-path = "serial2:115200n8";
>> 31 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
23 }; 32 };
24 33
25 memory@80000000 { 34 memory@80000000 {
26 device_type = "memory"; 35 device_type = "memory";
27 /* 2G RAM */ 36 /* 2G RAM */
28 reg = <0x00000000 0x80000000 0 37 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
29 38
30 }; 39 };
31 40
>> 41 reserved-memory {
>> 42 #address-cells = <2>;
>> 43 #size-cells = <2>;
>> 44 ranges;
>> 45
>> 46 secure_tfa_ddr: tfa@9e780000 {
>> 47 reg = <0x00 0x9e780000 0x00 0x80000>;
>> 48 alignment = <0x1000>;
>> 49 no-map;
>> 50 };
>> 51
>> 52 secure_ddr: optee@9e800000 {
>> 53 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
>> 54 alignment = <0x1000>;
>> 55 no-map;
>> 56 };
>> 57
>> 58 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
>> 59 compatible = "shared-dma-pool";
>> 60 reg = <0x00 0x9db00000 0x00 0xc00000>;
>> 61 no-map;
>> 62 };
>> 63 };
>> 64
32 vmain_pd: regulator-0 { 65 vmain_pd: regulator-0 {
33 /* TPS65988 PD CONTROLLER OUTP 66 /* TPS65988 PD CONTROLLER OUTPUT */
34 bootph-all; <<
35 compatible = "regulator-fixed" 67 compatible = "regulator-fixed";
36 regulator-name = "vmain_pd"; 68 regulator-name = "vmain_pd";
37 regulator-min-microvolt = <500 69 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <500 70 regulator-max-microvolt = <5000000>;
39 regulator-always-on; 71 regulator-always-on;
40 regulator-boot-on; 72 regulator-boot-on;
41 }; 73 };
42 74
43 vcc_5v0: regulator-1 { 75 vcc_5v0: regulator-1 {
44 /* Output of LM34936 */ 76 /* Output of LM34936 */
45 bootph-all; <<
46 compatible = "regulator-fixed" 77 compatible = "regulator-fixed";
47 regulator-name = "vcc_5v0"; 78 regulator-name = "vcc_5v0";
48 regulator-min-microvolt = <500 79 regulator-min-microvolt = <5000000>;
49 regulator-max-microvolt = <500 80 regulator-max-microvolt = <5000000>;
50 vin-supply = <&vmain_pd>; 81 vin-supply = <&vmain_pd>;
51 regulator-always-on; 82 regulator-always-on;
52 regulator-boot-on; 83 regulator-boot-on;
53 }; 84 };
54 85
55 vcc_3v3_sys: regulator-2 { 86 vcc_3v3_sys: regulator-2 {
56 /* output of LM61460-Q1 */ 87 /* output of LM61460-Q1 */
57 bootph-all; <<
58 compatible = "regulator-fixed" 88 compatible = "regulator-fixed";
59 regulator-name = "vcc_3v3_sys" 89 regulator-name = "vcc_3v3_sys";
60 regulator-min-microvolt = <330 90 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <330 91 regulator-max-microvolt = <3300000>;
62 vin-supply = <&vmain_pd>; 92 vin-supply = <&vmain_pd>;
63 regulator-always-on; 93 regulator-always-on;
64 regulator-boot-on; 94 regulator-boot-on;
65 }; 95 };
66 96
67 vdd_mmc1: regulator-3 { 97 vdd_mmc1: regulator-3 {
68 /* TPS22918DBVR */ 98 /* TPS22918DBVR */
69 bootph-all; <<
70 compatible = "regulator-fixed" 99 compatible = "regulator-fixed";
71 regulator-name = "vdd_mmc1"; 100 regulator-name = "vdd_mmc1";
72 regulator-min-microvolt = <330 101 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <330 102 regulator-max-microvolt = <3300000>;
74 regulator-boot-on; 103 regulator-boot-on;
75 enable-active-high; 104 enable-active-high;
76 vin-supply = <&vcc_3v3_sys>; 105 vin-supply = <&vcc_3v3_sys>;
77 gpio = <&exp1 3 GPIO_ACTIVE_HI 106 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
78 }; 107 };
79 108
80 vdd_sd_dv: regulator-4 { 109 vdd_sd_dv: regulator-4 {
81 /* Output of TLV71033 */ 110 /* Output of TLV71033 */
82 bootph-all; <<
83 compatible = "regulator-gpio"; 111 compatible = "regulator-gpio";
84 regulator-name = "tlv71033"; 112 regulator-name = "tlv71033";
85 pinctrl-names = "default"; 113 pinctrl-names = "default";
86 pinctrl-0 = <&vdd_sd_dv_pins_d 114 pinctrl-0 = <&vdd_sd_dv_pins_default>;
87 regulator-min-microvolt = <180 115 regulator-min-microvolt = <1800000>;
88 regulator-max-microvolt = <330 116 regulator-max-microvolt = <3300000>;
89 regulator-boot-on; 117 regulator-boot-on;
90 vin-supply = <&vcc_5v0>; 118 vin-supply = <&vcc_5v0>;
91 gpios = <&main_gpio0 31 GPIO_A 119 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
92 states = <1800000 0x0>, 120 states = <1800000 0x0>,
93 <3300000 0x1>; 121 <3300000 0x1>;
94 }; 122 };
95 123
96 vcc_1v8: regulator-5 { !! 124 leds {
97 /* output of TPS6282518DMQ */ !! 125 compatible = "gpio-leds";
98 compatible = "regulator-fixed" !! 126 pinctrl-names = "default";
99 regulator-name = "vcc_1v8"; !! 127 pinctrl-0 = <&usr_led_pins_default>;
100 regulator-min-microvolt = <180 !! 128
101 regulator-max-microvolt = <180 !! 129 led-0 {
102 vin-supply = <&vcc_3v3_sys>; !! 130 label = "am62-sk:green:heartbeat";
103 regulator-always-on; !! 131 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
104 regulator-boot-on; !! 132 linux,default-trigger = "heartbeat";
>> 133 function = LED_FUNCTION_HEARTBEAT;
>> 134 default-state = "off";
>> 135 };
105 }; 136 };
106 }; 137 };
107 138
108 &main_pmx0 { 139 &main_pmx0 {
109 main_rgmii2_pins_default: main-rgmii2- !! 140 main_uart0_pins_default: main-uart0-pins-default {
110 bootph-all; !! 141 pinctrl-single,pins = <
>> 142 AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
>> 143 AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
>> 144 >;
>> 145 };
>> 146
>> 147 main_i2c0_pins_default: main-i2c0-pins-default {
>> 148 pinctrl-single,pins = <
>> 149 AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
>> 150 AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
>> 151 >;
>> 152 };
>> 153
>> 154 main_i2c1_pins_default: main-i2c1-pins-default {
>> 155 pinctrl-single,pins = <
>> 156 AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
>> 157 AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
>> 158 >;
>> 159 };
>> 160
>> 161 main_i2c2_pins_default: main-i2c2-pins-default {
>> 162 pinctrl-single,pins = <
>> 163 AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
>> 164 AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
>> 165 >;
>> 166 };
>> 167
>> 168 main_mmc0_pins_default: main-mmc0-pins-default {
>> 169 pinctrl-single,pins = <
>> 170 AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
>> 171 AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
>> 172 AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
>> 173 AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
>> 174 AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
>> 175 AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
>> 176 AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
>> 177 AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
>> 178 AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
>> 179 AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
>> 180 >;
>> 181 };
>> 182
>> 183 main_mmc1_pins_default: main-mmc1-pins-default {
>> 184 pinctrl-single,pins = <
>> 185 AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
>> 186 AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
>> 187 AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
>> 188 AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
>> 189 AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
>> 190 AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
>> 191 AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
>> 192 >;
>> 193 };
>> 194
>> 195 usr_led_pins_default: usr-led-pins-default {
>> 196 pinctrl-single,pins = <
>> 197 AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
>> 198 >;
>> 199 };
>> 200
>> 201 main_mdio1_pins_default: main-mdio1-pins-default {
>> 202 pinctrl-single,pins = <
>> 203 AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
>> 204 AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
>> 205 >;
>> 206 };
>> 207
>> 208 main_rgmii1_pins_default: main-rgmii1-pins-default {
>> 209 pinctrl-single,pins = <
>> 210 AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
>> 211 AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
>> 212 AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
>> 213 AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
>> 214 AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
>> 215 AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
>> 216 AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
>> 217 AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
>> 218 AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
>> 219 AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
>> 220 AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
>> 221 AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
>> 222 >;
>> 223 };
>> 224
>> 225 main_rgmii2_pins_default: main-rgmii2-pins-default {
111 pinctrl-single,pins = < 226 pinctrl-single,pins = <
112 AM62X_IOPAD(0x184, PIN 227 AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
113 AM62X_IOPAD(0x188, PIN 228 AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
114 AM62X_IOPAD(0x18c, PIN 229 AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
115 AM62X_IOPAD(0x190, PIN 230 AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
116 AM62X_IOPAD(0x180, PIN 231 AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
117 AM62X_IOPAD(0x17c, PIN 232 AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
118 AM62X_IOPAD(0x16c, PIN 233 AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
119 AM62X_IOPAD(0x170, PIN 234 AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
120 AM62X_IOPAD(0x174, PIN 235 AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
121 AM62X_IOPAD(0x178, PIN 236 AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
122 AM62X_IOPAD(0x168, PIN 237 AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
123 AM62X_IOPAD(0x164, PIN 238 AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
124 >; 239 >;
125 }; 240 };
126 241
127 ospi0_pins_default: ospi0-default-pins !! 242 ospi0_pins_default: ospi0-pins-default {
128 bootph-all; <<
129 pinctrl-single,pins = < 243 pinctrl-single,pins = <
130 AM62X_IOPAD(0x000, PIN 244 AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
131 AM62X_IOPAD(0x02c, PIN 245 AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
132 AM62X_IOPAD(0x00c, PIN 246 AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
133 AM62X_IOPAD(0x010, PIN 247 AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
134 AM62X_IOPAD(0x014, PIN 248 AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
135 AM62X_IOPAD(0x018, PIN 249 AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
136 AM62X_IOPAD(0x01c, PIN 250 AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
137 AM62X_IOPAD(0x020, PIN 251 AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
138 AM62X_IOPAD(0x024, PIN 252 AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
139 AM62X_IOPAD(0x028, PIN 253 AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
140 AM62X_IOPAD(0x008, PIN 254 AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
141 >; 255 >;
142 }; 256 };
143 257
144 vdd_sd_dv_pins_default: vdd-sd-dv-defa !! 258 vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
145 bootph-all; <<
146 pinctrl-single,pins = < 259 pinctrl-single,pins = <
147 AM62X_IOPAD(0x07c, PIN 260 AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
148 >; 261 >;
149 }; 262 };
150 263
151 main_gpio1_ioexp_intr_pins_default: ma !! 264 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
152 bootph-all; <<
153 pinctrl-single,pins = < 265 pinctrl-single,pins = <
154 AM62X_IOPAD(0x01d4, PI 266 AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
155 >; 267 >;
156 }; 268 };
157 }; 269 };
158 270
159 &main_gpio0 { !! 271 &wkup_uart0 {
160 bootph-all; !! 272 /* WKUP UART0 is used by DM firmware */
>> 273 status = "reserved";
>> 274 };
>> 275
>> 276 &mcu_uart0 {
>> 277 status = "disabled";
>> 278 };
>> 279
>> 280 &main_uart0 {
>> 281 pinctrl-names = "default";
>> 282 pinctrl-0 = <&main_uart0_pins_default>;
>> 283 };
>> 284
>> 285 &main_uart1 {
>> 286 /* Main UART1 is used by TIFS firmware */
>> 287 status = "reserved";
>> 288 };
>> 289
>> 290 &main_uart2 {
>> 291 status = "disabled";
>> 292 };
>> 293
>> 294 &main_uart3 {
>> 295 status = "disabled";
>> 296 };
>> 297
>> 298 &main_uart4 {
>> 299 status = "disabled";
>> 300 };
>> 301
>> 302 &main_uart5 {
>> 303 status = "disabled";
>> 304 };
>> 305
>> 306 &main_uart6 {
>> 307 status = "disabled";
161 }; 308 };
162 309
163 &main_gpio1 { !! 310 &mcu_i2c0 {
164 bootph-all; !! 311 status = "disabled";
>> 312 };
>> 313
>> 314 &wkup_i2c0 {
>> 315 status = "disabled";
>> 316 };
>> 317
>> 318 &main_i2c0 {
>> 319 pinctrl-names = "default";
>> 320 pinctrl-0 = <&main_i2c0_pins_default>;
>> 321 clock-frequency = <400000>;
165 }; 322 };
166 323
167 &main_i2c1 { 324 &main_i2c1 {
168 bootph-all; !! 325 pinctrl-names = "default";
>> 326 pinctrl-0 = <&main_i2c1_pins_default>;
>> 327 clock-frequency = <400000>;
>> 328
169 exp1: gpio@22 { 329 exp1: gpio@22 {
170 bootph-all; <<
171 compatible = "ti,tca6424"; 330 compatible = "ti,tca6424";
172 reg = <0x22>; 331 reg = <0x22>;
173 gpio-controller; 332 gpio-controller;
174 #gpio-cells = <2>; 333 #gpio-cells = <2>;
175 gpio-line-names = "GPIO_CPSW2_ 334 gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
176 "PRU_DETECT 335 "PRU_DETECT", "MMC1_SD_EN",
177 "VPP_LDO_EN 336 "VPP_LDO_EN", "EXP_PS_3V3_En",
178 "EXP_PS_5V0 337 "EXP_PS_5V0_En", "EXP_HAT_DETECT",
179 "GPIO_AUD_R 338 "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
180 "UART1_FET_ 339 "UART1_FET_BUF_EN", "WL_LT_EN",
181 "GPIO_HDMI_ 340 "GPIO_HDMI_RSTn", "CSI_GPIO1",
182 "CSI_GPIO2" 341 "CSI_GPIO2", "PRU_3V3_EN",
183 "HDMI_INTn" !! 342 "HDMI_INTn", "TEST_GPIO2",
184 "MCASP1_FET 343 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
185 "MCASP1_FET 344 "MCASP1_FET_SEL", "UART1_FET_SEL",
186 "TSINT#", " 345 "TSINT#", "IO_EXP_TEST_LED";
187 346
188 interrupt-parent = <&main_gpio 347 interrupt-parent = <&main_gpio1>;
189 interrupts = <23 IRQ_TYPE_EDGE 348 interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
190 interrupt-controller; 349 interrupt-controller;
191 #interrupt-cells = <2>; 350 #interrupt-cells = <2>;
192 351
193 pinctrl-names = "default"; 352 pinctrl-names = "default";
194 pinctrl-0 = <&main_gpio1_ioexp 353 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
195 }; 354 };
196 }; 355 };
197 356
>> 357 &main_i2c2 {
>> 358 status = "disabled";
>> 359 };
>> 360
>> 361 &main_i2c3 {
>> 362 status = "disabled";
>> 363 };
>> 364
>> 365 &sdhci0 {
>> 366 pinctrl-names = "default";
>> 367 pinctrl-0 = <&main_mmc0_pins_default>;
>> 368 ti,driver-strength-ohm = <50>;
>> 369 disable-wp;
>> 370 };
>> 371
198 &sdhci1 { 372 &sdhci1 {
>> 373 /* SD/MMC */
199 vmmc-supply = <&vdd_mmc1>; 374 vmmc-supply = <&vdd_mmc1>;
200 vqmmc-supply = <&vdd_sd_dv>; 375 vqmmc-supply = <&vdd_sd_dv>;
>> 376 pinctrl-names = "default";
>> 377 pinctrl-0 = <&main_mmc1_pins_default>;
>> 378 ti,driver-strength-ohm = <50>;
>> 379 disable-wp;
201 }; 380 };
202 381
203 &cpsw3g { 382 &cpsw3g {
204 pinctrl-names = "default"; 383 pinctrl-names = "default";
205 pinctrl-0 = <&main_rgmii1_pins_default !! 384 pinctrl-0 = <&main_mdio1_pins_default
>> 385 &main_rgmii1_pins_default
>> 386 &main_rgmii2_pins_default>;
>> 387 };
>> 388
>> 389 &cpsw_port1 {
>> 390 phy-mode = "rgmii-rxid";
>> 391 phy-handle = <&cpsw3g_phy0>;
206 }; 392 };
207 393
208 &cpsw_port2 { 394 &cpsw_port2 {
209 phy-mode = "rgmii-rxid"; 395 phy-mode = "rgmii-rxid";
210 phy-handle = <&cpsw3g_phy1>; 396 phy-handle = <&cpsw3g_phy1>;
211 }; 397 };
212 398
213 &cpsw3g_mdio { 399 &cpsw3g_mdio {
>> 400 cpsw3g_phy0: ethernet-phy@0 {
>> 401 reg = <0>;
>> 402 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
>> 403 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>> 404 ti,min-output-impedance;
>> 405 };
>> 406
214 cpsw3g_phy1: ethernet-phy@1 { 407 cpsw3g_phy1: ethernet-phy@1 {
215 reg = <1>; 408 reg = <1>;
216 ti,rx-internal-delay = <DP8386 409 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
217 ti,fifo-depth = <DP83867_PHYCR 410 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
218 ti,min-output-impedance; 411 ti,min-output-impedance;
219 }; 412 };
220 }; 413 };
221 414
222 &mailbox0_cluster0 { 415 &mailbox0_cluster0 {
223 mbox_m4_0: mbox-m4-0 { 416 mbox_m4_0: mbox-m4-0 {
224 ti,mbox-rx = <0 0 0>; 417 ti,mbox-rx = <0 0 0>;
225 ti,mbox-tx = <1 0 0>; 418 ti,mbox-tx = <1 0 0>;
226 }; 419 };
227 }; 420 };
228 421
229 &fss { <<
230 bootph-all; <<
231 }; <<
232 <<
233 &ospi0 { 422 &ospi0 {
234 bootph-all; <<
235 status = "okay"; <<
236 pinctrl-names = "default"; 423 pinctrl-names = "default";
237 pinctrl-0 = <&ospi0_pins_default>; 424 pinctrl-0 = <&ospi0_pins_default>;
238 425
239 flash@0 { !! 426 flash@0{
240 bootph-all; <<
241 compatible = "jedec,spi-nor"; 427 compatible = "jedec,spi-nor";
242 reg = <0x0>; 428 reg = <0x0>;
243 spi-tx-bus-width = <8>; 429 spi-tx-bus-width = <8>;
244 spi-rx-bus-width = <8>; 430 spi-rx-bus-width = <8>;
245 spi-max-frequency = <25000000> 431 spi-max-frequency = <25000000>;
246 cdns,tshsl-ns = <60>; 432 cdns,tshsl-ns = <60>;
247 cdns,tsd2d-ns = <60>; 433 cdns,tsd2d-ns = <60>;
248 cdns,tchsh-ns = <60>; 434 cdns,tchsh-ns = <60>;
249 cdns,tslch-ns = <60>; 435 cdns,tslch-ns = <60>;
250 cdns,read-delay = <4>; 436 cdns,read-delay = <4>;
251 437
252 partitions { 438 partitions {
253 bootph-all; <<
254 compatible = "fixed-pa 439 compatible = "fixed-partitions";
255 #address-cells = <1>; 440 #address-cells = <1>;
256 #size-cells = <1>; 441 #size-cells = <1>;
257 442
258 partition@0 { 443 partition@0 {
259 label = "ospi. 444 label = "ospi.tiboot3";
260 reg = <0x0 0x8 445 reg = <0x0 0x80000>;
261 }; 446 };
262 447
263 partition@80000 { 448 partition@80000 {
264 label = "ospi. 449 label = "ospi.tispl";
265 reg = <0x80000 450 reg = <0x80000 0x200000>;
266 }; 451 };
267 452
268 partition@280000 { 453 partition@280000 {
269 label = "ospi. 454 label = "ospi.u-boot";
270 reg = <0x28000 455 reg = <0x280000 0x400000>;
271 }; 456 };
272 457
273 partition@680000 { 458 partition@680000 {
274 label = "ospi. 459 label = "ospi.env";
275 reg = <0x68000 460 reg = <0x680000 0x40000>;
276 }; 461 };
277 462
278 partition@6c0000 { 463 partition@6c0000 {
279 label = "ospi. 464 label = "ospi.env.backup";
280 reg = <0x6c000 465 reg = <0x6c0000 0x40000>;
281 }; 466 };
282 467
283 partition@800000 { 468 partition@800000 {
284 label = "ospi. 469 label = "ospi.rootfs";
285 reg = <0x80000 470 reg = <0x800000 0x37c0000>;
286 }; 471 };
287 472
288 partition@3fc0000 { 473 partition@3fc0000 {
289 bootph-pre-ram <<
290 label = "ospi. 474 label = "ospi.phypattern";
291 reg = <0x3fc00 475 reg = <0x3fc0000 0x40000>;
292 }; 476 };
293 }; 477 };
294 }; 478 };
295 }; 479 };
296 480
297 &tlv320aic3106 { !! 481 &ecap0 {
298 DVDD-supply = <&vcc_1v8>; !! 482 status = "disabled";
>> 483 };
>> 484
>> 485 &ecap1 {
>> 486 status = "disabled";
>> 487 };
>> 488
>> 489 &ecap2 {
>> 490 status = "disabled";
>> 491 };
>> 492
>> 493 &main_mcan0 {
>> 494 status = "disabled";
299 }; 495 };
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