1 // SPDX-License-Identifier: GPL-2.0-only OR MI !! 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Device Tree Source for AM62A SoC Family Mai 3 * Device Tree Source for AM62A SoC Family Main Domain peripherals
4 * 4 *
5 * Copyright (C) 2022-2024 Texas Instruments I !! 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
6 */ 6 */
7 7
8 &cbass_main { 8 &cbass_main {
9 oc_sram: sram@70000000 { 9 oc_sram: sram@70000000 {
10 compatible = "mmio-sram"; 10 compatible = "mmio-sram";
11 reg = <0x00 0x70000000 0x00 0x 11 reg = <0x00 0x70000000 0x00 0x10000>;
12 #address-cells = <1>; 12 #address-cells = <1>;
13 #size-cells = <1>; 13 #size-cells = <1>;
14 ranges = <0x0 0x00 0x70000000 14 ranges = <0x0 0x00 0x70000000 0x10000>;
15 }; 15 };
16 16
17 gic500: interrupt-controller@1800000 { 17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3"; 18 compatible = "arm,gic-v3";
19 reg = <0x00 0x01800000 0x00 0x 19 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
20 <0x00 0x01880000 0x00 0x 20 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
21 <0x00 0x01880000 0x00 0x 21 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
22 <0x01 0x00000000 0x00 0x 22 <0x01 0x00000000 0x00 0x2000>, /* GICC */
23 <0x01 0x00010000 0x00 0x 23 <0x01 0x00010000 0x00 0x1000>, /* GICH */
24 <0x01 0x00020000 0x00 0x 24 <0x01 0x00020000 0x00 0x2000>; /* GICV */
25 #address-cells = <2>; 25 #address-cells = <2>;
26 #size-cells = <2>; 26 #size-cells = <2>;
27 ranges; 27 ranges;
28 #interrupt-cells = <3>; 28 #interrupt-cells = <3>;
29 interrupt-controller; 29 interrupt-controller;
30 /* 30 /*
31 * vcpumntirq: 31 * vcpumntirq:
32 * virtual CPU interface maint 32 * virtual CPU interface maintenance interrupt
33 */ 33 */
34 interrupts = <GIC_PPI 9 IRQ_TY 34 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
35 35
36 gic_its: msi-controller@182000 36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic- 37 compatible = "arm,gic-v3-its";
38 reg = <0x00 0x01820000 38 reg = <0x00 0x01820000 0x00 0x10000>;
39 socionext,synquacer-pr 39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller; 40 msi-controller;
41 #msi-cells = <1>; 41 #msi-cells = <1>;
42 }; 42 };
43 }; 43 };
44 44
45 main_conf: bus@100000 { !! 45 main_conf: syscon@100000 {
46 compatible = "simple-bus"; !! 46 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
>> 47 reg = <0x00 0x00100000 0x00 0x20000>;
47 #address-cells = <1>; 48 #address-cells = <1>;
48 #size-cells = <1>; 49 #size-cells = <1>;
49 ranges = <0x00 0x00 0x00100000 50 ranges = <0x00 0x00 0x00100000 0x20000>;
50 51
51 phy_gmii_sel: phy@4044 { 52 phy_gmii_sel: phy@4044 {
52 compatible = "ti,am654 53 compatible = "ti,am654-phy-gmii-sel";
53 reg = <0x4044 0x8>; 54 reg = <0x4044 0x8>;
54 #phy-cells = <1>; 55 #phy-cells = <1>;
55 }; 56 };
56 57
57 epwm_tbclk: clock-controller@4 58 epwm_tbclk: clock-controller@4130 {
58 compatible = "ti,am62- !! 59 compatible = "ti,am62-epwm-tbclk", "syscon";
59 reg = <0x4130 0x4>; 60 reg = <0x4130 0x4>;
60 #clock-cells = <1>; 61 #clock-cells = <1>;
61 }; 62 };
62 <<
63 audio_refclk0: clock-controlle <<
64 compatible = "ti,am62- <<
65 reg = <0x82e0 0x4>; <<
66 clocks = <&k3_clks 157 <<
67 assigned-clocks = <&k3 <<
68 assigned-clock-parents <<
69 #clock-cells = <0>; <<
70 }; <<
71 <<
72 audio_refclk1: clock-controlle <<
73 compatible = "ti,am62- <<
74 reg = <0x82e4 0x4>; <<
75 clocks = <&k3_clks 157 <<
76 assigned-clocks = <&k3 <<
77 assigned-clock-parents <<
78 #clock-cells = <0>; <<
79 }; <<
80 }; 63 };
81 64
82 dmss: bus@48000000 { 65 dmss: bus@48000000 {
83 compatible = "simple-bus"; 66 compatible = "simple-bus";
84 #address-cells = <2>; 67 #address-cells = <2>;
85 #size-cells = <2>; 68 #size-cells = <2>;
86 dma-ranges; 69 dma-ranges;
87 ranges = <0x00 0x48000000 0x00 70 ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06000000>;
88 71
89 ti,sci-dev-id = <25>; 72 ti,sci-dev-id = <25>;
90 73
91 secure_proxy_main: mailbox@4d0 74 secure_proxy_main: mailbox@4d000000 {
92 compatible = "ti,am654 75 compatible = "ti,am654-secure-proxy";
93 reg = <0x00 0x4d000000 76 reg = <0x00 0x4d000000 0x00 0x80000>,
94 <0x00 0x4a600000 77 <0x00 0x4a600000 0x00 0x80000>,
95 <0x00 0x4a400000 78 <0x00 0x4a400000 0x00 0x80000>;
96 reg-names = "target_da 79 reg-names = "target_data", "rt", "scfg";
97 #mbox-cells = <1>; 80 #mbox-cells = <1>;
98 interrupt-names = "rx_ 81 interrupt-names = "rx_012";
99 interrupts = <GIC_SPI 82 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
100 }; 83 };
101 84
102 inta_main_dmss: interrupt-cont 85 inta_main_dmss: interrupt-controller@48000000 {
103 compatible = "ti,sci-i 86 compatible = "ti,sci-inta";
104 reg = <0x00 0x48000000 87 reg = <0x00 0x48000000 0x00 0x100000>;
105 #interrupt-cells = <0> 88 #interrupt-cells = <0>;
106 interrupt-controller; 89 interrupt-controller;
107 interrupt-parent = <&g 90 interrupt-parent = <&gic500>;
108 msi-controller; 91 msi-controller;
109 ti,sci = <&dmsc>; 92 ti,sci = <&dmsc>;
110 ti,sci-dev-id = <28>; 93 ti,sci-dev-id = <28>;
111 ti,interrupt-ranges = 94 ti,interrupt-ranges = <6 70 34>;
112 ti,unmapped-event-sour 95 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
113 }; 96 };
114 97
115 main_bcdma: dma-controller@485 98 main_bcdma: dma-controller@485c0100 {
116 compatible = "ti,am64- 99 compatible = "ti,am64-dmss-bcdma";
117 reg = <0x00 0x485c0100 100 reg = <0x00 0x485c0100 0x00 0x100>,
118 <0x00 0x4c000000 101 <0x00 0x4c000000 0x00 0x20000>,
119 <0x00 0x4a820000 102 <0x00 0x4a820000 0x00 0x20000>,
120 <0x00 0x4aa40000 103 <0x00 0x4aa40000 0x00 0x20000>,
121 <0x00 0x4bc00000 !! 104 <0x00 0x4bc00000 0x00 0x100000>;
122 <0x00 0x48600000 !! 105 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
123 <0x00 0x484a4000 <<
124 <0x00 0x484c2000 <<
125 <0x00 0x48420000 <<
126 reg-names = "gcfg", "b <<
127 "ring", "t <<
128 msi-parent = <&inta_ma 106 msi-parent = <&inta_main_dmss>;
129 #dma-cells = <3>; 107 #dma-cells = <3>;
130 ti,sci = <&dmsc>; 108 ti,sci = <&dmsc>;
131 ti,sci-dev-id = <26>; 109 ti,sci-dev-id = <26>;
132 ti,sci-rm-range-bchan 110 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
133 ti,sci-rm-range-rchan 111 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
134 ti,sci-rm-range-tchan 112 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
135 }; 113 };
136 114
137 main_pktdma: dma-controller@48 115 main_pktdma: dma-controller@485c0000 {
138 compatible = "ti,am64- 116 compatible = "ti,am64-dmss-pktdma";
139 reg = <0x00 0x485c0000 117 reg = <0x00 0x485c0000 0x00 0x100>,
140 <0x00 0x4a800000 118 <0x00 0x4a800000 0x00 0x20000>,
141 <0x00 0x4aa00000 !! 119 <0x00 0x4aa00000 0x00 0x40000>,
142 <0x00 0x4b800000 !! 120 <0x00 0x4b800000 0x00 0x400000>;
143 <0x00 0x485e0000 !! 121 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
144 <0x00 0x484a0000 <<
145 <0x00 0x484c0000 <<
146 <0x00 0x48430000 <<
147 reg-names = "gcfg", "r <<
148 "ring", "t <<
149 msi-parent = <&inta_ma 122 msi-parent = <&inta_main_dmss>;
150 #dma-cells = <2>; 123 #dma-cells = <2>;
151 ti,sci = <&dmsc>; 124 ti,sci = <&dmsc>;
152 ti,sci-dev-id = <30>; 125 ti,sci-dev-id = <30>;
153 ti,sci-rm-range-tchan 126 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
154 127 <0x24>, /* CPSW_TX_CHAN */
155 128 <0x25>, /* SAUL_TX_0_CHAN */
156 129 <0x26>; /* SAUL_TX_1_CHAN */
157 ti,sci-rm-range-tflow 130 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
158 131 <0x11>, /* RING_CPSW_TX_CHAN */
159 132 <0x12>, /* RING_SAUL_TX_0_CHAN */
160 133 <0x13>; /* RING_SAUL_TX_1_CHAN */
161 ti,sci-rm-range-rchan 134 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
162 135 <0x2b>, /* CPSW_RX_CHAN */
163 136 <0x2d>, /* SAUL_RX_0_CHAN */
164 137 <0x2f>, /* SAUL_RX_1_CHAN */
165 138 <0x31>, /* SAUL_RX_2_CHAN */
166 139 <0x33>; /* SAUL_RX_3_CHAN */
167 ti,sci-rm-range-rflow 140 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
168 141 <0x2c>, /* FLOW_CPSW_RX_CHAN */
169 142 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
170 143 <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
171 }; 144 };
172 }; 145 };
173 146
174 dmss_csi: bus@4e000000 { <<
175 compatible = "simple-bus"; <<
176 #address-cells = <2>; <<
177 #size-cells = <2>; <<
178 dma-ranges; <<
179 ranges = <0x00 0x4e000000 0x00 <<
180 <<
181 ti,sci-dev-id = <198>; <<
182 <<
183 inta_main_dmss_csi: interrupt- <<
184 compatible = "ti,sci-i <<
185 reg = <0x00 0x4e0a0000 <<
186 #interrupt-cells = <0> <<
187 interrupt-controller; <<
188 interrupt-parent = <&g <<
189 msi-controller; <<
190 ti,sci = <&dmsc>; <<
191 ti,sci-dev-id = <200>; <<
192 ti,interrupt-ranges = <<
193 ti,unmapped-event-sour <<
194 power-domains = <&k3_p <<
195 }; <<
196 <<
197 main_bcdma_csi: dma-controller <<
198 compatible = "ti,am62a <<
199 reg = <0x00 0x4e230000 <<
200 <0x00 0x4e180000 <<
201 <0x00 0x4e100000 <<
202 reg-names = "gcfg", "r <<
203 msi-parent = <&inta_ma <<
204 #dma-cells = <3>; <<
205 ti,sci = <&dmsc>; <<
206 ti,sci-dev-id = <199>; <<
207 ti,sci-rm-range-rchan <<
208 power-domains = <&k3_p <<
209 }; <<
210 }; <<
211 <<
212 dmsc: system-controller@44043000 { 147 dmsc: system-controller@44043000 {
213 compatible = "ti,k2g-sci"; 148 compatible = "ti,k2g-sci";
214 reg = <0x00 0x44043000 0x00 0x 149 reg = <0x00 0x44043000 0x00 0xfe0>;
215 reg-names = "debug_messages"; 150 reg-names = "debug_messages";
216 ti,host-id = <12>; 151 ti,host-id = <12>;
217 mbox-names = "rx", "tx"; 152 mbox-names = "rx", "tx";
218 mboxes = <&secure_proxy_main 1 !! 153 mboxes= <&secure_proxy_main 12>,
219 <&secure_proxy_main 1 !! 154 <&secure_proxy_main 13>;
220 155
221 k3_pds: power-controller { 156 k3_pds: power-controller {
222 compatible = "ti,sci-p 157 compatible = "ti,sci-pm-domain";
223 #power-domain-cells = 158 #power-domain-cells = <2>;
224 }; 159 };
225 160
226 k3_clks: clock-controller { 161 k3_clks: clock-controller {
227 compatible = "ti,k2g-s 162 compatible = "ti,k2g-sci-clk";
228 #clock-cells = <2>; 163 #clock-cells = <2>;
229 }; 164 };
230 165
231 k3_reset: reset-controller { 166 k3_reset: reset-controller {
232 compatible = "ti,sci-r 167 compatible = "ti,sci-reset";
233 #reset-cells = <2>; 168 #reset-cells = <2>;
234 }; 169 };
235 }; 170 };
236 171
237 crypto: crypto@40900000 { <<
238 compatible = "ti,am62-sa3ul"; <<
239 reg = <0x00 0x40900000 0x00 0x <<
240 dmas = <&main_pktdma 0xf501 0> <<
241 <&main_pktdma 0x7507 0> <<
242 dma-names = "tx", "rx1", "rx2" <<
243 }; <<
244 <<
245 secure_proxy_sa3: mailbox@43600000 { <<
246 compatible = "ti,am654-secure- <<
247 #mbox-cells = <1>; <<
248 reg-names = "target_data", "rt <<
249 reg = <0x00 0x43600000 0x00 0x <<
250 <0x00 0x44880000 0x00 0x <<
251 <0x00 0x44860000 0x00 0x <<
252 /* <<
253 * Marked Disabled: <<
254 * Node is incomplete as it is <<
255 * firmware on non-MPU process <<
256 */ <<
257 status = "disabled"; <<
258 }; <<
259 <<
260 main_pmx0: pinctrl@f4000 { 172 main_pmx0: pinctrl@f4000 {
261 compatible = "pinctrl-single"; 173 compatible = "pinctrl-single";
262 reg = <0x00 0xf4000 0x00 0x2ac 174 reg = <0x00 0xf4000 0x00 0x2ac>;
263 #pinctrl-cells = <1>; 175 #pinctrl-cells = <1>;
264 pinctrl-single,register-width 176 pinctrl-single,register-width = <32>;
265 pinctrl-single,function-mask = 177 pinctrl-single,function-mask = <0xffffffff>;
266 }; 178 };
267 179
268 main_esm: esm@420000 { <<
269 compatible = "ti,j721e-esm"; <<
270 reg = <0x0 0x420000 0x0 0x1000 <<
271 bootph-pre-ram; <<
272 /* Interrupt sources: rti0, rt <<
273 ti,esm-pins = <192>, <193>, <1 <<
274 }; <<
275 <<
276 main_timer0: timer@2400000 { <<
277 compatible = "ti,am654-timer"; <<
278 reg = <0x00 0x2400000 0x00 0x4 <<
279 interrupts = <GIC_SPI 120 IRQ_ <<
280 clocks = <&k3_clks 36 2>; <<
281 clock-names = "fck"; <<
282 assigned-clocks = <&k3_clks 36 <<
283 assigned-clock-parents = <&k3_ <<
284 power-domains = <&k3_pds 36 TI <<
285 ti,timer-pwm; <<
286 }; <<
287 <<
288 main_timer1: timer@2410000 { <<
289 compatible = "ti,am654-timer"; <<
290 reg = <0x00 0x2410000 0x00 0x4 <<
291 interrupts = <GIC_SPI 121 IRQ_ <<
292 clocks = <&k3_clks 37 2>; <<
293 clock-names = "fck"; <<
294 assigned-clocks = <&k3_clks 37 <<
295 assigned-clock-parents = <&k3_ <<
296 power-domains = <&k3_pds 37 TI <<
297 ti,timer-pwm; <<
298 }; <<
299 <<
300 main_timer2: timer@2420000 { <<
301 compatible = "ti,am654-timer"; <<
302 reg = <0x00 0x2420000 0x00 0x4 <<
303 interrupts = <GIC_SPI 122 IRQ_ <<
304 clocks = <&k3_clks 38 2>; <<
305 clock-names = "fck"; <<
306 assigned-clocks = <&k3_clks 38 <<
307 assigned-clock-parents = <&k3_ <<
308 power-domains = <&k3_pds 38 TI <<
309 ti,timer-pwm; <<
310 }; <<
311 <<
312 main_timer3: timer@2430000 { <<
313 compatible = "ti,am654-timer"; <<
314 reg = <0x00 0x2430000 0x00 0x4 <<
315 interrupts = <GIC_SPI 123 IRQ_ <<
316 clocks = <&k3_clks 39 2>; <<
317 clock-names = "fck"; <<
318 assigned-clocks = <&k3_clks 39 <<
319 assigned-clock-parents = <&k3_ <<
320 power-domains = <&k3_pds 39 TI <<
321 ti,timer-pwm; <<
322 }; <<
323 <<
324 main_timer4: timer@2440000 { <<
325 compatible = "ti,am654-timer"; <<
326 reg = <0x00 0x2440000 0x00 0x4 <<
327 interrupts = <GIC_SPI 124 IRQ_ <<
328 clocks = <&k3_clks 40 2>; <<
329 clock-names = "fck"; <<
330 assigned-clocks = <&k3_clks 40 <<
331 assigned-clock-parents = <&k3_ <<
332 power-domains = <&k3_pds 40 TI <<
333 ti,timer-pwm; <<
334 }; <<
335 <<
336 main_timer5: timer@2450000 { <<
337 compatible = "ti,am654-timer"; <<
338 reg = <0x00 0x2450000 0x00 0x4 <<
339 interrupts = <GIC_SPI 125 IRQ_ <<
340 clocks = <&k3_clks 41 2>; <<
341 clock-names = "fck"; <<
342 assigned-clocks = <&k3_clks 41 <<
343 assigned-clock-parents = <&k3_ <<
344 power-domains = <&k3_pds 41 TI <<
345 ti,timer-pwm; <<
346 }; <<
347 <<
348 main_timer6: timer@2460000 { <<
349 compatible = "ti,am654-timer"; <<
350 reg = <0x00 0x2460000 0x00 0x4 <<
351 interrupts = <GIC_SPI 126 IRQ_ <<
352 clocks = <&k3_clks 42 2>; <<
353 clock-names = "fck"; <<
354 assigned-clocks = <&k3_clks 42 <<
355 assigned-clock-parents = <&k3_ <<
356 power-domains = <&k3_pds 42 TI <<
357 ti,timer-pwm; <<
358 }; <<
359 <<
360 main_timer7: timer@2470000 { <<
361 compatible = "ti,am654-timer"; <<
362 reg = <0x00 0x2470000 0x00 0x4 <<
363 interrupts = <GIC_SPI 127 IRQ_ <<
364 clocks = <&k3_clks 43 2>; <<
365 clock-names = "fck"; <<
366 assigned-clocks = <&k3_clks 43 <<
367 assigned-clock-parents = <&k3_ <<
368 power-domains = <&k3_pds 43 TI <<
369 ti,timer-pwm; <<
370 }; <<
371 <<
372 main_uart0: serial@2800000 { 180 main_uart0: serial@2800000 {
373 compatible = "ti,am64-uart", " 181 compatible = "ti,am64-uart", "ti,am654-uart";
374 reg = <0x00 0x02800000 0x00 0x 182 reg = <0x00 0x02800000 0x00 0x100>;
375 interrupts = <GIC_SPI 178 IRQ_ 183 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
376 power-domains = <&k3_pds 146 T 184 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
377 clocks = <&k3_clks 146 0>; 185 clocks = <&k3_clks 146 0>;
378 clock-names = "fclk"; 186 clock-names = "fclk";
379 status = "disabled"; 187 status = "disabled";
380 }; 188 };
381 189
382 main_uart1: serial@2810000 { 190 main_uart1: serial@2810000 {
383 compatible = "ti,am64-uart", " 191 compatible = "ti,am64-uart", "ti,am654-uart";
384 reg = <0x00 0x02810000 0x00 0x 192 reg = <0x00 0x02810000 0x00 0x100>;
385 interrupts = <GIC_SPI 179 IRQ_ 193 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
386 power-domains = <&k3_pds 152 T 194 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
387 clocks = <&k3_clks 152 0>; 195 clocks = <&k3_clks 152 0>;
388 clock-names = "fclk"; 196 clock-names = "fclk";
389 status = "disabled"; 197 status = "disabled";
390 }; 198 };
391 199
392 main_uart2: serial@2820000 { 200 main_uart2: serial@2820000 {
393 compatible = "ti,am64-uart", " 201 compatible = "ti,am64-uart", "ti,am654-uart";
394 reg = <0x00 0x02820000 0x00 0x 202 reg = <0x00 0x02820000 0x00 0x100>;
395 interrupts = <GIC_SPI 180 IRQ_ 203 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
396 power-domains = <&k3_pds 153 T 204 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
397 clocks = <&k3_clks 153 0>; 205 clocks = <&k3_clks 153 0>;
398 clock-names = "fclk"; 206 clock-names = "fclk";
399 status = "disabled"; 207 status = "disabled";
400 }; 208 };
401 209
402 main_uart3: serial@2830000 { 210 main_uart3: serial@2830000 {
403 compatible = "ti,am64-uart", " 211 compatible = "ti,am64-uart", "ti,am654-uart";
404 reg = <0x00 0x02830000 0x00 0x 212 reg = <0x00 0x02830000 0x00 0x100>;
405 interrupts = <GIC_SPI 181 IRQ_ 213 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
406 power-domains = <&k3_pds 154 T 214 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
407 clocks = <&k3_clks 154 0>; 215 clocks = <&k3_clks 154 0>;
408 clock-names = "fclk"; 216 clock-names = "fclk";
409 status = "disabled"; 217 status = "disabled";
410 }; 218 };
411 219
412 main_uart4: serial@2840000 { 220 main_uart4: serial@2840000 {
413 compatible = "ti,am64-uart", " 221 compatible = "ti,am64-uart", "ti,am654-uart";
414 reg = <0x00 0x02840000 0x00 0x 222 reg = <0x00 0x02840000 0x00 0x100>;
415 interrupts = <GIC_SPI 182 IRQ_ 223 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
416 power-domains = <&k3_pds 155 T 224 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
417 clocks = <&k3_clks 155 0>; 225 clocks = <&k3_clks 155 0>;
418 clock-names = "fclk"; 226 clock-names = "fclk";
419 status = "disabled"; 227 status = "disabled";
420 }; 228 };
421 229
422 main_uart5: serial@2850000 { 230 main_uart5: serial@2850000 {
423 compatible = "ti,am64-uart", " 231 compatible = "ti,am64-uart", "ti,am654-uart";
424 reg = <0x00 0x02850000 0x00 0x 232 reg = <0x00 0x02850000 0x00 0x100>;
425 interrupts = <GIC_SPI 183 IRQ_ 233 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
426 power-domains = <&k3_pds 156 T 234 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
427 clocks = <&k3_clks 156 0>; 235 clocks = <&k3_clks 156 0>;
428 clock-names = "fclk"; 236 clock-names = "fclk";
429 status = "disabled"; 237 status = "disabled";
430 }; 238 };
431 239
432 main_uart6: serial@2860000 { 240 main_uart6: serial@2860000 {
433 compatible = "ti,am64-uart", " 241 compatible = "ti,am64-uart", "ti,am654-uart";
434 reg = <0x00 0x02860000 0x00 0x 242 reg = <0x00 0x02860000 0x00 0x100>;
435 interrupts = <GIC_SPI 184 IRQ_ 243 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
436 power-domains = <&k3_pds 158 T 244 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
437 clocks = <&k3_clks 158 0>; 245 clocks = <&k3_clks 158 0>;
438 clock-names = "fclk"; 246 clock-names = "fclk";
439 status = "disabled"; 247 status = "disabled";
440 }; 248 };
441 249
442 main_i2c0: i2c@20000000 { 250 main_i2c0: i2c@20000000 {
443 compatible = "ti,am64-i2c", "t 251 compatible = "ti,am64-i2c", "ti,omap4-i2c";
444 reg = <0x00 0x20000000 0x00 0x 252 reg = <0x00 0x20000000 0x00 0x100>;
445 interrupts = <GIC_SPI 161 IRQ_ 253 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
446 #address-cells = <1>; 254 #address-cells = <1>;
447 #size-cells = <0>; 255 #size-cells = <0>;
448 power-domains = <&k3_pds 102 T 256 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
449 clocks = <&k3_clks 102 2>; 257 clocks = <&k3_clks 102 2>;
450 clock-names = "fck"; 258 clock-names = "fck";
451 status = "disabled"; 259 status = "disabled";
452 }; 260 };
453 261
454 main_i2c1: i2c@20010000 { 262 main_i2c1: i2c@20010000 {
455 compatible = "ti,am64-i2c", "t 263 compatible = "ti,am64-i2c", "ti,omap4-i2c";
456 reg = <0x00 0x20010000 0x00 0x 264 reg = <0x00 0x20010000 0x00 0x100>;
457 interrupts = <GIC_SPI 162 IRQ_ 265 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
458 #address-cells = <1>; 266 #address-cells = <1>;
459 #size-cells = <0>; 267 #size-cells = <0>;
460 power-domains = <&k3_pds 103 T 268 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
461 clocks = <&k3_clks 103 2>; 269 clocks = <&k3_clks 103 2>;
462 clock-names = "fck"; 270 clock-names = "fck";
463 status = "disabled"; 271 status = "disabled";
464 }; 272 };
465 273
466 main_i2c2: i2c@20020000 { 274 main_i2c2: i2c@20020000 {
467 compatible = "ti,am64-i2c", "t 275 compatible = "ti,am64-i2c", "ti,omap4-i2c";
468 reg = <0x00 0x20020000 0x00 0x 276 reg = <0x00 0x20020000 0x00 0x100>;
469 interrupts = <GIC_SPI 163 IRQ_ 277 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
470 #address-cells = <1>; 278 #address-cells = <1>;
471 #size-cells = <0>; 279 #size-cells = <0>;
472 power-domains = <&k3_pds 104 T 280 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
473 clocks = <&k3_clks 104 2>; 281 clocks = <&k3_clks 104 2>;
474 clock-names = "fck"; 282 clock-names = "fck";
475 status = "disabled"; 283 status = "disabled";
476 }; 284 };
477 285
478 main_i2c3: i2c@20030000 { 286 main_i2c3: i2c@20030000 {
479 compatible = "ti,am64-i2c", "t 287 compatible = "ti,am64-i2c", "ti,omap4-i2c";
480 reg = <0x00 0x20030000 0x00 0x 288 reg = <0x00 0x20030000 0x00 0x100>;
481 interrupts = <GIC_SPI 164 IRQ_ 289 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
482 #address-cells = <1>; 290 #address-cells = <1>;
483 #size-cells = <0>; 291 #size-cells = <0>;
484 power-domains = <&k3_pds 105 T 292 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
485 clocks = <&k3_clks 105 2>; 293 clocks = <&k3_clks 105 2>;
486 clock-names = "fck"; 294 clock-names = "fck";
487 status = "disabled"; 295 status = "disabled";
488 }; 296 };
489 297
490 main_spi0: spi@20100000 { 298 main_spi0: spi@20100000 {
491 compatible = "ti,am654-mcspi", 299 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
492 reg = <0x00 0x20100000 0x00 0x 300 reg = <0x00 0x20100000 0x00 0x400>;
493 interrupts = <GIC_SPI 172 IRQ_ 301 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
494 #address-cells = <1>; 302 #address-cells = <1>;
495 #size-cells = <0>; 303 #size-cells = <0>;
496 power-domains = <&k3_pds 141 T 304 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
497 clocks = <&k3_clks 141 0>; 305 clocks = <&k3_clks 141 0>;
498 status = "disabled"; 306 status = "disabled";
499 }; 307 };
500 308
501 main_spi1: spi@20110000 { 309 main_spi1: spi@20110000 {
502 compatible = "ti,am654-mcspi", 310 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
503 reg = <0x00 0x20110000 0x00 0x 311 reg = <0x00 0x20110000 0x00 0x400>;
504 interrupts = <GIC_SPI 173 IRQ_ 312 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
505 #address-cells = <1>; 313 #address-cells = <1>;
506 #size-cells = <0>; 314 #size-cells = <0>;
507 power-domains = <&k3_pds 142 T 315 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
508 clocks = <&k3_clks 142 0>; 316 clocks = <&k3_clks 142 0>;
509 status = "disabled"; 317 status = "disabled";
510 }; 318 };
511 319
512 main_spi2: spi@20120000 { 320 main_spi2: spi@20120000 {
513 compatible = "ti,am654-mcspi", 321 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
514 reg = <0x00 0x20120000 0x00 0x 322 reg = <0x00 0x20120000 0x00 0x400>;
515 interrupts = <GIC_SPI 174 IRQ_ 323 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
516 #address-cells = <1>; 324 #address-cells = <1>;
517 #size-cells = <0>; 325 #size-cells = <0>;
518 power-domains = <&k3_pds 143 T 326 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
519 clocks = <&k3_clks 143 0>; 327 clocks = <&k3_clks 143 0>;
520 status = "disabled"; 328 status = "disabled";
521 }; 329 };
522 330
523 main_gpio_intr: interrupt-controller@a 331 main_gpio_intr: interrupt-controller@a00000 {
524 compatible = "ti,sci-intr"; 332 compatible = "ti,sci-intr";
525 reg = <0x00 0x00a00000 0x00 0x 333 reg = <0x00 0x00a00000 0x00 0x800>;
526 ti,intr-trigger-type = <1>; 334 ti,intr-trigger-type = <1>;
527 interrupt-controller; 335 interrupt-controller;
528 interrupt-parent = <&gic500>; 336 interrupt-parent = <&gic500>;
529 #interrupt-cells = <1>; 337 #interrupt-cells = <1>;
530 ti,sci = <&dmsc>; 338 ti,sci = <&dmsc>;
531 ti,sci-dev-id = <3>; 339 ti,sci-dev-id = <3>;
532 ti,interrupt-ranges = <0 32 16 340 ti,interrupt-ranges = <0 32 16>;
533 status = "disabled"; 341 status = "disabled";
534 }; 342 };
535 343
536 main_gpio0: gpio@600000 { 344 main_gpio0: gpio@600000 {
537 compatible = "ti,am64-gpio", " 345 compatible = "ti,am64-gpio", "ti,keystone-gpio";
538 reg = <0x00 0x00600000 0x0 0x1 346 reg = <0x00 0x00600000 0x0 0x100>;
539 gpio-controller; 347 gpio-controller;
540 #gpio-cells = <2>; 348 #gpio-cells = <2>;
541 interrupt-parent = <&main_gpio 349 interrupt-parent = <&main_gpio_intr>;
542 interrupts = <190>, <191>, <19 350 interrupts = <190>, <191>, <192>,
543 <193>, <194>, <19 351 <193>, <194>, <195>;
544 interrupt-controller; 352 interrupt-controller;
545 #interrupt-cells = <2>; 353 #interrupt-cells = <2>;
546 ti,ngpio = <92>; !! 354 ti,ngpio = <87>;
547 ti,davinci-gpio-unbanked = <0> 355 ti,davinci-gpio-unbanked = <0>;
548 power-domains = <&k3_pds 77 TI 356 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
549 clocks = <&k3_clks 77 0>; 357 clocks = <&k3_clks 77 0>;
550 clock-names = "gpio"; 358 clock-names = "gpio";
551 status = "disabled"; 359 status = "disabled";
552 }; 360 };
553 361
554 main_gpio1: gpio@601000 { 362 main_gpio1: gpio@601000 {
555 compatible = "ti,am64-gpio", " 363 compatible = "ti,am64-gpio", "ti,keystone-gpio";
556 reg = <0x00 0x00601000 0x0 0x1 364 reg = <0x00 0x00601000 0x0 0x100>;
557 gpio-controller; 365 gpio-controller;
558 #gpio-cells = <2>; 366 #gpio-cells = <2>;
559 interrupt-parent = <&main_gpio 367 interrupt-parent = <&main_gpio_intr>;
560 interrupts = <180>, <181>, <18 368 interrupts = <180>, <181>, <182>,
561 <183>, <184>, <18 369 <183>, <184>, <185>;
562 interrupt-controller; 370 interrupt-controller;
563 #interrupt-cells = <2>; 371 #interrupt-cells = <2>;
564 ti,ngpio = <52>; !! 372 ti,ngpio = <88>;
565 ti,davinci-gpio-unbanked = <0> 373 ti,davinci-gpio-unbanked = <0>;
566 power-domains = <&k3_pds 78 TI 374 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
567 clocks = <&k3_clks 78 0>; 375 clocks = <&k3_clks 78 0>;
568 clock-names = "gpio"; 376 clock-names = "gpio";
569 status = "disabled"; 377 status = "disabled";
570 }; 378 };
571 379
572 sdhci0: mmc@fa10000 { <<
573 compatible = "ti,am62-sdhci"; <<
574 reg = <0x00 0xfa10000 0x00 0x2 <<
575 interrupts = <GIC_SPI 133 IRQ_ <<
576 power-domains = <&k3_pds 57 TI <<
577 clocks = <&k3_clks 57 5>, <&k3 <<
578 clock-names = "clk_ahb", "clk_ <<
579 assigned-clocks = <&k3_clks 57 <<
580 assigned-clock-parents = <&k3_ <<
581 bus-width = <8>; <<
582 mmc-hs200-1_8v; <<
583 ti,clkbuf-sel = <0x7>; <<
584 ti,otap-del-sel-legacy = <0x0> <<
585 ti,otap-del-sel-mmc-hs = <0x0> <<
586 ti,otap-del-sel-hs200 = <0x6>; <<
587 status = "disabled"; <<
588 }; <<
589 <<
590 sdhci1: mmc@fa00000 { 380 sdhci1: mmc@fa00000 {
591 compatible = "ti,am62-sdhci"; 381 compatible = "ti,am62-sdhci";
592 reg = <0x00 0xfa00000 0x00 0x2 382 reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>;
593 interrupts = <GIC_SPI 83 IRQ_T 383 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
594 power-domains = <&k3_pds 58 TI 384 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
595 clocks = <&k3_clks 58 5>, <&k3 385 clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
596 clock-names = "clk_ahb", "clk_ 386 clock-names = "clk_ahb", "clk_xin";
597 bus-width = <4>; !! 387 ti,trm-icp = <0x2>;
598 ti,clkbuf-sel = <0x7>; <<
599 ti,otap-del-sel-legacy = <0x0> 388 ti,otap-del-sel-legacy = <0x0>;
600 ti,otap-del-sel-sd-hs = <0x0>; 389 ti,otap-del-sel-sd-hs = <0x0>;
601 ti,otap-del-sel-sdr12 = <0xf>; 390 ti,otap-del-sel-sdr12 = <0xf>;
602 ti,otap-del-sel-sdr25 = <0xf>; 391 ti,otap-del-sel-sdr25 = <0xf>;
603 ti,otap-del-sel-sdr50 = <0xc>; 392 ti,otap-del-sel-sdr50 = <0xc>;
604 ti,otap-del-sel-sdr104 = <0x6> 393 ti,otap-del-sel-sdr104 = <0x6>;
605 ti,otap-del-sel-ddr50 = <0x9>; 394 ti,otap-del-sel-ddr50 = <0x9>;
606 ti,itap-del-sel-legacy = <0x0> 395 ti,itap-del-sel-legacy = <0x0>;
607 ti,itap-del-sel-sd-hs = <0x0>; 396 ti,itap-del-sel-sd-hs = <0x0>;
608 ti,itap-del-sel-sdr12 = <0x0>; 397 ti,itap-del-sel-sdr12 = <0x0>;
609 ti,itap-del-sel-sdr25 = <0x0>; 398 ti,itap-del-sel-sdr25 = <0x0>;
610 status = "disabled"; <<
611 }; <<
612 <<
613 sdhci2: mmc@fa20000 { <<
614 compatible = "ti,am62-sdhci"; <<
615 reg = <0x00 0xfa20000 0x00 0x2 <<
616 interrupts = <GIC_SPI 82 IRQ_T <<
617 power-domains = <&k3_pds 184 T <<
618 clocks = <&k3_clks 184 5>, <&k <<
619 clock-names = "clk_ahb", "clk_ <<
620 bus-width = <4>; <<
621 ti,clkbuf-sel = <0x7>; 399 ti,clkbuf-sel = <0x7>;
622 ti,otap-del-sel-legacy = <0x0> !! 400 bus-width = <4>;
623 ti,otap-del-sel-sd-hs = <0x0>; !! 401 no-1-8-v;
624 ti,otap-del-sel-sdr12 = <0xf>; <<
625 ti,otap-del-sel-sdr25 = <0xf>; <<
626 ti,otap-del-sel-sdr50 = <0xc>; <<
627 ti,otap-del-sel-sdr104 = <0x6> <<
628 ti,otap-del-sel-ddr50 = <0x9>; <<
629 ti,itap-del-sel-legacy = <0x0> <<
630 ti,itap-del-sel-sd-hs = <0x0>; <<
631 ti,itap-del-sel-sdr12 = <0x0>; <<
632 ti,itap-del-sel-sdr25 = <0x0>; <<
633 status = "disabled"; 402 status = "disabled";
634 }; 403 };
635 404
636 usbss0: dwc3-usb@f900000 { 405 usbss0: dwc3-usb@f900000 {
637 compatible = "ti,am62-usb"; 406 compatible = "ti,am62-usb";
638 reg = <0x00 0x0f900000 0x00 0x !! 407 reg = <0x00 0x0f900000 0x00 0x800>;
639 <0x00 0x0f908000 0x00 0x <<
640 clocks = <&k3_clks 161 3>; 408 clocks = <&k3_clks 161 3>;
641 clock-names = "ref"; 409 clock-names = "ref";
642 ti,syscon-phy-pll-refclk = <&u !! 410 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
643 #address-cells = <2>; 411 #address-cells = <2>;
644 #size-cells = <2>; 412 #size-cells = <2>;
645 power-domains = <&k3_pds 178 T 413 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
646 ranges; 414 ranges;
647 status = "disabled"; 415 status = "disabled";
648 416
649 usb0: usb@31000000 { 417 usb0: usb@31000000 {
650 compatible = "snps,dwc 418 compatible = "snps,dwc3";
651 reg = <0x00 0x31000000 !! 419 reg =<0x00 0x31000000 0x00 0x50000>;
652 interrupts = <GIC_SPI 420 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
653 <GIC_SPI 421 <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
654 interrupt-names = "hos 422 interrupt-names = "host", "peripheral";
655 maximum-speed = "high- 423 maximum-speed = "high-speed";
656 dr_mode = "otg"; 424 dr_mode = "otg";
657 snps,usb2-gadget-lpm-d <<
658 snps,usb2-lpm-disable; <<
659 }; 425 };
660 }; 426 };
661 427
662 usbss1: dwc3-usb@f910000 { 428 usbss1: dwc3-usb@f910000 {
663 compatible = "ti,am62-usb"; 429 compatible = "ti,am62-usb";
664 reg = <0x00 0x0f910000 0x00 0x !! 430 reg = <0x00 0x0f910000 0x00 0x800>;
665 <0x00 0x0f918000 0x00 0x <<
666 clocks = <&k3_clks 162 3>; 431 clocks = <&k3_clks 162 3>;
667 clock-names = "ref"; 432 clock-names = "ref";
668 ti,syscon-phy-pll-refclk = <&u !! 433 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
669 #address-cells = <2>; 434 #address-cells = <2>;
670 #size-cells = <2>; 435 #size-cells = <2>;
671 power-domains = <&k3_pds 179 T 436 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
672 ranges; 437 ranges;
673 status = "disabled"; 438 status = "disabled";
674 439
675 usb1: usb@31100000 { 440 usb1: usb@31100000 {
676 compatible = "snps,dwc 441 compatible = "snps,dwc3";
677 reg = <0x00 0x31100000 !! 442 reg =<0x00 0x31100000 0x00 0x50000>;
678 interrupts = <GIC_SPI 443 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
679 <GIC_SPI 444 <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
680 interrupt-names = "hos 445 interrupt-names = "host", "peripheral";
681 maximum-speed = "high- 446 maximum-speed = "high-speed";
682 dr_mode = "otg"; 447 dr_mode = "otg";
683 snps,usb2-gadget-lpm-d <<
684 snps,usb2-lpm-disable; <<
685 }; 448 };
686 }; 449 };
687 450
688 fss: bus@fc00000 { 451 fss: bus@fc00000 {
689 compatible = "simple-bus"; 452 compatible = "simple-bus";
690 reg = <0x00 0x0fc00000 0x00 0x 453 reg = <0x00 0x0fc00000 0x00 0x70000>;
691 #address-cells = <2>; 454 #address-cells = <2>;
692 #size-cells = <2>; 455 #size-cells = <2>;
693 ranges; 456 ranges;
694 status = "disabled"; 457 status = "disabled";
695 458
696 ospi0: spi@fc40000 { 459 ospi0: spi@fc40000 {
697 compatible = "ti,am654 460 compatible = "ti,am654-ospi", "cdns,qspi-nor";
698 reg = <0x00 0x0fc40000 461 reg = <0x00 0x0fc40000 0x00 0x100>,
699 <0x05 0x00000000 462 <0x05 0x00000000 0x01 0x00000000>;
700 interrupts = <GIC_SPI 463 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
701 cdns,fifo-depth = <256 464 cdns,fifo-depth = <256>;
702 cdns,fifo-width = <4>; 465 cdns,fifo-width = <4>;
703 cdns,trigger-address = 466 cdns,trigger-address = <0x0>;
704 clocks = <&k3_clks 75 467 clocks = <&k3_clks 75 7>;
705 assigned-clocks = <&k3 468 assigned-clocks = <&k3_clks 75 7>;
706 assigned-clock-parents 469 assigned-clock-parents = <&k3_clks 75 8>;
707 assigned-clock-rates = 470 assigned-clock-rates = <166666666>;
708 power-domains = <&k3_p 471 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
709 #address-cells = <1>; 472 #address-cells = <1>;
710 #size-cells = <0>; 473 #size-cells = <0>;
711 }; 474 };
712 }; 475 };
713 476
714 cpsw3g: ethernet@8000000 { 477 cpsw3g: ethernet@8000000 {
715 compatible = "ti,am642-cpsw-nu 478 compatible = "ti,am642-cpsw-nuss";
716 #address-cells = <2>; 479 #address-cells = <2>;
717 #size-cells = <2>; 480 #size-cells = <2>;
718 reg = <0x0 0x8000000 0x0 0x200 481 reg = <0x0 0x8000000 0x0 0x200000>;
719 reg-names = "cpsw_nuss"; 482 reg-names = "cpsw_nuss";
720 ranges = <0x0 0x0 0x0 0x800000 483 ranges = <0x0 0x0 0x0 0x8000000 0x0 0x200000>;
721 clocks = <&k3_clks 13 0>; 484 clocks = <&k3_clks 13 0>;
722 assigned-clocks = <&k3_clks 13 485 assigned-clocks = <&k3_clks 13 3>;
723 assigned-clock-parents = <&k3_ 486 assigned-clock-parents = <&k3_clks 13 11>;
724 clock-names = "fck"; 487 clock-names = "fck";
725 power-domains = <&k3_pds 13 TI 488 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
726 status = "disabled"; 489 status = "disabled";
727 490
728 dmas = <&main_pktdma 0xc600 15 491 dmas = <&main_pktdma 0xc600 15>,
729 <&main_pktdma 0xc601 15 492 <&main_pktdma 0xc601 15>,
730 <&main_pktdma 0xc602 15 493 <&main_pktdma 0xc602 15>,
731 <&main_pktdma 0xc603 15 494 <&main_pktdma 0xc603 15>,
732 <&main_pktdma 0xc604 15 495 <&main_pktdma 0xc604 15>,
733 <&main_pktdma 0xc605 15 496 <&main_pktdma 0xc605 15>,
734 <&main_pktdma 0xc606 15 497 <&main_pktdma 0xc606 15>,
735 <&main_pktdma 0xc607 15 498 <&main_pktdma 0xc607 15>,
736 <&main_pktdma 0x4600 15 499 <&main_pktdma 0x4600 15>;
737 dma-names = "tx0", "tx1", "tx2 500 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
738 "tx7", "rx"; 501 "tx7", "rx";
739 502
740 ethernet-ports { 503 ethernet-ports {
741 #address-cells = <1>; 504 #address-cells = <1>;
742 #size-cells = <0>; 505 #size-cells = <0>;
743 506
744 cpsw_port1: port@1 { 507 cpsw_port1: port@1 {
745 reg = <1>; 508 reg = <1>;
746 ti,mac-only; 509 ti,mac-only;
747 label = "port1 510 label = "port1";
748 phys = <&phy_g 511 phys = <&phy_gmii_sel 1>;
749 mac-address = 512 mac-address = [00 00 00 00 00 00];
750 ti,syscon-efus !! 513 ti,syscon-efuse = <&wkup_conf 0x200>;
751 }; 514 };
752 515
753 cpsw_port2: port@2 { 516 cpsw_port2: port@2 {
754 reg = <2>; 517 reg = <2>;
755 ti,mac-only; 518 ti,mac-only;
756 label = "port2 519 label = "port2";
757 phys = <&phy_g 520 phys = <&phy_gmii_sel 2>;
758 mac-address = 521 mac-address = [00 00 00 00 00 00];
759 }; 522 };
760 }; 523 };
761 524
762 cpsw3g_mdio: mdio@f00 { 525 cpsw3g_mdio: mdio@f00 {
763 compatible = "ti,cpsw- 526 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
764 reg = <0x0 0xf00 0x0 0 527 reg = <0x0 0xf00 0x0 0x100>;
765 #address-cells = <1>; 528 #address-cells = <1>;
766 #size-cells = <0>; 529 #size-cells = <0>;
767 clocks = <&k3_clks 13 530 clocks = <&k3_clks 13 0>;
768 clock-names = "fck"; 531 clock-names = "fck";
769 bus_freq = <1000000>; 532 bus_freq = <1000000>;
770 }; 533 };
771 534
772 cpts@3d000 { 535 cpts@3d000 {
773 compatible = "ti,j721e 536 compatible = "ti,j721e-cpts";
774 reg = <0x0 0x3d000 0x0 537 reg = <0x0 0x3d000 0x0 0x400>;
775 clocks = <&k3_clks 13 538 clocks = <&k3_clks 13 3>;
776 clock-names = "cpts"; 539 clock-names = "cpts";
777 interrupts-extended = 540 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
778 interrupt-names = "cpt 541 interrupt-names = "cpts";
779 ti,cpts-ext-ts-inputs 542 ti,cpts-ext-ts-inputs = <4>;
780 ti,cpts-periodic-outpu 543 ti,cpts-periodic-outputs = <2>;
781 }; 544 };
782 }; 545 };
783 546
784 hwspinlock: spinlock@2a000000 { 547 hwspinlock: spinlock@2a000000 {
785 compatible = "ti,am64-hwspinlo 548 compatible = "ti,am64-hwspinlock";
786 reg = <0x00 0x2a000000 0x00 0x 549 reg = <0x00 0x2a000000 0x00 0x1000>;
787 #hwlock-cells = <1>; 550 #hwlock-cells = <1>;
788 }; 551 };
789 552
790 mailbox0_cluster0: mailbox@29000000 { 553 mailbox0_cluster0: mailbox@29000000 {
791 compatible = "ti,am64-mailbox" 554 compatible = "ti,am64-mailbox";
792 reg = <0x00 0x29000000 0x00 0x 555 reg = <0x00 0x29000000 0x00 0x200>;
793 interrupts = <GIC_SPI 76 IRQ_T 556 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
794 #mbox-cells = <1>; 557 #mbox-cells = <1>;
795 ti,mbox-num-users = <4>; 558 ti,mbox-num-users = <4>;
796 ti,mbox-num-fifos = <16>; 559 ti,mbox-num-fifos = <16>;
797 }; 560 };
798 561
799 mailbox0_cluster1: mailbox@29010000 { 562 mailbox0_cluster1: mailbox@29010000 {
800 compatible = "ti,am64-mailbox" 563 compatible = "ti,am64-mailbox";
801 reg = <0x00 0x29010000 0x00 0x 564 reg = <0x00 0x29010000 0x00 0x200>;
802 interrupts = <GIC_SPI 77 IRQ_T 565 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
803 #mbox-cells = <1>; 566 #mbox-cells = <1>;
804 ti,mbox-num-users = <4>; 567 ti,mbox-num-users = <4>;
805 ti,mbox-num-fifos = <16>; 568 ti,mbox-num-fifos = <16>;
806 }; 569 };
807 570
808 mailbox0_cluster2: mailbox@29020000 { 571 mailbox0_cluster2: mailbox@29020000 {
809 compatible = "ti,am64-mailbox" 572 compatible = "ti,am64-mailbox";
810 reg = <0x00 0x29020000 0x00 0x 573 reg = <0x00 0x29020000 0x00 0x200>;
811 interrupts = <GIC_SPI 108 IRQ_ 574 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
812 #mbox-cells = <1>; 575 #mbox-cells = <1>;
813 ti,mbox-num-users = <4>; 576 ti,mbox-num-users = <4>;
814 ti,mbox-num-fifos = <16>; 577 ti,mbox-num-fifos = <16>;
815 }; 578 };
816 579
817 mailbox0_cluster3: mailbox@29030000 { 580 mailbox0_cluster3: mailbox@29030000 {
818 compatible = "ti,am64-mailbox" 581 compatible = "ti,am64-mailbox";
819 reg = <0x00 0x29030000 0x00 0x 582 reg = <0x00 0x29030000 0x00 0x200>;
820 interrupts = <GIC_SPI 109 IRQ_ 583 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
821 #mbox-cells = <1>; 584 #mbox-cells = <1>;
822 ti,mbox-num-users = <4>; 585 ti,mbox-num-users = <4>;
823 ti,mbox-num-fifos = <16>; 586 ti,mbox-num-fifos = <16>;
824 }; 587 };
825 588
826 main_mcan0: can@20701000 { 589 main_mcan0: can@20701000 {
827 compatible = "bosch,m_can"; 590 compatible = "bosch,m_can";
828 reg = <0x00 0x20701000 0x00 0x 591 reg = <0x00 0x20701000 0x00 0x200>,
829 <0x00 0x20708000 0x00 0x 592 <0x00 0x20708000 0x00 0x8000>;
830 reg-names = "m_can", "message_ 593 reg-names = "m_can", "message_ram";
831 power-domains = <&k3_pds 98 TI 594 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
832 clocks = <&k3_clks 98 6>, <&k3 595 clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
833 clock-names = "hclk", "cclk"; 596 clock-names = "hclk", "cclk";
834 interrupts = <GIC_SPI 155 IRQ_ 597 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
835 <GIC_SPI 156 IRQ_ 598 <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
836 interrupt-names = "int0", "int 599 interrupt-names = "int0", "int1";
837 bosch,mram-cfg = <0x0 128 64 6 600 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
838 status = "disabled"; 601 status = "disabled";
839 }; 602 };
840 603
841 main_rti0: watchdog@e000000 { <<
842 compatible = "ti,j7-rti-wdt"; <<
843 reg = <0x00 0x0e000000 0x00 0x <<
844 clocks = <&k3_clks 125 0>; <<
845 power-domains = <&k3_pds 125 T <<
846 assigned-clocks = <&k3_clks 12 <<
847 assigned-clock-parents = <&k3_ <<
848 }; <<
849 <<
850 main_rti1: watchdog@e010000 { <<
851 compatible = "ti,j7-rti-wdt"; <<
852 reg = <0x00 0x0e010000 0x00 0x <<
853 clocks = <&k3_clks 126 0>; <<
854 power-domains = <&k3_pds 126 T <<
855 assigned-clocks = <&k3_clks 12 <<
856 assigned-clock-parents = <&k3_ <<
857 }; <<
858 <<
859 main_rti2: watchdog@e020000 { <<
860 compatible = "ti,j7-rti-wdt"; <<
861 reg = <0x00 0x0e020000 0x00 0x <<
862 clocks = <&k3_clks 127 0>; <<
863 power-domains = <&k3_pds 127 T <<
864 assigned-clocks = <&k3_clks 12 <<
865 assigned-clock-parents = <&k3_ <<
866 }; <<
867 <<
868 main_rti3: watchdog@e030000 { <<
869 compatible = "ti,j7-rti-wdt"; <<
870 reg = <0x00 0x0e030000 0x00 0x <<
871 clocks = <&k3_clks 128 0>; <<
872 power-domains = <&k3_pds 128 T <<
873 assigned-clocks = <&k3_clks 12 <<
874 assigned-clock-parents = <&k3_ <<
875 }; <<
876 <<
877 main_rti4: watchdog@e040000 { <<
878 compatible = "ti,j7-rti-wdt"; <<
879 reg = <0x00 0x0e040000 0x00 0x <<
880 clocks = <&k3_clks 205 0>; <<
881 power-domains = <&k3_pds 205 T <<
882 assigned-clocks = <&k3_clks 20 <<
883 assigned-clock-parents = <&k3_ <<
884 }; <<
885 <<
886 epwm0: pwm@23000000 { 604 epwm0: pwm@23000000 {
887 compatible = "ti,am64-epwm", " 605 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
888 #pwm-cells = <3>; 606 #pwm-cells = <3>;
889 reg = <0x00 0x23000000 0x00 0x 607 reg = <0x00 0x23000000 0x00 0x100>;
890 power-domains = <&k3_pds 86 TI 608 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
891 clocks = <&epwm_tbclk 0>, <&k3 609 clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
892 clock-names = "tbclk", "fck"; 610 clock-names = "tbclk", "fck";
893 status = "disabled"; 611 status = "disabled";
894 }; 612 };
895 613
896 epwm1: pwm@23010000 { 614 epwm1: pwm@23010000 {
897 compatible = "ti,am64-epwm", " 615 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
898 #pwm-cells = <3>; 616 #pwm-cells = <3>;
899 reg = <0x00 0x23010000 0x00 0x 617 reg = <0x00 0x23010000 0x00 0x100>;
900 power-domains = <&k3_pds 87 TI 618 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
901 clocks = <&epwm_tbclk 1>, <&k3 619 clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
902 clock-names = "tbclk", "fck"; 620 clock-names = "tbclk", "fck";
903 status = "disabled"; 621 status = "disabled";
904 }; 622 };
905 623
906 epwm2: pwm@23020000 { 624 epwm2: pwm@23020000 {
907 compatible = "ti,am64-epwm", " 625 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
908 #pwm-cells = <3>; 626 #pwm-cells = <3>;
909 reg = <0x00 0x23020000 0x00 0x 627 reg = <0x00 0x23020000 0x00 0x100>;
910 power-domains = <&k3_pds 88 TI 628 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
911 clocks = <&epwm_tbclk 2>, <&k3 629 clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
912 clock-names = "tbclk", "fck"; 630 clock-names = "tbclk", "fck";
913 status = "disabled"; 631 status = "disabled";
914 }; 632 };
915 633
916 ecap0: pwm@23100000 { 634 ecap0: pwm@23100000 {
917 compatible = "ti,am3352-ecap"; 635 compatible = "ti,am3352-ecap";
918 #pwm-cells = <3>; 636 #pwm-cells = <3>;
919 reg = <0x00 0x23100000 0x00 0x 637 reg = <0x00 0x23100000 0x00 0x100>;
920 power-domains = <&k3_pds 51 TI 638 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
921 clocks = <&k3_clks 51 0>; 639 clocks = <&k3_clks 51 0>;
922 clock-names = "fck"; 640 clock-names = "fck";
923 status = "disabled"; 641 status = "disabled";
924 }; 642 };
925 643
926 ecap1: pwm@23110000 { 644 ecap1: pwm@23110000 {
927 compatible = "ti,am3352-ecap"; 645 compatible = "ti,am3352-ecap";
928 #pwm-cells = <3>; 646 #pwm-cells = <3>;
929 reg = <0x00 0x23110000 0x00 0x 647 reg = <0x00 0x23110000 0x00 0x100>;
930 power-domains = <&k3_pds 52 TI 648 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
931 clocks = <&k3_clks 52 0>; 649 clocks = <&k3_clks 52 0>;
932 clock-names = "fck"; 650 clock-names = "fck";
933 status = "disabled"; 651 status = "disabled";
934 }; 652 };
935 653
936 ecap2: pwm@23120000 { 654 ecap2: pwm@23120000 {
937 compatible = "ti,am3352-ecap"; 655 compatible = "ti,am3352-ecap";
938 #pwm-cells = <3>; 656 #pwm-cells = <3>;
939 reg = <0x00 0x23120000 0x00 0x 657 reg = <0x00 0x23120000 0x00 0x100>;
940 power-domains = <&k3_pds 53 TI 658 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
941 clocks = <&k3_clks 53 0>; 659 clocks = <&k3_clks 53 0>;
942 clock-names = "fck"; 660 clock-names = "fck";
943 status = "disabled"; 661 status = "disabled";
944 }; <<
945 <<
946 mcasp0: audio-controller@2b00000 { <<
947 compatible = "ti,am33xx-mcasp- <<
948 reg = <0x00 0x02b00000 0x00 0x <<
949 <0x00 0x02b08000 0x00 0x <<
950 reg-names = "mpu", "dat"; <<
951 interrupts = <GIC_SPI 236 IRQ_ <<
952 <GIC_SPI 235 IRQ_ <<
953 interrupt-names = "tx", "rx"; <<
954 <<
955 dmas = <&main_bcdma 0 0xc500 0 <<
956 dma-names = "tx", "rx"; <<
957 <<
958 clocks = <&k3_clks 190 0>; <<
959 clock-names = "fck"; <<
960 assigned-clocks = <&k3_clks 19 <<
961 assigned-clock-parents = <&k3_ <<
962 power-domains = <&k3_pds 190 T <<
963 status = "disabled"; <<
964 }; <<
965 <<
966 mcasp1: audio-controller@2b10000 { <<
967 compatible = "ti,am33xx-mcasp- <<
968 reg = <0x00 0x02b10000 0x00 0x <<
969 <0x00 0x02b18000 0x00 0x <<
970 reg-names = "mpu", "dat"; <<
971 interrupts = <GIC_SPI 238 IRQ_ <<
972 <GIC_SPI 237 IRQ_ <<
973 interrupt-names = "tx", "rx"; <<
974 <<
975 dmas = <&main_bcdma 0 0xc501 0 <<
976 dma-names = "tx", "rx"; <<
977 <<
978 clocks = <&k3_clks 191 0>; <<
979 clock-names = "fck"; <<
980 assigned-clocks = <&k3_clks 19 <<
981 assigned-clock-parents = <&k3_ <<
982 power-domains = <&k3_pds 191 T <<
983 status = "disabled"; <<
984 }; <<
985 <<
986 mcasp2: audio-controller@2b20000 { <<
987 compatible = "ti,am33xx-mcasp- <<
988 reg = <0x00 0x02b20000 0x00 0x <<
989 <0x00 0x02b28000 0x00 0x <<
990 reg-names = "mpu", "dat"; <<
991 interrupts = <GIC_SPI 240 IRQ_ <<
992 <GIC_SPI 239 IRQ_ <<
993 interrupt-names = "tx", "rx"; <<
994 <<
995 dmas = <&main_bcdma 0 0xc502 0 <<
996 dma-names = "tx", "rx"; <<
997 <<
998 clocks = <&k3_clks 192 0>; <<
999 clock-names = "fck"; <<
1000 assigned-clocks = <&k3_clks 1 <<
1001 assigned-clock-parents = <&k3 <<
1002 power-domains = <&k3_pds 192 <<
1003 status = "disabled"; <<
1004 }; <<
1005 <<
1006 ti_csi2rx0: ticsi2rx@30102000 { <<
1007 compatible = "ti,j721e-csi2rx <<
1008 dmas = <&main_bcdma_csi 0 0x5 <<
1009 dma-names = "rx0"; <<
1010 reg = <0x00 0x30102000 0x00 0 <<
1011 power-domains = <&k3_pds 182 <<
1012 #address-cells = <2>; <<
1013 #size-cells = <2>; <<
1014 ranges; <<
1015 status = "disabled"; <<
1016 <<
1017 cdns_csi2rx0: csi-bridge@3010 <<
1018 compatible = "ti,j721 <<
1019 reg = <0x00 0x3010100 <<
1020 clocks = <&k3_clks 18 <<
1021 <&k3_clks 182 <<
1022 clock-names = "sys_cl <<
1023 "pixel_if1_cl <<
1024 phys = <&dphy0>; <<
1025 phy-names = "dphy"; <<
1026 <<
1027 ports { <<
1028 #address-cell <<
1029 #size-cells = <<
1030 <<
1031 csi0_port0: p <<
1032 reg = <<
1033 statu <<
1034 }; <<
1035 <<
1036 csi0_port1: p <<
1037 reg = <<
1038 statu <<
1039 }; <<
1040 <<
1041 csi0_port2: p <<
1042 reg = <<
1043 statu <<
1044 }; <<
1045 <<
1046 csi0_port3: p <<
1047 reg = <<
1048 statu <<
1049 }; <<
1050 <<
1051 csi0_port4: p <<
1052 reg = <<
1053 statu <<
1054 }; <<
1055 }; <<
1056 }; <<
1057 }; <<
1058 <<
1059 dphy0: phy@30110000 { <<
1060 compatible = "cdns,dphy-rx"; <<
1061 reg = <0x00 0x30110000 0x00 0 <<
1062 #phy-cells = <0>; <<
1063 power-domains = <&k3_pds 185 <<
1064 status = "disabled"; <<
1065 }; <<
1066 <<
1067 dss: dss@30200000 { <<
1068 compatible = "ti,am62a7-dss"; <<
1069 reg = <0x00 0x30200000 0x00 0 <<
1070 <0x00 0x30202000 0x00 0 <<
1071 <0x00 0x30206000 0x00 0 <<
1072 <0x00 0x30207000 0x00 0 <<
1073 <0x00 0x30208000 0x00 0 <<
1074 <0x00 0x3020a000 0x00 0 <<
1075 <0x00 0x3020b000 0x00 0 <<
1076 <0x00 0x30201000 0x00 0 <<
1077 reg-names = "common", "vidl1" <<
1078 "ovr1", "ovr2", " <<
1079 power-domains = <&k3_pds 186 <<
1080 clocks = <&k3_clks 186 6>, <<
1081 <&k3_clks 186 0>, <<
1082 <&k3_clks 186 2>; <<
1083 clock-names = "fck", "vp1", " <<
1084 interrupts = <GIC_SPI 84 IRQ_ <<
1085 status = "disabled"; <<
1086 <<
1087 dss_ports: ports { <<
1088 #address-cells = <1>; <<
1089 #size-cells = <0>; <<
1090 }; <<
1091 }; <<
1092 <<
1093 vpu: video-codec@30210000 { <<
1094 compatible = "ti,j721s2-wave5 <<
1095 reg = <0x00 0x30210000 0x00 0 <<
1096 clocks = <&k3_clks 204 2>; <<
1097 power-domains = <&k3_pds 204 <<
1098 }; <<
1099 <<
1100 e5010: jpeg-encoder@fd20000 { <<
1101 compatible = "ti,am62a-jpeg-e <<
1102 reg = <0x00 0xfd20000 0x00 0x <<
1103 <0x00 0xfd20200 0x00 0x <<
1104 reg-names = "core", "mmu"; <<
1105 clocks = <&k3_clks 201 0>; <<
1106 power-domains = <&k3_pds 201 <<
1107 interrupts = <GIC_SPI 98 IRQ_ <<
1108 }; 662 };
1109 }; 663 };
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