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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/ti/k3-am62a-main.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm64/ti/k3-am62a-main.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm64/ti/k3-am62a-main.dtsi (Architecture ppc)


  1 // SPDX-License-Identifier: GPL-2.0-only OR MI      1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
  2 /*                                                  2 /*
  3  * Device Tree Source for AM62A SoC Family Mai      3  * Device Tree Source for AM62A SoC Family Main Domain peripherals
  4  *                                                  4  *
  5  * Copyright (C) 2022-2024 Texas Instruments I      5  * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
  6  */                                                 6  */
  7                                                     7 
  8 &cbass_main {                                       8 &cbass_main {
  9         oc_sram: sram@70000000 {                    9         oc_sram: sram@70000000 {
 10                 compatible = "mmio-sram";          10                 compatible = "mmio-sram";
 11                 reg = <0x00 0x70000000 0x00 0x     11                 reg = <0x00 0x70000000 0x00 0x10000>;
 12                 #address-cells = <1>;              12                 #address-cells = <1>;
 13                 #size-cells = <1>;                 13                 #size-cells = <1>;
 14                 ranges = <0x0 0x00 0x70000000      14                 ranges = <0x0 0x00 0x70000000 0x10000>;
 15         };                                         15         };
 16                                                    16 
 17         gic500: interrupt-controller@1800000 {     17         gic500: interrupt-controller@1800000 {
 18                 compatible = "arm,gic-v3";         18                 compatible = "arm,gic-v3";
 19                 reg = <0x00 0x01800000 0x00 0x     19                 reg = <0x00 0x01800000 0x00 0x10000>,   /* GICD */
 20                       <0x00 0x01880000 0x00 0x     20                       <0x00 0x01880000 0x00 0xc0000>,   /* GICR */
 21                       <0x00 0x01880000 0x00 0x     21                       <0x00 0x01880000 0x00 0xc0000>,   /* GICR */
 22                       <0x01 0x00000000 0x00 0x     22                       <0x01 0x00000000 0x00 0x2000>,    /* GICC */
 23                       <0x01 0x00010000 0x00 0x     23                       <0x01 0x00010000 0x00 0x1000>,    /* GICH */
 24                       <0x01 0x00020000 0x00 0x     24                       <0x01 0x00020000 0x00 0x2000>;    /* GICV */
 25                 #address-cells = <2>;              25                 #address-cells = <2>;
 26                 #size-cells = <2>;                 26                 #size-cells = <2>;
 27                 ranges;                            27                 ranges;
 28                 #interrupt-cells = <3>;            28                 #interrupt-cells = <3>;
 29                 interrupt-controller;              29                 interrupt-controller;
 30                 /*                                 30                 /*
 31                  * vcpumntirq:                     31                  * vcpumntirq:
 32                  * virtual CPU interface maint     32                  * virtual CPU interface maintenance interrupt
 33                  */                                33                  */
 34                 interrupts = <GIC_PPI 9 IRQ_TY     34                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 35                                                    35 
 36                 gic_its: msi-controller@182000     36                 gic_its: msi-controller@1820000 {
 37                         compatible = "arm,gic-     37                         compatible = "arm,gic-v3-its";
 38                         reg = <0x00 0x01820000     38                         reg = <0x00 0x01820000 0x00 0x10000>;
 39                         socionext,synquacer-pr     39                         socionext,synquacer-pre-its = <0x1000000 0x400000>;
 40                         msi-controller;            40                         msi-controller;
 41                         #msi-cells = <1>;          41                         #msi-cells = <1>;
 42                 };                                 42                 };
 43         };                                         43         };
 44                                                    44 
 45         main_conf: bus@100000 {                    45         main_conf: bus@100000 {
 46                 compatible = "simple-bus";         46                 compatible = "simple-bus";
 47                 #address-cells = <1>;              47                 #address-cells = <1>;
 48                 #size-cells = <1>;                 48                 #size-cells = <1>;
 49                 ranges = <0x00 0x00 0x00100000     49                 ranges = <0x00 0x00 0x00100000 0x20000>;
 50                                                    50 
 51                 phy_gmii_sel: phy@4044 {           51                 phy_gmii_sel: phy@4044 {
 52                         compatible = "ti,am654     52                         compatible = "ti,am654-phy-gmii-sel";
 53                         reg = <0x4044 0x8>;        53                         reg = <0x4044 0x8>;
 54                         #phy-cells = <1>;          54                         #phy-cells = <1>;
 55                 };                                 55                 };
 56                                                    56 
 57                 epwm_tbclk: clock-controller@4     57                 epwm_tbclk: clock-controller@4130 {
 58                         compatible = "ti,am62-     58                         compatible = "ti,am62-epwm-tbclk";
 59                         reg = <0x4130 0x4>;        59                         reg = <0x4130 0x4>;
 60                         #clock-cells = <1>;        60                         #clock-cells = <1>;
 61                 };                                 61                 };
 62                                                    62 
 63                 audio_refclk0: clock-controlle     63                 audio_refclk0: clock-controller@82e0 {
 64                         compatible = "ti,am62-     64                         compatible = "ti,am62-audio-refclk";
 65                         reg = <0x82e0 0x4>;        65                         reg = <0x82e0 0x4>;
 66                         clocks = <&k3_clks 157     66                         clocks = <&k3_clks 157 0>;
 67                         assigned-clocks = <&k3     67                         assigned-clocks = <&k3_clks 157 0>;
 68                         assigned-clock-parents     68                         assigned-clock-parents = <&k3_clks 157 8>;
 69                         #clock-cells = <0>;        69                         #clock-cells = <0>;
 70                 };                                 70                 };
 71                                                    71 
 72                 audio_refclk1: clock-controlle     72                 audio_refclk1: clock-controller@82e4 {
 73                         compatible = "ti,am62-     73                         compatible = "ti,am62-audio-refclk";
 74                         reg = <0x82e4 0x4>;        74                         reg = <0x82e4 0x4>;
 75                         clocks = <&k3_clks 157     75                         clocks = <&k3_clks 157 10>;
 76                         assigned-clocks = <&k3     76                         assigned-clocks = <&k3_clks 157 10>;
 77                         assigned-clock-parents     77                         assigned-clock-parents = <&k3_clks 157 18>;
 78                         #clock-cells = <0>;        78                         #clock-cells = <0>;
 79                 };                                 79                 };
 80         };                                         80         };
 81                                                    81 
 82         dmss: bus@48000000 {                       82         dmss: bus@48000000 {
 83                 compatible = "simple-bus";         83                 compatible = "simple-bus";
 84                 #address-cells = <2>;              84                 #address-cells = <2>;
 85                 #size-cells = <2>;                 85                 #size-cells = <2>;
 86                 dma-ranges;                        86                 dma-ranges;
 87                 ranges = <0x00 0x48000000 0x00     87                 ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06000000>;
 88                                                    88 
 89                 ti,sci-dev-id = <25>;              89                 ti,sci-dev-id = <25>;
 90                                                    90 
 91                 secure_proxy_main: mailbox@4d0     91                 secure_proxy_main: mailbox@4d000000 {
 92                         compatible = "ti,am654     92                         compatible = "ti,am654-secure-proxy";
 93                         reg = <0x00 0x4d000000     93                         reg = <0x00 0x4d000000 0x00 0x80000>,
 94                               <0x00 0x4a600000     94                               <0x00 0x4a600000 0x00 0x80000>,
 95                               <0x00 0x4a400000     95                               <0x00 0x4a400000 0x00 0x80000>;
 96                         reg-names = "target_da     96                         reg-names = "target_data", "rt", "scfg";
 97                         #mbox-cells = <1>;         97                         #mbox-cells = <1>;
 98                         interrupt-names = "rx_     98                         interrupt-names = "rx_012";
 99                         interrupts = <GIC_SPI      99                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
100                 };                                100                 };
101                                                   101 
102                 inta_main_dmss: interrupt-cont    102                 inta_main_dmss: interrupt-controller@48000000 {
103                         compatible = "ti,sci-i    103                         compatible = "ti,sci-inta";
104                         reg = <0x00 0x48000000    104                         reg = <0x00 0x48000000 0x00 0x100000>;
105                         #interrupt-cells = <0>    105                         #interrupt-cells = <0>;
106                         interrupt-controller;     106                         interrupt-controller;
107                         interrupt-parent = <&g    107                         interrupt-parent = <&gic500>;
108                         msi-controller;           108                         msi-controller;
109                         ti,sci = <&dmsc>;         109                         ti,sci = <&dmsc>;
110                         ti,sci-dev-id = <28>;     110                         ti,sci-dev-id = <28>;
111                         ti,interrupt-ranges =     111                         ti,interrupt-ranges = <6 70 34>;
112                         ti,unmapped-event-sour    112                         ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
113                 };                                113                 };
114                                                   114 
115                 main_bcdma: dma-controller@485    115                 main_bcdma: dma-controller@485c0100 {
116                         compatible = "ti,am64-    116                         compatible = "ti,am64-dmss-bcdma";
117                         reg = <0x00 0x485c0100    117                         reg = <0x00 0x485c0100 0x00 0x100>,
118                               <0x00 0x4c000000    118                               <0x00 0x4c000000 0x00 0x20000>,
119                               <0x00 0x4a820000    119                               <0x00 0x4a820000 0x00 0x20000>,
120                               <0x00 0x4aa40000    120                               <0x00 0x4aa40000 0x00 0x20000>,
121                               <0x00 0x4bc00000    121                               <0x00 0x4bc00000 0x00 0x100000>,
122                               <0x00 0x48600000    122                               <0x00 0x48600000 0x00 0x8000>,
123                               <0x00 0x484a4000    123                               <0x00 0x484a4000 0x00 0x2000>,
124                               <0x00 0x484c2000    124                               <0x00 0x484c2000 0x00 0x2000>,
125                               <0x00 0x48420000    125                               <0x00 0x48420000 0x00 0x2000>;
126                         reg-names = "gcfg", "b    126                         reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
127                                     "ring", "t    127                                     "ring", "tchan", "rchan", "bchan";
128                         msi-parent = <&inta_ma    128                         msi-parent = <&inta_main_dmss>;
129                         #dma-cells = <3>;         129                         #dma-cells = <3>;
130                         ti,sci = <&dmsc>;         130                         ti,sci = <&dmsc>;
131                         ti,sci-dev-id = <26>;     131                         ti,sci-dev-id = <26>;
132                         ti,sci-rm-range-bchan     132                         ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
133                         ti,sci-rm-range-rchan     133                         ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
134                         ti,sci-rm-range-tchan     134                         ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
135                 };                                135                 };
136                                                   136 
137                 main_pktdma: dma-controller@48    137                 main_pktdma: dma-controller@485c0000 {
138                         compatible = "ti,am64-    138                         compatible = "ti,am64-dmss-pktdma";
139                         reg = <0x00 0x485c0000    139                         reg = <0x00 0x485c0000 0x00 0x100>,
140                               <0x00 0x4a800000    140                               <0x00 0x4a800000 0x00 0x20000>,
141                               <0x00 0x4aa00000    141                               <0x00 0x4aa00000 0x00 0x20000>,
142                               <0x00 0x4b800000    142                               <0x00 0x4b800000 0x00 0x200000>,
143                               <0x00 0x485e0000    143                               <0x00 0x485e0000 0x00 0x10000>,
144                               <0x00 0x484a0000    144                               <0x00 0x484a0000 0x00 0x2000>,
145                               <0x00 0x484c0000    145                               <0x00 0x484c0000 0x00 0x2000>,
146                               <0x00 0x48430000    146                               <0x00 0x48430000 0x00 0x1000>;
147                         reg-names = "gcfg", "r    147                         reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
148                                     "ring", "t    148                                     "ring", "tchan", "rchan", "rflow";
149                         msi-parent = <&inta_ma    149                         msi-parent = <&inta_main_dmss>;
150                         #dma-cells = <2>;         150                         #dma-cells = <2>;
151                         ti,sci = <&dmsc>;         151                         ti,sci = <&dmsc>;
152                         ti,sci-dev-id = <30>;     152                         ti,sci-dev-id = <30>;
153                         ti,sci-rm-range-tchan     153                         ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
154                                                   154                                                 <0x24>, /* CPSW_TX_CHAN */
155                                                   155                                                 <0x25>, /* SAUL_TX_0_CHAN */
156                                                   156                                                 <0x26>; /* SAUL_TX_1_CHAN */
157                         ti,sci-rm-range-tflow     157                         ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
158                                                   158                                                 <0x11>, /* RING_CPSW_TX_CHAN */
159                                                   159                                                 <0x12>, /* RING_SAUL_TX_0_CHAN */
160                                                   160                                                 <0x13>; /* RING_SAUL_TX_1_CHAN */
161                         ti,sci-rm-range-rchan     161                         ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
162                                                   162                                                 <0x2b>, /* CPSW_RX_CHAN */
163                                                   163                                                 <0x2d>, /* SAUL_RX_0_CHAN */
164                                                   164                                                 <0x2f>, /* SAUL_RX_1_CHAN */
165                                                   165                                                 <0x31>, /* SAUL_RX_2_CHAN */
166                                                   166                                                 <0x33>; /* SAUL_RX_3_CHAN */
167                         ti,sci-rm-range-rflow     167                         ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
168                                                   168                                                 <0x2c>, /* FLOW_CPSW_RX_CHAN */
169                                                   169                                                 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
170                                                   170                                                 <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
171                 };                                171                 };
172         };                                        172         };
173                                                   173 
174         dmss_csi: bus@4e000000 {                  174         dmss_csi: bus@4e000000 {
175                 compatible = "simple-bus";        175                 compatible = "simple-bus";
176                 #address-cells = <2>;             176                 #address-cells = <2>;
177                 #size-cells = <2>;                177                 #size-cells = <2>;
178                 dma-ranges;                       178                 dma-ranges;
179                 ranges = <0x00 0x4e000000 0x00    179                 ranges = <0x00 0x4e000000 0x00 0x4e000000 0x00 0x300000>;
180                                                   180 
181                 ti,sci-dev-id = <198>;            181                 ti,sci-dev-id = <198>;
182                                                   182 
183                 inta_main_dmss_csi: interrupt-    183                 inta_main_dmss_csi: interrupt-controller@4e0a0000 {
184                         compatible = "ti,sci-i    184                         compatible = "ti,sci-inta";
185                         reg = <0x00 0x4e0a0000    185                         reg = <0x00 0x4e0a0000 0x00 0x8000>;
186                         #interrupt-cells = <0>    186                         #interrupt-cells = <0>;
187                         interrupt-controller;     187                         interrupt-controller;
188                         interrupt-parent = <&g    188                         interrupt-parent = <&gic500>;
189                         msi-controller;           189                         msi-controller;
190                         ti,sci = <&dmsc>;         190                         ti,sci = <&dmsc>;
191                         ti,sci-dev-id = <200>;    191                         ti,sci-dev-id = <200>;
192                         ti,interrupt-ranges =     192                         ti,interrupt-ranges = <0 237 8>;
193                         ti,unmapped-event-sour    193                         ti,unmapped-event-sources = <&main_bcdma_csi>;
194                         power-domains = <&k3_p    194                         power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
195                 };                                195                 };
196                                                   196 
197                 main_bcdma_csi: dma-controller    197                 main_bcdma_csi: dma-controller@4e230000 {
198                         compatible = "ti,am62a    198                         compatible = "ti,am62a-dmss-bcdma-csirx";
199                         reg = <0x00 0x4e230000    199                         reg = <0x00 0x4e230000 0x00 0x100>,
200                               <0x00 0x4e180000    200                               <0x00 0x4e180000 0x00 0x8000>,
201                               <0x00 0x4e100000    201                               <0x00 0x4e100000 0x00 0x10000>;
202                         reg-names = "gcfg", "r    202                         reg-names = "gcfg", "rchanrt", "ringrt";
203                         msi-parent = <&inta_ma    203                         msi-parent = <&inta_main_dmss_csi>;
204                         #dma-cells = <3>;         204                         #dma-cells = <3>;
205                         ti,sci = <&dmsc>;         205                         ti,sci = <&dmsc>;
206                         ti,sci-dev-id = <199>;    206                         ti,sci-dev-id = <199>;
207                         ti,sci-rm-range-rchan     207                         ti,sci-rm-range-rchan = <0x21>;
208                         power-domains = <&k3_p    208                         power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
209                 };                                209                 };
210         };                                        210         };
211                                                   211 
212         dmsc: system-controller@44043000 {        212         dmsc: system-controller@44043000 {
213                 compatible = "ti,k2g-sci";        213                 compatible = "ti,k2g-sci";
214                 reg = <0x00 0x44043000 0x00 0x    214                 reg = <0x00 0x44043000 0x00 0xfe0>;
215                 reg-names = "debug_messages";     215                 reg-names = "debug_messages";
216                 ti,host-id = <12>;                216                 ti,host-id = <12>;
217                 mbox-names = "rx", "tx";          217                 mbox-names = "rx", "tx";
218                 mboxes = <&secure_proxy_main 1    218                 mboxes = <&secure_proxy_main 12>,
219                          <&secure_proxy_main 1    219                          <&secure_proxy_main 13>;
220                                                   220 
221                 k3_pds: power-controller {        221                 k3_pds: power-controller {
222                         compatible = "ti,sci-p    222                         compatible = "ti,sci-pm-domain";
223                         #power-domain-cells =     223                         #power-domain-cells = <2>;
224                 };                                224                 };
225                                                   225 
226                 k3_clks: clock-controller {       226                 k3_clks: clock-controller {
227                         compatible = "ti,k2g-s    227                         compatible = "ti,k2g-sci-clk";
228                         #clock-cells = <2>;       228                         #clock-cells = <2>;
229                 };                                229                 };
230                                                   230 
231                 k3_reset: reset-controller {      231                 k3_reset: reset-controller {
232                         compatible = "ti,sci-r    232                         compatible = "ti,sci-reset";
233                         #reset-cells = <2>;       233                         #reset-cells = <2>;
234                 };                                234                 };
235         };                                        235         };
236                                                   236 
237         crypto: crypto@40900000 {                 237         crypto: crypto@40900000 {
238                 compatible = "ti,am62-sa3ul";     238                 compatible = "ti,am62-sa3ul";
239                 reg = <0x00 0x40900000 0x00 0x    239                 reg = <0x00 0x40900000 0x00 0x1200>;
240                 dmas = <&main_pktdma 0xf501 0>    240                 dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
241                        <&main_pktdma 0x7507 0>    241                        <&main_pktdma 0x7507 0>;
242                 dma-names = "tx", "rx1", "rx2"    242                 dma-names = "tx", "rx1", "rx2";
243         };                                        243         };
244                                                   244 
245         secure_proxy_sa3: mailbox@43600000 {      245         secure_proxy_sa3: mailbox@43600000 {
246                 compatible = "ti,am654-secure-    246                 compatible = "ti,am654-secure-proxy";
247                 #mbox-cells = <1>;                247                 #mbox-cells = <1>;
248                 reg-names = "target_data", "rt    248                 reg-names = "target_data", "rt", "scfg";
249                 reg = <0x00 0x43600000 0x00 0x    249                 reg = <0x00 0x43600000 0x00 0x10000>,
250                       <0x00 0x44880000 0x00 0x    250                       <0x00 0x44880000 0x00 0x20000>,
251                       <0x00 0x44860000 0x00 0x    251                       <0x00 0x44860000 0x00 0x20000>;
252                 /*                                252                 /*
253                  * Marked Disabled:               253                  * Marked Disabled:
254                  * Node is incomplete as it is    254                  * Node is incomplete as it is meant for bootloaders and
255                  * firmware on non-MPU process    255                  * firmware on non-MPU processors
256                  */                               256                  */
257                 status = "disabled";              257                 status = "disabled";
258         };                                        258         };
259                                                   259 
260         main_pmx0: pinctrl@f4000 {                260         main_pmx0: pinctrl@f4000 {
261                 compatible = "pinctrl-single";    261                 compatible = "pinctrl-single";
262                 reg = <0x00 0xf4000 0x00 0x2ac    262                 reg = <0x00 0xf4000 0x00 0x2ac>;
263                 #pinctrl-cells = <1>;             263                 #pinctrl-cells = <1>;
264                 pinctrl-single,register-width     264                 pinctrl-single,register-width = <32>;
265                 pinctrl-single,function-mask =    265                 pinctrl-single,function-mask = <0xffffffff>;
266         };                                        266         };
267                                                   267 
268         main_esm: esm@420000 {                    268         main_esm: esm@420000 {
269                 compatible = "ti,j721e-esm";      269                 compatible = "ti,j721e-esm";
270                 reg = <0x0 0x420000 0x0 0x1000    270                 reg = <0x0 0x420000 0x0 0x1000>;
271                 bootph-pre-ram;                   271                 bootph-pre-ram;
272                 /* Interrupt sources: rti0, rt    272                 /* Interrupt sources: rti0, rti1, wrti0, rti4, rti2, rti3 */
273                 ti,esm-pins = <192>, <193>, <1    273                 ti,esm-pins = <192>, <193>, <195>, <204>, <209>, <210>;
274         };                                        274         };
275                                                   275 
276         main_timer0: timer@2400000 {              276         main_timer0: timer@2400000 {
277                 compatible = "ti,am654-timer";    277                 compatible = "ti,am654-timer";
278                 reg = <0x00 0x2400000 0x00 0x4    278                 reg = <0x00 0x2400000 0x00 0x400>;
279                 interrupts = <GIC_SPI 120 IRQ_    279                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
280                 clocks = <&k3_clks 36 2>;         280                 clocks = <&k3_clks 36 2>;
281                 clock-names = "fck";              281                 clock-names = "fck";
282                 assigned-clocks = <&k3_clks 36    282                 assigned-clocks = <&k3_clks 36 2>;
283                 assigned-clock-parents = <&k3_    283                 assigned-clock-parents = <&k3_clks 36 3>;
284                 power-domains = <&k3_pds 36 TI    284                 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
285                 ti,timer-pwm;                     285                 ti,timer-pwm;
286         };                                        286         };
287                                                   287 
288         main_timer1: timer@2410000 {              288         main_timer1: timer@2410000 {
289                 compatible = "ti,am654-timer";    289                 compatible = "ti,am654-timer";
290                 reg = <0x00 0x2410000 0x00 0x4    290                 reg = <0x00 0x2410000 0x00 0x400>;
291                 interrupts = <GIC_SPI 121 IRQ_    291                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
292                 clocks = <&k3_clks 37 2>;         292                 clocks = <&k3_clks 37 2>;
293                 clock-names = "fck";              293                 clock-names = "fck";
294                 assigned-clocks = <&k3_clks 37    294                 assigned-clocks = <&k3_clks 37 2>;
295                 assigned-clock-parents = <&k3_    295                 assigned-clock-parents = <&k3_clks 37 3>;
296                 power-domains = <&k3_pds 37 TI    296                 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
297                 ti,timer-pwm;                     297                 ti,timer-pwm;
298         };                                        298         };
299                                                   299 
300         main_timer2: timer@2420000 {              300         main_timer2: timer@2420000 {
301                 compatible = "ti,am654-timer";    301                 compatible = "ti,am654-timer";
302                 reg = <0x00 0x2420000 0x00 0x4    302                 reg = <0x00 0x2420000 0x00 0x400>;
303                 interrupts = <GIC_SPI 122 IRQ_    303                 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
304                 clocks = <&k3_clks 38 2>;         304                 clocks = <&k3_clks 38 2>;
305                 clock-names = "fck";              305                 clock-names = "fck";
306                 assigned-clocks = <&k3_clks 38    306                 assigned-clocks = <&k3_clks 38 2>;
307                 assigned-clock-parents = <&k3_    307                 assigned-clock-parents = <&k3_clks 38 3>;
308                 power-domains = <&k3_pds 38 TI    308                 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
309                 ti,timer-pwm;                     309                 ti,timer-pwm;
310         };                                        310         };
311                                                   311 
312         main_timer3: timer@2430000 {              312         main_timer3: timer@2430000 {
313                 compatible = "ti,am654-timer";    313                 compatible = "ti,am654-timer";
314                 reg = <0x00 0x2430000 0x00 0x4    314                 reg = <0x00 0x2430000 0x00 0x400>;
315                 interrupts = <GIC_SPI 123 IRQ_    315                 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
316                 clocks = <&k3_clks 39 2>;         316                 clocks = <&k3_clks 39 2>;
317                 clock-names = "fck";              317                 clock-names = "fck";
318                 assigned-clocks = <&k3_clks 39    318                 assigned-clocks = <&k3_clks 39 2>;
319                 assigned-clock-parents = <&k3_    319                 assigned-clock-parents = <&k3_clks 39 3>;
320                 power-domains = <&k3_pds 39 TI    320                 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
321                 ti,timer-pwm;                     321                 ti,timer-pwm;
322         };                                        322         };
323                                                   323 
324         main_timer4: timer@2440000 {              324         main_timer4: timer@2440000 {
325                 compatible = "ti,am654-timer";    325                 compatible = "ti,am654-timer";
326                 reg = <0x00 0x2440000 0x00 0x4    326                 reg = <0x00 0x2440000 0x00 0x400>;
327                 interrupts = <GIC_SPI 124 IRQ_    327                 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
328                 clocks = <&k3_clks 40 2>;         328                 clocks = <&k3_clks 40 2>;
329                 clock-names = "fck";              329                 clock-names = "fck";
330                 assigned-clocks = <&k3_clks 40    330                 assigned-clocks = <&k3_clks 40 2>;
331                 assigned-clock-parents = <&k3_    331                 assigned-clock-parents = <&k3_clks 40 3>;
332                 power-domains = <&k3_pds 40 TI    332                 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
333                 ti,timer-pwm;                     333                 ti,timer-pwm;
334         };                                        334         };
335                                                   335 
336         main_timer5: timer@2450000 {              336         main_timer5: timer@2450000 {
337                 compatible = "ti,am654-timer";    337                 compatible = "ti,am654-timer";
338                 reg = <0x00 0x2450000 0x00 0x4    338                 reg = <0x00 0x2450000 0x00 0x400>;
339                 interrupts = <GIC_SPI 125 IRQ_    339                 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
340                 clocks = <&k3_clks 41 2>;         340                 clocks = <&k3_clks 41 2>;
341                 clock-names = "fck";              341                 clock-names = "fck";
342                 assigned-clocks = <&k3_clks 41    342                 assigned-clocks = <&k3_clks 41 2>;
343                 assigned-clock-parents = <&k3_    343                 assigned-clock-parents = <&k3_clks 41 3>;
344                 power-domains = <&k3_pds 41 TI    344                 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
345                 ti,timer-pwm;                     345                 ti,timer-pwm;
346         };                                        346         };
347                                                   347 
348         main_timer6: timer@2460000 {              348         main_timer6: timer@2460000 {
349                 compatible = "ti,am654-timer";    349                 compatible = "ti,am654-timer";
350                 reg = <0x00 0x2460000 0x00 0x4    350                 reg = <0x00 0x2460000 0x00 0x400>;
351                 interrupts = <GIC_SPI 126 IRQ_    351                 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
352                 clocks = <&k3_clks 42 2>;         352                 clocks = <&k3_clks 42 2>;
353                 clock-names = "fck";              353                 clock-names = "fck";
354                 assigned-clocks = <&k3_clks 42    354                 assigned-clocks = <&k3_clks 42 2>;
355                 assigned-clock-parents = <&k3_    355                 assigned-clock-parents = <&k3_clks 42 3>;
356                 power-domains = <&k3_pds 42 TI    356                 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
357                 ti,timer-pwm;                     357                 ti,timer-pwm;
358         };                                        358         };
359                                                   359 
360         main_timer7: timer@2470000 {              360         main_timer7: timer@2470000 {
361                 compatible = "ti,am654-timer";    361                 compatible = "ti,am654-timer";
362                 reg = <0x00 0x2470000 0x00 0x4    362                 reg = <0x00 0x2470000 0x00 0x400>;
363                 interrupts = <GIC_SPI 127 IRQ_    363                 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
364                 clocks = <&k3_clks 43 2>;         364                 clocks = <&k3_clks 43 2>;
365                 clock-names = "fck";              365                 clock-names = "fck";
366                 assigned-clocks = <&k3_clks 43    366                 assigned-clocks = <&k3_clks 43 2>;
367                 assigned-clock-parents = <&k3_    367                 assigned-clock-parents = <&k3_clks 43 3>;
368                 power-domains = <&k3_pds 43 TI    368                 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
369                 ti,timer-pwm;                     369                 ti,timer-pwm;
370         };                                        370         };
371                                                   371 
372         main_uart0: serial@2800000 {              372         main_uart0: serial@2800000 {
373                 compatible = "ti,am64-uart", "    373                 compatible = "ti,am64-uart", "ti,am654-uart";
374                 reg = <0x00 0x02800000 0x00 0x    374                 reg = <0x00 0x02800000 0x00 0x100>;
375                 interrupts = <GIC_SPI 178 IRQ_    375                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
376                 power-domains = <&k3_pds 146 T    376                 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
377                 clocks = <&k3_clks 146 0>;        377                 clocks = <&k3_clks 146 0>;
378                 clock-names = "fclk";             378                 clock-names = "fclk";
379                 status = "disabled";              379                 status = "disabled";
380         };                                        380         };
381                                                   381 
382         main_uart1: serial@2810000 {              382         main_uart1: serial@2810000 {
383                 compatible = "ti,am64-uart", "    383                 compatible = "ti,am64-uart", "ti,am654-uart";
384                 reg = <0x00 0x02810000 0x00 0x    384                 reg = <0x00 0x02810000 0x00 0x100>;
385                 interrupts = <GIC_SPI 179 IRQ_    385                 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
386                 power-domains = <&k3_pds 152 T    386                 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
387                 clocks = <&k3_clks 152 0>;        387                 clocks = <&k3_clks 152 0>;
388                 clock-names = "fclk";             388                 clock-names = "fclk";
389                 status = "disabled";              389                 status = "disabled";
390         };                                        390         };
391                                                   391 
392         main_uart2: serial@2820000 {              392         main_uart2: serial@2820000 {
393                 compatible = "ti,am64-uart", "    393                 compatible = "ti,am64-uart", "ti,am654-uart";
394                 reg = <0x00 0x02820000 0x00 0x    394                 reg = <0x00 0x02820000 0x00 0x100>;
395                 interrupts = <GIC_SPI 180 IRQ_    395                 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
396                 power-domains = <&k3_pds 153 T    396                 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
397                 clocks = <&k3_clks 153 0>;        397                 clocks = <&k3_clks 153 0>;
398                 clock-names = "fclk";             398                 clock-names = "fclk";
399                 status = "disabled";              399                 status = "disabled";
400         };                                        400         };
401                                                   401 
402         main_uart3: serial@2830000 {              402         main_uart3: serial@2830000 {
403                 compatible = "ti,am64-uart", "    403                 compatible = "ti,am64-uart", "ti,am654-uart";
404                 reg = <0x00 0x02830000 0x00 0x    404                 reg = <0x00 0x02830000 0x00 0x100>;
405                 interrupts = <GIC_SPI 181 IRQ_    405                 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
406                 power-domains = <&k3_pds 154 T    406                 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
407                 clocks = <&k3_clks 154 0>;        407                 clocks = <&k3_clks 154 0>;
408                 clock-names = "fclk";             408                 clock-names = "fclk";
409                 status = "disabled";              409                 status = "disabled";
410         };                                        410         };
411                                                   411 
412         main_uart4: serial@2840000 {              412         main_uart4: serial@2840000 {
413                 compatible = "ti,am64-uart", "    413                 compatible = "ti,am64-uart", "ti,am654-uart";
414                 reg = <0x00 0x02840000 0x00 0x    414                 reg = <0x00 0x02840000 0x00 0x100>;
415                 interrupts = <GIC_SPI 182 IRQ_    415                 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
416                 power-domains = <&k3_pds 155 T    416                 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
417                 clocks = <&k3_clks 155 0>;        417                 clocks = <&k3_clks 155 0>;
418                 clock-names = "fclk";             418                 clock-names = "fclk";
419                 status = "disabled";              419                 status = "disabled";
420         };                                        420         };
421                                                   421 
422         main_uart5: serial@2850000 {              422         main_uart5: serial@2850000 {
423                 compatible = "ti,am64-uart", "    423                 compatible = "ti,am64-uart", "ti,am654-uart";
424                 reg = <0x00 0x02850000 0x00 0x    424                 reg = <0x00 0x02850000 0x00 0x100>;
425                 interrupts = <GIC_SPI 183 IRQ_    425                 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
426                 power-domains = <&k3_pds 156 T    426                 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
427                 clocks = <&k3_clks 156 0>;        427                 clocks = <&k3_clks 156 0>;
428                 clock-names = "fclk";             428                 clock-names = "fclk";
429                 status = "disabled";              429                 status = "disabled";
430         };                                        430         };
431                                                   431 
432         main_uart6: serial@2860000 {              432         main_uart6: serial@2860000 {
433                 compatible = "ti,am64-uart", "    433                 compatible = "ti,am64-uart", "ti,am654-uart";
434                 reg = <0x00 0x02860000 0x00 0x    434                 reg = <0x00 0x02860000 0x00 0x100>;
435                 interrupts = <GIC_SPI 184 IRQ_    435                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
436                 power-domains = <&k3_pds 158 T    436                 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
437                 clocks = <&k3_clks 158 0>;        437                 clocks = <&k3_clks 158 0>;
438                 clock-names = "fclk";             438                 clock-names = "fclk";
439                 status = "disabled";              439                 status = "disabled";
440         };                                        440         };
441                                                   441 
442         main_i2c0: i2c@20000000 {                 442         main_i2c0: i2c@20000000 {
443                 compatible = "ti,am64-i2c", "t    443                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
444                 reg = <0x00 0x20000000 0x00 0x    444                 reg = <0x00 0x20000000 0x00 0x100>;
445                 interrupts = <GIC_SPI 161 IRQ_    445                 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
446                 #address-cells = <1>;             446                 #address-cells = <1>;
447                 #size-cells = <0>;                447                 #size-cells = <0>;
448                 power-domains = <&k3_pds 102 T    448                 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
449                 clocks = <&k3_clks 102 2>;        449                 clocks = <&k3_clks 102 2>;
450                 clock-names = "fck";              450                 clock-names = "fck";
451                 status = "disabled";              451                 status = "disabled";
452         };                                        452         };
453                                                   453 
454         main_i2c1: i2c@20010000 {                 454         main_i2c1: i2c@20010000 {
455                 compatible = "ti,am64-i2c", "t    455                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
456                 reg = <0x00 0x20010000 0x00 0x    456                 reg = <0x00 0x20010000 0x00 0x100>;
457                 interrupts = <GIC_SPI 162 IRQ_    457                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
458                 #address-cells = <1>;             458                 #address-cells = <1>;
459                 #size-cells = <0>;                459                 #size-cells = <0>;
460                 power-domains = <&k3_pds 103 T    460                 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
461                 clocks = <&k3_clks 103 2>;        461                 clocks = <&k3_clks 103 2>;
462                 clock-names = "fck";              462                 clock-names = "fck";
463                 status = "disabled";              463                 status = "disabled";
464         };                                        464         };
465                                                   465 
466         main_i2c2: i2c@20020000 {                 466         main_i2c2: i2c@20020000 {
467                 compatible = "ti,am64-i2c", "t    467                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
468                 reg = <0x00 0x20020000 0x00 0x    468                 reg = <0x00 0x20020000 0x00 0x100>;
469                 interrupts = <GIC_SPI 163 IRQ_    469                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
470                 #address-cells = <1>;             470                 #address-cells = <1>;
471                 #size-cells = <0>;                471                 #size-cells = <0>;
472                 power-domains = <&k3_pds 104 T    472                 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
473                 clocks = <&k3_clks 104 2>;        473                 clocks = <&k3_clks 104 2>;
474                 clock-names = "fck";              474                 clock-names = "fck";
475                 status = "disabled";              475                 status = "disabled";
476         };                                        476         };
477                                                   477 
478         main_i2c3: i2c@20030000 {                 478         main_i2c3: i2c@20030000 {
479                 compatible = "ti,am64-i2c", "t    479                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
480                 reg = <0x00 0x20030000 0x00 0x    480                 reg = <0x00 0x20030000 0x00 0x100>;
481                 interrupts = <GIC_SPI 164 IRQ_    481                 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
482                 #address-cells = <1>;             482                 #address-cells = <1>;
483                 #size-cells = <0>;                483                 #size-cells = <0>;
484                 power-domains = <&k3_pds 105 T    484                 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
485                 clocks = <&k3_clks 105 2>;        485                 clocks = <&k3_clks 105 2>;
486                 clock-names = "fck";              486                 clock-names = "fck";
487                 status = "disabled";              487                 status = "disabled";
488         };                                        488         };
489                                                   489 
490         main_spi0: spi@20100000 {                 490         main_spi0: spi@20100000 {
491                 compatible = "ti,am654-mcspi",    491                 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
492                 reg = <0x00 0x20100000 0x00 0x    492                 reg = <0x00 0x20100000 0x00 0x400>;
493                 interrupts = <GIC_SPI 172 IRQ_    493                 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
494                 #address-cells = <1>;             494                 #address-cells = <1>;
495                 #size-cells = <0>;                495                 #size-cells = <0>;
496                 power-domains = <&k3_pds 141 T    496                 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
497                 clocks = <&k3_clks 141 0>;        497                 clocks = <&k3_clks 141 0>;
498                 status = "disabled";              498                 status = "disabled";
499         };                                        499         };
500                                                   500 
501         main_spi1: spi@20110000 {                 501         main_spi1: spi@20110000 {
502                 compatible = "ti,am654-mcspi",    502                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
503                 reg = <0x00 0x20110000 0x00 0x    503                 reg = <0x00 0x20110000 0x00 0x400>;
504                 interrupts = <GIC_SPI 173 IRQ_    504                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
505                 #address-cells = <1>;             505                 #address-cells = <1>;
506                 #size-cells = <0>;                506                 #size-cells = <0>;
507                 power-domains = <&k3_pds 142 T    507                 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
508                 clocks = <&k3_clks 142 0>;        508                 clocks = <&k3_clks 142 0>;
509                 status = "disabled";              509                 status = "disabled";
510         };                                        510         };
511                                                   511 
512         main_spi2: spi@20120000 {                 512         main_spi2: spi@20120000 {
513                 compatible = "ti,am654-mcspi",    513                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
514                 reg = <0x00 0x20120000 0x00 0x    514                 reg = <0x00 0x20120000 0x00 0x400>;
515                 interrupts = <GIC_SPI 174 IRQ_    515                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
516                 #address-cells = <1>;             516                 #address-cells = <1>;
517                 #size-cells = <0>;                517                 #size-cells = <0>;
518                 power-domains = <&k3_pds 143 T    518                 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
519                 clocks = <&k3_clks 143 0>;        519                 clocks = <&k3_clks 143 0>;
520                 status = "disabled";              520                 status = "disabled";
521         };                                        521         };
522                                                   522 
523         main_gpio_intr: interrupt-controller@a    523         main_gpio_intr: interrupt-controller@a00000 {
524                 compatible = "ti,sci-intr";       524                 compatible = "ti,sci-intr";
525                 reg = <0x00 0x00a00000 0x00 0x    525                 reg = <0x00 0x00a00000 0x00 0x800>;
526                 ti,intr-trigger-type = <1>;       526                 ti,intr-trigger-type = <1>;
527                 interrupt-controller;             527                 interrupt-controller;
528                 interrupt-parent = <&gic500>;     528                 interrupt-parent = <&gic500>;
529                 #interrupt-cells = <1>;           529                 #interrupt-cells = <1>;
530                 ti,sci = <&dmsc>;                 530                 ti,sci = <&dmsc>;
531                 ti,sci-dev-id = <3>;              531                 ti,sci-dev-id = <3>;
532                 ti,interrupt-ranges = <0 32 16    532                 ti,interrupt-ranges = <0 32 16>;
533                 status = "disabled";              533                 status = "disabled";
534         };                                        534         };
535                                                   535 
536         main_gpio0: gpio@600000 {                 536         main_gpio0: gpio@600000 {
537                 compatible = "ti,am64-gpio", "    537                 compatible = "ti,am64-gpio", "ti,keystone-gpio";
538                 reg = <0x00 0x00600000 0x0 0x1    538                 reg = <0x00 0x00600000 0x0 0x100>;
539                 gpio-controller;                  539                 gpio-controller;
540                 #gpio-cells = <2>;                540                 #gpio-cells = <2>;
541                 interrupt-parent = <&main_gpio    541                 interrupt-parent = <&main_gpio_intr>;
542                 interrupts = <190>, <191>, <19    542                 interrupts = <190>, <191>, <192>,
543                              <193>, <194>, <19    543                              <193>, <194>, <195>;
544                 interrupt-controller;             544                 interrupt-controller;
545                 #interrupt-cells = <2>;           545                 #interrupt-cells = <2>;
546                 ti,ngpio = <92>;                  546                 ti,ngpio = <92>;
547                 ti,davinci-gpio-unbanked = <0>    547                 ti,davinci-gpio-unbanked = <0>;
548                 power-domains = <&k3_pds 77 TI    548                 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
549                 clocks = <&k3_clks 77 0>;         549                 clocks = <&k3_clks 77 0>;
550                 clock-names = "gpio";             550                 clock-names = "gpio";
551                 status = "disabled";              551                 status = "disabled";
552         };                                        552         };
553                                                   553 
554         main_gpio1: gpio@601000 {                 554         main_gpio1: gpio@601000 {
555                 compatible = "ti,am64-gpio", "    555                 compatible = "ti,am64-gpio", "ti,keystone-gpio";
556                 reg = <0x00 0x00601000 0x0 0x1    556                 reg = <0x00 0x00601000 0x0 0x100>;
557                 gpio-controller;                  557                 gpio-controller;
558                 #gpio-cells = <2>;                558                 #gpio-cells = <2>;
559                 interrupt-parent = <&main_gpio    559                 interrupt-parent = <&main_gpio_intr>;
560                 interrupts = <180>, <181>, <18    560                 interrupts = <180>, <181>, <182>,
561                              <183>, <184>, <18    561                              <183>, <184>, <185>;
562                 interrupt-controller;             562                 interrupt-controller;
563                 #interrupt-cells = <2>;           563                 #interrupt-cells = <2>;
564                 ti,ngpio = <52>;                  564                 ti,ngpio = <52>;
565                 ti,davinci-gpio-unbanked = <0>    565                 ti,davinci-gpio-unbanked = <0>;
566                 power-domains = <&k3_pds 78 TI    566                 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
567                 clocks = <&k3_clks 78 0>;         567                 clocks = <&k3_clks 78 0>;
568                 clock-names = "gpio";             568                 clock-names = "gpio";
569                 status = "disabled";              569                 status = "disabled";
570         };                                        570         };
571                                                   571 
572         sdhci0: mmc@fa10000 {                     572         sdhci0: mmc@fa10000 {
573                 compatible = "ti,am62-sdhci";     573                 compatible = "ti,am62-sdhci";
574                 reg = <0x00 0xfa10000 0x00 0x2    574                 reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>;
575                 interrupts = <GIC_SPI 133 IRQ_    575                 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
576                 power-domains = <&k3_pds 57 TI    576                 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
577                 clocks = <&k3_clks 57 5>, <&k3    577                 clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
578                 clock-names = "clk_ahb", "clk_    578                 clock-names = "clk_ahb", "clk_xin";
579                 assigned-clocks = <&k3_clks 57    579                 assigned-clocks = <&k3_clks 57 6>;
580                 assigned-clock-parents = <&k3_    580                 assigned-clock-parents = <&k3_clks 57 8>;
581                 bus-width = <8>;                  581                 bus-width = <8>;
582                 mmc-hs200-1_8v;                   582                 mmc-hs200-1_8v;
583                 ti,clkbuf-sel = <0x7>;            583                 ti,clkbuf-sel = <0x7>;
584                 ti,otap-del-sel-legacy = <0x0>    584                 ti,otap-del-sel-legacy = <0x0>;
585                 ti,otap-del-sel-mmc-hs = <0x0>    585                 ti,otap-del-sel-mmc-hs = <0x0>;
586                 ti,otap-del-sel-hs200 = <0x6>;    586                 ti,otap-del-sel-hs200 = <0x6>;
587                 status = "disabled";              587                 status = "disabled";
588         };                                        588         };
589                                                   589 
590         sdhci1: mmc@fa00000 {                     590         sdhci1: mmc@fa00000 {
591                 compatible = "ti,am62-sdhci";     591                 compatible = "ti,am62-sdhci";
592                 reg = <0x00 0xfa00000 0x00 0x2    592                 reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>;
593                 interrupts = <GIC_SPI 83 IRQ_T    593                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
594                 power-domains = <&k3_pds 58 TI    594                 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
595                 clocks = <&k3_clks 58 5>, <&k3    595                 clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
596                 clock-names = "clk_ahb", "clk_    596                 clock-names = "clk_ahb", "clk_xin";
597                 bus-width = <4>;                  597                 bus-width = <4>;
598                 ti,clkbuf-sel = <0x7>;            598                 ti,clkbuf-sel = <0x7>;
599                 ti,otap-del-sel-legacy = <0x0>    599                 ti,otap-del-sel-legacy = <0x0>;
600                 ti,otap-del-sel-sd-hs = <0x0>;    600                 ti,otap-del-sel-sd-hs = <0x0>;
601                 ti,otap-del-sel-sdr12 = <0xf>;    601                 ti,otap-del-sel-sdr12 = <0xf>;
602                 ti,otap-del-sel-sdr25 = <0xf>;    602                 ti,otap-del-sel-sdr25 = <0xf>;
603                 ti,otap-del-sel-sdr50 = <0xc>;    603                 ti,otap-del-sel-sdr50 = <0xc>;
604                 ti,otap-del-sel-sdr104 = <0x6>    604                 ti,otap-del-sel-sdr104 = <0x6>;
605                 ti,otap-del-sel-ddr50 = <0x9>;    605                 ti,otap-del-sel-ddr50 = <0x9>;
606                 ti,itap-del-sel-legacy = <0x0>    606                 ti,itap-del-sel-legacy = <0x0>;
607                 ti,itap-del-sel-sd-hs = <0x0>;    607                 ti,itap-del-sel-sd-hs = <0x0>;
608                 ti,itap-del-sel-sdr12 = <0x0>;    608                 ti,itap-del-sel-sdr12 = <0x0>;
609                 ti,itap-del-sel-sdr25 = <0x0>;    609                 ti,itap-del-sel-sdr25 = <0x0>;
610                 status = "disabled";              610                 status = "disabled";
611         };                                        611         };
612                                                   612 
613         sdhci2: mmc@fa20000 {                     613         sdhci2: mmc@fa20000 {
614                 compatible = "ti,am62-sdhci";     614                 compatible = "ti,am62-sdhci";
615                 reg = <0x00 0xfa20000 0x00 0x2    615                 reg = <0x00 0xfa20000 0x00 0x260>, <0x00 0xfa28000 0x00 0x134>;
616                 interrupts = <GIC_SPI 82 IRQ_T    616                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
617                 power-domains = <&k3_pds 184 T    617                 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
618                 clocks = <&k3_clks 184 5>, <&k    618                 clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
619                 clock-names = "clk_ahb", "clk_    619                 clock-names = "clk_ahb", "clk_xin";
620                 bus-width = <4>;                  620                 bus-width = <4>;
621                 ti,clkbuf-sel = <0x7>;            621                 ti,clkbuf-sel = <0x7>;
622                 ti,otap-del-sel-legacy = <0x0>    622                 ti,otap-del-sel-legacy = <0x0>;
623                 ti,otap-del-sel-sd-hs = <0x0>;    623                 ti,otap-del-sel-sd-hs = <0x0>;
624                 ti,otap-del-sel-sdr12 = <0xf>;    624                 ti,otap-del-sel-sdr12 = <0xf>;
625                 ti,otap-del-sel-sdr25 = <0xf>;    625                 ti,otap-del-sel-sdr25 = <0xf>;
626                 ti,otap-del-sel-sdr50 = <0xc>;    626                 ti,otap-del-sel-sdr50 = <0xc>;
627                 ti,otap-del-sel-sdr104 = <0x6>    627                 ti,otap-del-sel-sdr104 = <0x6>;
628                 ti,otap-del-sel-ddr50 = <0x9>;    628                 ti,otap-del-sel-ddr50 = <0x9>;
629                 ti,itap-del-sel-legacy = <0x0>    629                 ti,itap-del-sel-legacy = <0x0>;
630                 ti,itap-del-sel-sd-hs = <0x0>;    630                 ti,itap-del-sel-sd-hs = <0x0>;
631                 ti,itap-del-sel-sdr12 = <0x0>;    631                 ti,itap-del-sel-sdr12 = <0x0>;
632                 ti,itap-del-sel-sdr25 = <0x0>;    632                 ti,itap-del-sel-sdr25 = <0x0>;
633                 status = "disabled";              633                 status = "disabled";
634         };                                        634         };
635                                                   635 
636         usbss0: dwc3-usb@f900000 {                636         usbss0: dwc3-usb@f900000 {
637                 compatible = "ti,am62-usb";       637                 compatible = "ti,am62-usb";
638                 reg = <0x00 0x0f900000 0x00 0x    638                 reg = <0x00 0x0f900000 0x00 0x800>,
639                       <0x00 0x0f908000 0x00 0x    639                       <0x00 0x0f908000 0x00 0x400>;
640                 clocks = <&k3_clks 161 3>;        640                 clocks = <&k3_clks 161 3>;
641                 clock-names = "ref";              641                 clock-names = "ref";
642                 ti,syscon-phy-pll-refclk = <&u    642                 ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
643                 #address-cells = <2>;             643                 #address-cells = <2>;
644                 #size-cells = <2>;                644                 #size-cells = <2>;
645                 power-domains = <&k3_pds 178 T    645                 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
646                 ranges;                           646                 ranges;
647                 status = "disabled";              647                 status = "disabled";
648                                                   648 
649                 usb0: usb@31000000 {              649                 usb0: usb@31000000 {
650                         compatible = "snps,dwc    650                         compatible = "snps,dwc3";
651                         reg = <0x00 0x31000000    651                         reg = <0x00 0x31000000 0x00 0x50000>;
652                         interrupts = <GIC_SPI     652                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
653                                      <GIC_SPI     653                                      <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
654                         interrupt-names = "hos    654                         interrupt-names = "host", "peripheral";
655                         maximum-speed = "high-    655                         maximum-speed = "high-speed";
656                         dr_mode = "otg";          656                         dr_mode = "otg";
657                         snps,usb2-gadget-lpm-d    657                         snps,usb2-gadget-lpm-disable;
658                         snps,usb2-lpm-disable;    658                         snps,usb2-lpm-disable;
659                 };                                659                 };
660         };                                        660         };
661                                                   661 
662         usbss1: dwc3-usb@f910000 {                662         usbss1: dwc3-usb@f910000 {
663                 compatible = "ti,am62-usb";       663                 compatible = "ti,am62-usb";
664                 reg = <0x00 0x0f910000 0x00 0x    664                 reg = <0x00 0x0f910000 0x00 0x800>,
665                       <0x00 0x0f918000 0x00 0x    665                       <0x00 0x0f918000 0x00 0x400>;
666                 clocks = <&k3_clks 162 3>;        666                 clocks = <&k3_clks 162 3>;
667                 clock-names = "ref";              667                 clock-names = "ref";
668                 ti,syscon-phy-pll-refclk = <&u    668                 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
669                 #address-cells = <2>;             669                 #address-cells = <2>;
670                 #size-cells = <2>;                670                 #size-cells = <2>;
671                 power-domains = <&k3_pds 179 T    671                 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
672                 ranges;                           672                 ranges;
673                 status = "disabled";              673                 status = "disabled";
674                                                   674 
675                 usb1: usb@31100000 {              675                 usb1: usb@31100000 {
676                         compatible = "snps,dwc    676                         compatible = "snps,dwc3";
677                         reg = <0x00 0x31100000    677                         reg = <0x00 0x31100000 0x00 0x50000>;
678                         interrupts = <GIC_SPI     678                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
679                                      <GIC_SPI     679                                      <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
680                         interrupt-names = "hos    680                         interrupt-names = "host", "peripheral";
681                         maximum-speed = "high-    681                         maximum-speed = "high-speed";
682                         dr_mode = "otg";          682                         dr_mode = "otg";
683                         snps,usb2-gadget-lpm-d    683                         snps,usb2-gadget-lpm-disable;
684                         snps,usb2-lpm-disable;    684                         snps,usb2-lpm-disable;
685                 };                                685                 };
686         };                                        686         };
687                                                   687 
688         fss: bus@fc00000 {                        688         fss: bus@fc00000 {
689                 compatible = "simple-bus";        689                 compatible = "simple-bus";
690                 reg = <0x00 0x0fc00000 0x00 0x    690                 reg = <0x00 0x0fc00000 0x00 0x70000>;
691                 #address-cells = <2>;             691                 #address-cells = <2>;
692                 #size-cells = <2>;                692                 #size-cells = <2>;
693                 ranges;                           693                 ranges;
694                 status = "disabled";              694                 status = "disabled";
695                                                   695 
696                 ospi0: spi@fc40000 {              696                 ospi0: spi@fc40000 {
697                         compatible = "ti,am654    697                         compatible = "ti,am654-ospi", "cdns,qspi-nor";
698                         reg = <0x00 0x0fc40000    698                         reg = <0x00 0x0fc40000 0x00 0x100>,
699                               <0x05 0x00000000    699                               <0x05 0x00000000 0x01 0x00000000>;
700                         interrupts = <GIC_SPI     700                         interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
701                         cdns,fifo-depth = <256    701                         cdns,fifo-depth = <256>;
702                         cdns,fifo-width = <4>;    702                         cdns,fifo-width = <4>;
703                         cdns,trigger-address =    703                         cdns,trigger-address = <0x0>;
704                         clocks = <&k3_clks 75     704                         clocks = <&k3_clks 75 7>;
705                         assigned-clocks = <&k3    705                         assigned-clocks = <&k3_clks 75 7>;
706                         assigned-clock-parents    706                         assigned-clock-parents = <&k3_clks 75 8>;
707                         assigned-clock-rates =    707                         assigned-clock-rates = <166666666>;
708                         power-domains = <&k3_p    708                         power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
709                         #address-cells = <1>;     709                         #address-cells = <1>;
710                         #size-cells = <0>;        710                         #size-cells = <0>;
711                 };                                711                 };
712         };                                        712         };
713                                                   713 
714         cpsw3g: ethernet@8000000 {                714         cpsw3g: ethernet@8000000 {
715                 compatible = "ti,am642-cpsw-nu    715                 compatible = "ti,am642-cpsw-nuss";
716                 #address-cells = <2>;             716                 #address-cells = <2>;
717                 #size-cells = <2>;                717                 #size-cells = <2>;
718                 reg = <0x0 0x8000000 0x0 0x200    718                 reg = <0x0 0x8000000 0x0 0x200000>;
719                 reg-names = "cpsw_nuss";          719                 reg-names = "cpsw_nuss";
720                 ranges = <0x0 0x0 0x0 0x800000    720                 ranges = <0x0 0x0 0x0 0x8000000 0x0 0x200000>;
721                 clocks = <&k3_clks 13 0>;         721                 clocks = <&k3_clks 13 0>;
722                 assigned-clocks = <&k3_clks 13    722                 assigned-clocks = <&k3_clks 13 3>;
723                 assigned-clock-parents = <&k3_    723                 assigned-clock-parents = <&k3_clks 13 11>;
724                 clock-names = "fck";              724                 clock-names = "fck";
725                 power-domains = <&k3_pds 13 TI    725                 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
726                 status = "disabled";              726                 status = "disabled";
727                                                   727 
728                 dmas = <&main_pktdma 0xc600 15    728                 dmas = <&main_pktdma 0xc600 15>,
729                        <&main_pktdma 0xc601 15    729                        <&main_pktdma 0xc601 15>,
730                        <&main_pktdma 0xc602 15    730                        <&main_pktdma 0xc602 15>,
731                        <&main_pktdma 0xc603 15    731                        <&main_pktdma 0xc603 15>,
732                        <&main_pktdma 0xc604 15    732                        <&main_pktdma 0xc604 15>,
733                        <&main_pktdma 0xc605 15    733                        <&main_pktdma 0xc605 15>,
734                        <&main_pktdma 0xc606 15    734                        <&main_pktdma 0xc606 15>,
735                        <&main_pktdma 0xc607 15    735                        <&main_pktdma 0xc607 15>,
736                        <&main_pktdma 0x4600 15    736                        <&main_pktdma 0x4600 15>;
737                 dma-names = "tx0", "tx1", "tx2    737                 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
738                             "tx7", "rx";          738                             "tx7", "rx";
739                                                   739 
740                 ethernet-ports {                  740                 ethernet-ports {
741                         #address-cells = <1>;     741                         #address-cells = <1>;
742                         #size-cells = <0>;        742                         #size-cells = <0>;
743                                                   743 
744                         cpsw_port1: port@1 {      744                         cpsw_port1: port@1 {
745                                 reg = <1>;        745                                 reg = <1>;
746                                 ti,mac-only;      746                                 ti,mac-only;
747                                 label = "port1    747                                 label = "port1";
748                                 phys = <&phy_g    748                                 phys = <&phy_gmii_sel 1>;
749                                 mac-address =     749                                 mac-address = [00 00 00 00 00 00];
750                                 ti,syscon-efus    750                                 ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
751                         };                        751                         };
752                                                   752 
753                         cpsw_port2: port@2 {      753                         cpsw_port2: port@2 {
754                                 reg = <2>;        754                                 reg = <2>;
755                                 ti,mac-only;      755                                 ti,mac-only;
756                                 label = "port2    756                                 label = "port2";
757                                 phys = <&phy_g    757                                 phys = <&phy_gmii_sel 2>;
758                                 mac-address =     758                                 mac-address = [00 00 00 00 00 00];
759                         };                        759                         };
760                 };                                760                 };
761                                                   761 
762                 cpsw3g_mdio: mdio@f00 {           762                 cpsw3g_mdio: mdio@f00 {
763                         compatible = "ti,cpsw-    763                         compatible = "ti,cpsw-mdio","ti,davinci_mdio";
764                         reg = <0x0 0xf00 0x0 0    764                         reg = <0x0 0xf00 0x0 0x100>;
765                         #address-cells = <1>;     765                         #address-cells = <1>;
766                         #size-cells = <0>;        766                         #size-cells = <0>;
767                         clocks = <&k3_clks 13     767                         clocks = <&k3_clks 13 0>;
768                         clock-names = "fck";      768                         clock-names = "fck";
769                         bus_freq = <1000000>;     769                         bus_freq = <1000000>;
770                 };                                770                 };
771                                                   771 
772                 cpts@3d000 {                      772                 cpts@3d000 {
773                         compatible = "ti,j721e    773                         compatible = "ti,j721e-cpts";
774                         reg = <0x0 0x3d000 0x0    774                         reg = <0x0 0x3d000 0x0 0x400>;
775                         clocks = <&k3_clks 13     775                         clocks = <&k3_clks 13 3>;
776                         clock-names = "cpts";     776                         clock-names = "cpts";
777                         interrupts-extended =     777                         interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
778                         interrupt-names = "cpt    778                         interrupt-names = "cpts";
779                         ti,cpts-ext-ts-inputs     779                         ti,cpts-ext-ts-inputs = <4>;
780                         ti,cpts-periodic-outpu    780                         ti,cpts-periodic-outputs = <2>;
781                 };                                781                 };
782         };                                        782         };
783                                                   783 
784         hwspinlock: spinlock@2a000000 {           784         hwspinlock: spinlock@2a000000 {
785                 compatible = "ti,am64-hwspinlo    785                 compatible = "ti,am64-hwspinlock";
786                 reg = <0x00 0x2a000000 0x00 0x    786                 reg = <0x00 0x2a000000 0x00 0x1000>;
787                 #hwlock-cells = <1>;              787                 #hwlock-cells = <1>;
788         };                                        788         };
789                                                   789 
790         mailbox0_cluster0: mailbox@29000000 {     790         mailbox0_cluster0: mailbox@29000000 {
791                 compatible = "ti,am64-mailbox"    791                 compatible = "ti,am64-mailbox";
792                 reg = <0x00 0x29000000 0x00 0x    792                 reg = <0x00 0x29000000 0x00 0x200>;
793                 interrupts = <GIC_SPI 76 IRQ_T    793                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
794                 #mbox-cells = <1>;                794                 #mbox-cells = <1>;
795                 ti,mbox-num-users = <4>;          795                 ti,mbox-num-users = <4>;
796                 ti,mbox-num-fifos = <16>;         796                 ti,mbox-num-fifos = <16>;
797         };                                        797         };
798                                                   798 
799         mailbox0_cluster1: mailbox@29010000 {     799         mailbox0_cluster1: mailbox@29010000 {
800                 compatible = "ti,am64-mailbox"    800                 compatible = "ti,am64-mailbox";
801                 reg = <0x00 0x29010000 0x00 0x    801                 reg = <0x00 0x29010000 0x00 0x200>;
802                 interrupts = <GIC_SPI 77 IRQ_T    802                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
803                 #mbox-cells = <1>;                803                 #mbox-cells = <1>;
804                 ti,mbox-num-users = <4>;          804                 ti,mbox-num-users = <4>;
805                 ti,mbox-num-fifos = <16>;         805                 ti,mbox-num-fifos = <16>;
806         };                                        806         };
807                                                   807 
808         mailbox0_cluster2: mailbox@29020000 {     808         mailbox0_cluster2: mailbox@29020000 {
809                 compatible = "ti,am64-mailbox"    809                 compatible = "ti,am64-mailbox";
810                 reg = <0x00 0x29020000 0x00 0x    810                 reg = <0x00 0x29020000 0x00 0x200>;
811                 interrupts = <GIC_SPI 108 IRQ_    811                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
812                 #mbox-cells = <1>;                812                 #mbox-cells = <1>;
813                 ti,mbox-num-users = <4>;          813                 ti,mbox-num-users = <4>;
814                 ti,mbox-num-fifos = <16>;         814                 ti,mbox-num-fifos = <16>;
815         };                                        815         };
816                                                   816 
817         mailbox0_cluster3: mailbox@29030000 {     817         mailbox0_cluster3: mailbox@29030000 {
818                 compatible = "ti,am64-mailbox"    818                 compatible = "ti,am64-mailbox";
819                 reg = <0x00 0x29030000 0x00 0x    819                 reg = <0x00 0x29030000 0x00 0x200>;
820                 interrupts = <GIC_SPI 109 IRQ_    820                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
821                 #mbox-cells = <1>;                821                 #mbox-cells = <1>;
822                 ti,mbox-num-users = <4>;          822                 ti,mbox-num-users = <4>;
823                 ti,mbox-num-fifos = <16>;         823                 ti,mbox-num-fifos = <16>;
824         };                                        824         };
825                                                   825 
826         main_mcan0: can@20701000 {                826         main_mcan0: can@20701000 {
827                 compatible = "bosch,m_can";       827                 compatible = "bosch,m_can";
828                 reg = <0x00 0x20701000 0x00 0x    828                 reg = <0x00 0x20701000 0x00 0x200>,
829                       <0x00 0x20708000 0x00 0x    829                       <0x00 0x20708000 0x00 0x8000>;
830                 reg-names = "m_can", "message_    830                 reg-names = "m_can", "message_ram";
831                 power-domains = <&k3_pds 98 TI    831                 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
832                 clocks = <&k3_clks 98 6>, <&k3    832                 clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
833                 clock-names = "hclk", "cclk";     833                 clock-names = "hclk", "cclk";
834                 interrupts = <GIC_SPI 155 IRQ_    834                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
835                              <GIC_SPI 156 IRQ_    835                              <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
836                 interrupt-names = "int0", "int    836                 interrupt-names = "int0", "int1";
837                 bosch,mram-cfg = <0x0 128 64 6    837                 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
838                 status = "disabled";              838                 status = "disabled";
839         };                                        839         };
840                                                   840 
841         main_rti0: watchdog@e000000 {             841         main_rti0: watchdog@e000000 {
842                 compatible = "ti,j7-rti-wdt";     842                 compatible = "ti,j7-rti-wdt";
843                 reg = <0x00 0x0e000000 0x00 0x    843                 reg = <0x00 0x0e000000 0x00 0x100>;
844                 clocks = <&k3_clks 125 0>;        844                 clocks = <&k3_clks 125 0>;
845                 power-domains = <&k3_pds 125 T    845                 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
846                 assigned-clocks = <&k3_clks 12    846                 assigned-clocks = <&k3_clks 125 0>;
847                 assigned-clock-parents = <&k3_    847                 assigned-clock-parents = <&k3_clks 125 2>;
848         };                                        848         };
849                                                   849 
850         main_rti1: watchdog@e010000 {             850         main_rti1: watchdog@e010000 {
851                 compatible = "ti,j7-rti-wdt";     851                 compatible = "ti,j7-rti-wdt";
852                 reg = <0x00 0x0e010000 0x00 0x    852                 reg = <0x00 0x0e010000 0x00 0x100>;
853                 clocks = <&k3_clks 126 0>;        853                 clocks = <&k3_clks 126 0>;
854                 power-domains = <&k3_pds 126 T    854                 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
855                 assigned-clocks = <&k3_clks 12    855                 assigned-clocks = <&k3_clks 126 0>;
856                 assigned-clock-parents = <&k3_    856                 assigned-clock-parents = <&k3_clks 126 2>;
857         };                                        857         };
858                                                   858 
859         main_rti2: watchdog@e020000 {             859         main_rti2: watchdog@e020000 {
860                 compatible = "ti,j7-rti-wdt";     860                 compatible = "ti,j7-rti-wdt";
861                 reg = <0x00 0x0e020000 0x00 0x    861                 reg = <0x00 0x0e020000 0x00 0x100>;
862                 clocks = <&k3_clks 127 0>;        862                 clocks = <&k3_clks 127 0>;
863                 power-domains = <&k3_pds 127 T    863                 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
864                 assigned-clocks = <&k3_clks 12    864                 assigned-clocks = <&k3_clks 127 0>;
865                 assigned-clock-parents = <&k3_    865                 assigned-clock-parents = <&k3_clks 127 2>;
866         };                                        866         };
867                                                   867 
868         main_rti3: watchdog@e030000 {             868         main_rti3: watchdog@e030000 {
869                 compatible = "ti,j7-rti-wdt";     869                 compatible = "ti,j7-rti-wdt";
870                 reg = <0x00 0x0e030000 0x00 0x    870                 reg = <0x00 0x0e030000 0x00 0x100>;
871                 clocks = <&k3_clks 128 0>;        871                 clocks = <&k3_clks 128 0>;
872                 power-domains = <&k3_pds 128 T    872                 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
873                 assigned-clocks = <&k3_clks 12    873                 assigned-clocks = <&k3_clks 128 0>;
874                 assigned-clock-parents = <&k3_    874                 assigned-clock-parents = <&k3_clks 128 2>;
875         };                                        875         };
876                                                   876 
877         main_rti4: watchdog@e040000 {             877         main_rti4: watchdog@e040000 {
878                 compatible = "ti,j7-rti-wdt";     878                 compatible = "ti,j7-rti-wdt";
879                 reg = <0x00 0x0e040000 0x00 0x    879                 reg = <0x00 0x0e040000 0x00 0x100>;
880                 clocks = <&k3_clks 205 0>;        880                 clocks = <&k3_clks 205 0>;
881                 power-domains = <&k3_pds 205 T    881                 power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
882                 assigned-clocks = <&k3_clks 20    882                 assigned-clocks = <&k3_clks 205 0>;
883                 assigned-clock-parents = <&k3_    883                 assigned-clock-parents = <&k3_clks 205 2>;
884         };                                        884         };
885                                                   885 
886         epwm0: pwm@23000000 {                     886         epwm0: pwm@23000000 {
887                 compatible = "ti,am64-epwm", "    887                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
888                 #pwm-cells = <3>;                 888                 #pwm-cells = <3>;
889                 reg = <0x00 0x23000000 0x00 0x    889                 reg = <0x00 0x23000000 0x00 0x100>;
890                 power-domains = <&k3_pds 86 TI    890                 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
891                 clocks = <&epwm_tbclk 0>, <&k3    891                 clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
892                 clock-names = "tbclk", "fck";     892                 clock-names = "tbclk", "fck";
893                 status = "disabled";              893                 status = "disabled";
894         };                                        894         };
895                                                   895 
896         epwm1: pwm@23010000 {                     896         epwm1: pwm@23010000 {
897                 compatible = "ti,am64-epwm", "    897                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
898                 #pwm-cells = <3>;                 898                 #pwm-cells = <3>;
899                 reg = <0x00 0x23010000 0x00 0x    899                 reg = <0x00 0x23010000 0x00 0x100>;
900                 power-domains = <&k3_pds 87 TI    900                 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
901                 clocks = <&epwm_tbclk 1>, <&k3    901                 clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
902                 clock-names = "tbclk", "fck";     902                 clock-names = "tbclk", "fck";
903                 status = "disabled";              903                 status = "disabled";
904         };                                        904         };
905                                                   905 
906         epwm2: pwm@23020000 {                     906         epwm2: pwm@23020000 {
907                 compatible = "ti,am64-epwm", "    907                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
908                 #pwm-cells = <3>;                 908                 #pwm-cells = <3>;
909                 reg = <0x00 0x23020000 0x00 0x    909                 reg = <0x00 0x23020000 0x00 0x100>;
910                 power-domains = <&k3_pds 88 TI    910                 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
911                 clocks = <&epwm_tbclk 2>, <&k3    911                 clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
912                 clock-names = "tbclk", "fck";     912                 clock-names = "tbclk", "fck";
913                 status = "disabled";              913                 status = "disabled";
914         };                                        914         };
915                                                   915 
916         ecap0: pwm@23100000 {                     916         ecap0: pwm@23100000 {
917                 compatible = "ti,am3352-ecap";    917                 compatible = "ti,am3352-ecap";
918                 #pwm-cells = <3>;                 918                 #pwm-cells = <3>;
919                 reg = <0x00 0x23100000 0x00 0x    919                 reg = <0x00 0x23100000 0x00 0x100>;
920                 power-domains = <&k3_pds 51 TI    920                 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
921                 clocks = <&k3_clks 51 0>;         921                 clocks = <&k3_clks 51 0>;
922                 clock-names = "fck";              922                 clock-names = "fck";
923                 status = "disabled";              923                 status = "disabled";
924         };                                        924         };
925                                                   925 
926         ecap1: pwm@23110000 {                     926         ecap1: pwm@23110000 {
927                 compatible = "ti,am3352-ecap";    927                 compatible = "ti,am3352-ecap";
928                 #pwm-cells = <3>;                 928                 #pwm-cells = <3>;
929                 reg = <0x00 0x23110000 0x00 0x    929                 reg = <0x00 0x23110000 0x00 0x100>;
930                 power-domains = <&k3_pds 52 TI    930                 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
931                 clocks = <&k3_clks 52 0>;         931                 clocks = <&k3_clks 52 0>;
932                 clock-names = "fck";              932                 clock-names = "fck";
933                 status = "disabled";              933                 status = "disabled";
934         };                                        934         };
935                                                   935 
936         ecap2: pwm@23120000 {                     936         ecap2: pwm@23120000 {
937                 compatible = "ti,am3352-ecap";    937                 compatible = "ti,am3352-ecap";
938                 #pwm-cells = <3>;                 938                 #pwm-cells = <3>;
939                 reg = <0x00 0x23120000 0x00 0x    939                 reg = <0x00 0x23120000 0x00 0x100>;
940                 power-domains = <&k3_pds 53 TI    940                 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
941                 clocks = <&k3_clks 53 0>;         941                 clocks = <&k3_clks 53 0>;
942                 clock-names = "fck";              942                 clock-names = "fck";
943                 status = "disabled";              943                 status = "disabled";
944         };                                        944         };
945                                                   945 
946         mcasp0: audio-controller@2b00000 {        946         mcasp0: audio-controller@2b00000 {
947                 compatible = "ti,am33xx-mcasp-    947                 compatible = "ti,am33xx-mcasp-audio";
948                 reg = <0x00 0x02b00000 0x00 0x    948                 reg = <0x00 0x02b00000 0x00 0x2000>,
949                       <0x00 0x02b08000 0x00 0x    949                       <0x00 0x02b08000 0x00 0x400>;
950                 reg-names = "mpu", "dat";         950                 reg-names = "mpu", "dat";
951                 interrupts = <GIC_SPI 236 IRQ_    951                 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
952                              <GIC_SPI 235 IRQ_    952                              <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
953                 interrupt-names = "tx", "rx";     953                 interrupt-names = "tx", "rx";
954                                                   954 
955                 dmas = <&main_bcdma 0 0xc500 0    955                 dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
956                 dma-names = "tx", "rx";           956                 dma-names = "tx", "rx";
957                                                   957 
958                 clocks = <&k3_clks 190 0>;        958                 clocks = <&k3_clks 190 0>;
959                 clock-names = "fck";              959                 clock-names = "fck";
960                 assigned-clocks = <&k3_clks 19    960                 assigned-clocks = <&k3_clks 190 0>;
961                 assigned-clock-parents = <&k3_    961                 assigned-clock-parents = <&k3_clks 190 2>;
962                 power-domains = <&k3_pds 190 T    962                 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
963                 status = "disabled";              963                 status = "disabled";
964         };                                        964         };
965                                                   965 
966         mcasp1: audio-controller@2b10000 {        966         mcasp1: audio-controller@2b10000 {
967                 compatible = "ti,am33xx-mcasp-    967                 compatible = "ti,am33xx-mcasp-audio";
968                 reg = <0x00 0x02b10000 0x00 0x    968                 reg = <0x00 0x02b10000 0x00 0x2000>,
969                       <0x00 0x02b18000 0x00 0x    969                       <0x00 0x02b18000 0x00 0x400>;
970                 reg-names = "mpu", "dat";         970                 reg-names = "mpu", "dat";
971                 interrupts = <GIC_SPI 238 IRQ_    971                 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
972                              <GIC_SPI 237 IRQ_    972                              <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
973                 interrupt-names = "tx", "rx";     973                 interrupt-names = "tx", "rx";
974                                                   974 
975                 dmas = <&main_bcdma 0 0xc501 0    975                 dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
976                 dma-names = "tx", "rx";           976                 dma-names = "tx", "rx";
977                                                   977 
978                 clocks = <&k3_clks 191 0>;        978                 clocks = <&k3_clks 191 0>;
979                 clock-names = "fck";              979                 clock-names = "fck";
980                 assigned-clocks = <&k3_clks 19    980                 assigned-clocks = <&k3_clks 191 0>;
981                 assigned-clock-parents = <&k3_    981                 assigned-clock-parents = <&k3_clks 191 2>;
982                 power-domains = <&k3_pds 191 T    982                 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
983                 status = "disabled";              983                 status = "disabled";
984         };                                        984         };
985                                                   985 
986         mcasp2: audio-controller@2b20000 {        986         mcasp2: audio-controller@2b20000 {
987                 compatible = "ti,am33xx-mcasp-    987                 compatible = "ti,am33xx-mcasp-audio";
988                 reg = <0x00 0x02b20000 0x00 0x    988                 reg = <0x00 0x02b20000 0x00 0x2000>,
989                       <0x00 0x02b28000 0x00 0x    989                       <0x00 0x02b28000 0x00 0x400>;
990                 reg-names = "mpu", "dat";         990                 reg-names = "mpu", "dat";
991                 interrupts = <GIC_SPI 240 IRQ_    991                 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
992                              <GIC_SPI 239 IRQ_    992                              <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
993                 interrupt-names = "tx", "rx";     993                 interrupt-names = "tx", "rx";
994                                                   994 
995                 dmas = <&main_bcdma 0 0xc502 0    995                 dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
996                 dma-names = "tx", "rx";           996                 dma-names = "tx", "rx";
997                                                   997 
998                 clocks = <&k3_clks 192 0>;        998                 clocks = <&k3_clks 192 0>;
999                 clock-names = "fck";              999                 clock-names = "fck";
1000                 assigned-clocks = <&k3_clks 1    1000                 assigned-clocks = <&k3_clks 192 0>;
1001                 assigned-clock-parents = <&k3    1001                 assigned-clock-parents = <&k3_clks 192 2>;
1002                 power-domains = <&k3_pds 192     1002                 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
1003                 status = "disabled";             1003                 status = "disabled";
1004         };                                       1004         };
1005                                                  1005 
1006         ti_csi2rx0: ticsi2rx@30102000 {          1006         ti_csi2rx0: ticsi2rx@30102000 {
1007                 compatible = "ti,j721e-csi2rx    1007                 compatible = "ti,j721e-csi2rx-shim";
1008                 dmas = <&main_bcdma_csi 0 0x5    1008                 dmas = <&main_bcdma_csi 0 0x5000 0>;
1009                 dma-names = "rx0";               1009                 dma-names = "rx0";
1010                 reg = <0x00 0x30102000 0x00 0    1010                 reg = <0x00 0x30102000 0x00 0x1000>;
1011                 power-domains = <&k3_pds 182     1011                 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
1012                 #address-cells = <2>;            1012                 #address-cells = <2>;
1013                 #size-cells = <2>;               1013                 #size-cells = <2>;
1014                 ranges;                          1014                 ranges;
1015                 status = "disabled";             1015                 status = "disabled";
1016                                                  1016 
1017                 cdns_csi2rx0: csi-bridge@3010    1017                 cdns_csi2rx0: csi-bridge@30101000 {
1018                         compatible = "ti,j721    1018                         compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
1019                         reg = <0x00 0x3010100    1019                         reg = <0x00 0x30101000 0x00 0x1000>;
1020                         clocks = <&k3_clks 18    1020                         clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
1021                                 <&k3_clks 182    1021                                 <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
1022                         clock-names = "sys_cl    1022                         clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
1023                                 "pixel_if1_cl    1023                                 "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
1024                         phys = <&dphy0>;         1024                         phys = <&dphy0>;
1025                         phy-names = "dphy";      1025                         phy-names = "dphy";
1026                                                  1026 
1027                         ports {                  1027                         ports {
1028                                 #address-cell    1028                                 #address-cells = <1>;
1029                                 #size-cells =    1029                                 #size-cells = <0>;
1030                                                  1030 
1031                                 csi0_port0: p    1031                                 csi0_port0: port@0 {
1032                                         reg =    1032                                         reg = <0>;
1033                                         statu    1033                                         status = "disabled";
1034                                 };               1034                                 };
1035                                                  1035 
1036                                 csi0_port1: p    1036                                 csi0_port1: port@1 {
1037                                         reg =    1037                                         reg = <1>;
1038                                         statu    1038                                         status = "disabled";
1039                                 };               1039                                 };
1040                                                  1040 
1041                                 csi0_port2: p    1041                                 csi0_port2: port@2 {
1042                                         reg =    1042                                         reg = <2>;
1043                                         statu    1043                                         status = "disabled";
1044                                 };               1044                                 };
1045                                                  1045 
1046                                 csi0_port3: p    1046                                 csi0_port3: port@3 {
1047                                         reg =    1047                                         reg = <3>;
1048                                         statu    1048                                         status = "disabled";
1049                                 };               1049                                 };
1050                                                  1050 
1051                                 csi0_port4: p    1051                                 csi0_port4: port@4 {
1052                                         reg =    1052                                         reg = <4>;
1053                                         statu    1053                                         status = "disabled";
1054                                 };               1054                                 };
1055                         };                       1055                         };
1056                 };                               1056                 };
1057         };                                       1057         };
1058                                                  1058 
1059         dphy0: phy@30110000 {                    1059         dphy0: phy@30110000 {
1060                 compatible = "cdns,dphy-rx";     1060                 compatible = "cdns,dphy-rx";
1061                 reg = <0x00 0x30110000 0x00 0    1061                 reg = <0x00 0x30110000 0x00 0x1100>;
1062                 #phy-cells = <0>;                1062                 #phy-cells = <0>;
1063                 power-domains = <&k3_pds 185     1063                 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
1064                 status = "disabled";             1064                 status = "disabled";
1065         };                                       1065         };
1066                                                  1066 
1067         dss: dss@30200000 {                      1067         dss: dss@30200000 {
1068                 compatible = "ti,am62a7-dss";    1068                 compatible = "ti,am62a7-dss";
1069                 reg = <0x00 0x30200000 0x00 0    1069                 reg = <0x00 0x30200000 0x00 0x1000>, /* common */
1070                       <0x00 0x30202000 0x00 0    1070                       <0x00 0x30202000 0x00 0x1000>, /* vidl1 */
1071                       <0x00 0x30206000 0x00 0    1071                       <0x00 0x30206000 0x00 0x1000>, /* vid */
1072                       <0x00 0x30207000 0x00 0    1072                       <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
1073                       <0x00 0x30208000 0x00 0    1073                       <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
1074                       <0x00 0x3020a000 0x00 0    1074                       <0x00 0x3020a000 0x00 0x1000>, /* vp1: Tied OFF in the SoC */
1075                       <0x00 0x3020b000 0x00 0    1075                       <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */
1076                       <0x00 0x30201000 0x00 0    1076                       <0x00 0x30201000 0x00 0x1000>; /* common1 */
1077                 reg-names = "common", "vidl1"    1077                 reg-names = "common", "vidl1", "vid",
1078                             "ovr1", "ovr2", "    1078                             "ovr1", "ovr2", "vp1", "vp2", "common1";
1079                 power-domains = <&k3_pds 186     1079                 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
1080                 clocks = <&k3_clks 186 6>,       1080                 clocks = <&k3_clks 186 6>,
1081                          <&k3_clks 186 0>,       1081                          <&k3_clks 186 0>,
1082                          <&k3_clks 186 2>;       1082                          <&k3_clks 186 2>;
1083                 clock-names = "fck", "vp1", "    1083                 clock-names = "fck", "vp1", "vp2";
1084                 interrupts = <GIC_SPI 84 IRQ_    1084                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1085                 status = "disabled";             1085                 status = "disabled";
1086                                                  1086 
1087                 dss_ports: ports {               1087                 dss_ports: ports {
1088                         #address-cells = <1>;    1088                         #address-cells = <1>;
1089                         #size-cells = <0>;       1089                         #size-cells = <0>;
1090                 };                               1090                 };
1091         };                                       1091         };
1092                                                  1092 
1093         vpu: video-codec@30210000 {              1093         vpu: video-codec@30210000 {
1094                 compatible = "ti,j721s2-wave5    1094                 compatible = "ti,j721s2-wave521c", "cnm,wave521c";
1095                 reg = <0x00 0x30210000 0x00 0    1095                 reg = <0x00 0x30210000 0x00 0x10000>;
1096                 clocks = <&k3_clks 204 2>;       1096                 clocks = <&k3_clks 204 2>;
1097                 power-domains = <&k3_pds 204     1097                 power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
1098         };                                       1098         };
1099                                                  1099 
1100         e5010: jpeg-encoder@fd20000 {            1100         e5010: jpeg-encoder@fd20000 {
1101                 compatible = "ti,am62a-jpeg-e    1101                 compatible = "ti,am62a-jpeg-enc", "img,e5010-jpeg-enc";
1102                 reg = <0x00 0xfd20000 0x00 0x    1102                 reg = <0x00 0xfd20000 0x00 0x100>,
1103                       <0x00 0xfd20200 0x00 0x    1103                       <0x00 0xfd20200 0x00 0x200>;
1104                 reg-names = "core", "mmu";       1104                 reg-names = "core", "mmu";
1105                 clocks = <&k3_clks 201 0>;       1105                 clocks = <&k3_clks 201 0>;
1106                 power-domains = <&k3_pds 201     1106                 power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
1107                 interrupts = <GIC_SPI 98 IRQ_    1107                 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1108         };                                       1108         };
1109 };                                               1109 };
                                                      

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