1 // SPDX-License-Identifier: GPL-2.0-only OR MI !! 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (C) 2016-2024 Texas Instruments I !! 3 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "k3-am654.dtsi" 8 #include "k3-am654.dtsi"
9 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/net/ti-dp83867.h> <<
11 10
12 / { 11 / {
13 compatible = "ti,am654-evm", "ti,am654 !! 12 compatible = "ti,am654-evm", "ti,am654";
14 model = "Texas Instruments AM654 Base 13 model = "Texas Instruments AM654 Base Board";
15 14
16 aliases { <<
17 serial0 = &wkup_uart0; <<
18 serial1 = &mcu_uart0; <<
19 serial2 = &main_uart0; <<
20 i2c0 = &wkup_i2c0; <<
21 i2c1 = &mcu_i2c0; <<
22 i2c2 = &main_i2c0; <<
23 i2c3 = &main_i2c1; <<
24 i2c4 = &main_i2c2; <<
25 ethernet0 = &cpsw_port1; <<
26 mmc0 = &sdhci0; <<
27 mmc1 = &sdhci1; <<
28 }; <<
29 <<
30 chosen { 15 chosen {
31 stdout-path = "serial2:115200n 16 stdout-path = "serial2:115200n8";
>> 17 bootargs = "earlycon=ns16550a,mmio32,0x02800000";
32 }; 18 };
33 19
34 memory@80000000 { 20 memory@80000000 {
35 device_type = "memory"; 21 device_type = "memory";
36 bootph-all; <<
37 /* 4G RAM */ 22 /* 4G RAM */
38 reg = <0x00000000 0x80000000 0 23 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
39 <0x00000008 0x80000000 0 24 <0x00000008 0x80000000 0x00000000 0x80000000>;
40 }; 25 };
41 26
42 reserved-memory { 27 reserved-memory {
43 #address-cells = <2>; 28 #address-cells = <2>;
44 #size-cells = <2>; 29 #size-cells = <2>;
45 ranges; 30 ranges;
46 !! 31 secure_ddr: secure_ddr@9e800000 {
47 secure_ddr: secure-ddr@9e80000 <<
48 reg = <0 0x9e800000 0 32 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
49 alignment = <0x1000>; 33 alignment = <0x1000>;
50 no-map; 34 no-map;
51 }; 35 };
52 <<
53 mcu_r5fss0_core0_dma_memory_re <<
54 compatible = "shared-d <<
55 reg = <0 0xa0000000 0 <<
56 no-map; <<
57 }; <<
58 <<
59 mcu_r5fss0_core0_memory_region <<
60 compatible = "shared-d <<
61 reg = <0 0xa0100000 0 <<
62 no-map; <<
63 }; <<
64 <<
65 mcu_r5fss0_core1_dma_memory_re <<
66 compatible = "shared-d <<
67 reg = <0 0xa1000000 0 <<
68 no-map; <<
69 }; <<
70 <<
71 mcu_r5fss0_core1_memory_region <<
72 compatible = "shared-d <<
73 reg = <0 0xa1100000 0 <<
74 no-map; <<
75 }; <<
76 <<
77 rtos_ipc_memory_region: ipc-me <<
78 reg = <0x00 0xa2000000 <<
79 alignment = <0x1000>; <<
80 no-map; <<
81 }; <<
82 }; 36 };
83 37
84 gpio-keys { 38 gpio-keys {
85 compatible = "gpio-keys"; 39 compatible = "gpio-keys";
86 autorepeat; 40 autorepeat;
87 pinctrl-names = "default"; 41 pinctrl-names = "default";
88 pinctrl-0 = <&push_button_pins 42 pinctrl-0 = <&push_button_pins_default>;
89 43
90 switch-5 { !! 44 sw5 {
91 label = "GPIO Key USER 45 label = "GPIO Key USER1";
92 linux,code = <BTN_0>; 46 linux,code = <BTN_0>;
93 gpios = <&wkup_gpio0 2 47 gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
94 }; 48 };
95 49
96 switch-6 { !! 50 sw6 {
97 label = "GPIO Key USER 51 label = "GPIO Key USER2";
98 linux,code = <BTN_1>; 52 linux,code = <BTN_1>;
99 gpios = <&wkup_gpio0 2 53 gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
100 }; 54 };
101 }; 55 };
102 <<
103 evm_12v0: regulator-0 { <<
104 /* main supply */ <<
105 compatible = "regulator-fixed" <<
106 regulator-name = "evm_12v0"; <<
107 regulator-min-microvolt = <120 <<
108 regulator-max-microvolt = <120 <<
109 regulator-always-on; <<
110 regulator-boot-on; <<
111 }; <<
112 <<
113 vcc3v3_io: regulator-1 { <<
114 /* Output of TPS54334 */ <<
115 compatible = "regulator-fixed" <<
116 regulator-name = "vcc3v3_io"; <<
117 regulator-min-microvolt = <330 <<
118 regulator-max-microvolt = <330 <<
119 regulator-always-on; <<
120 regulator-boot-on; <<
121 vin-supply = <&evm_12v0>; <<
122 }; <<
123 <<
124 vdd_mmc1_sd: regulator-2 { <<
125 compatible = "regulator-fixed" <<
126 regulator-name = "vdd_mmc1_sd" <<
127 regulator-min-microvolt = <330 <<
128 regulator-max-microvolt = <330 <<
129 regulator-boot-on; <<
130 enable-active-high; <<
131 vin-supply = <&vcc3v3_io>; <<
132 gpio = <&pca9554 4 GPIO_ACTIVE <<
133 }; <<
134 <<
135 vtt_supply: regulator-3 { <<
136 compatible = "regulator-fixed" <<
137 regulator-name = "vtt"; <<
138 pinctrl-names = "default"; <<
139 pinctrl-0 = <&ddr_vtt_pins_def <<
140 regulator-min-microvolt = <330 <<
141 regulator-max-microvolt = <330 <<
142 enable-active-high; <<
143 regulator-always-on; <<
144 regulator-boot-on; <<
145 vin-supply = <&vcc3v3_io>; <<
146 gpio = <&wkup_gpio0 28 GPIO_AC <<
147 }; <<
148 }; 56 };
149 57
150 &wkup_pmx0 { 58 &wkup_pmx0 {
151 wkup_uart0_pins_default: wkup-uart0-de !! 59 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
152 pinctrl-single,pins = < <<
153 AM65X_WKUP_IOPAD(0x00a <<
154 AM65X_WKUP_IOPAD(0x00a <<
155 AM65X_WKUP_IOPAD(0x00c <<
156 AM65X_WKUP_IOPAD(0x00c <<
157 >; <<
158 }; <<
159 <<
160 ddr_vtt_pins_default: ddr-vtt-default- <<
161 pinctrl-single,pins = < <<
162 AM65X_WKUP_IOPAD(0x004 <<
163 >; <<
164 }; <<
165 <<
166 wkup_i2c0_pins_default: wkup-i2c0-defa <<
167 pinctrl-single,pins = < 60 pinctrl-single,pins = <
168 AM65X_WKUP_IOPAD(0x00e 61 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
169 AM65X_WKUP_IOPAD(0x00e 62 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
170 >; 63 >;
171 }; 64 };
172 65
173 push_button_pins_default: push-button- !! 66 push_button_pins_default: push_button__pins_default {
174 pinctrl-single,pins = < 67 pinctrl-single,pins = <
175 AM65X_WKUP_IOPAD(0x003 68 AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
176 AM65X_WKUP_IOPAD(0x003 69 AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
177 >; 70 >;
178 }; 71 };
179 <<
180 mcu_fss0_ospi0_pins_default: mcu-fss0- <<
181 pinctrl-single,pins = < <<
182 AM65X_WKUP_IOPAD(0x000 <<
183 AM65X_WKUP_IOPAD(0x000 <<
184 AM65X_WKUP_IOPAD(0x000 <<
185 AM65X_WKUP_IOPAD(0x001 <<
186 AM65X_WKUP_IOPAD(0x001 <<
187 AM65X_WKUP_IOPAD(0x001 <<
188 AM65X_WKUP_IOPAD(0x001 <<
189 AM65X_WKUP_IOPAD(0x002 <<
190 AM65X_WKUP_IOPAD(0x002 <<
191 AM65X_WKUP_IOPAD(0x002 <<
192 AM65X_WKUP_IOPAD(0x002 <<
193 >; <<
194 }; <<
195 <<
196 wkup_pca554_default: wkup-pca554-defau <<
197 pinctrl-single,pins = < <<
198 AM65X_WKUP_IOPAD(0x003 <<
199 >; <<
200 }; <<
201 <<
202 mcu_uart0_pins_default: mcu-uart0-defa <<
203 pinctrl-single,pins = < <<
204 AM65X_WKUP_IOPAD(0x004 <<
205 AM65X_WKUP_IOPAD(0x004 <<
206 AM65X_WKUP_IOPAD(0x004 <<
207 AM65X_WKUP_IOPAD(0x005 <<
208 >; <<
209 }; <<
210 <<
211 mcu_cpsw_pins_default: mcu-cpsw-defaul <<
212 pinctrl-single,pins = < <<
213 AM65X_WKUP_IOPAD(0x005 <<
214 AM65X_WKUP_IOPAD(0x005 <<
215 AM65X_WKUP_IOPAD(0x006 <<
216 AM65X_WKUP_IOPAD(0x006 <<
217 AM65X_WKUP_IOPAD(0x006 <<
218 AM65X_WKUP_IOPAD(0x006 <<
219 AM65X_WKUP_IOPAD(0x007 <<
220 AM65X_WKUP_IOPAD(0x007 <<
221 AM65X_WKUP_IOPAD(0x008 <<
222 AM65X_WKUP_IOPAD(0x008 <<
223 AM65X_WKUP_IOPAD(0x007 <<
224 AM65X_WKUP_IOPAD(0x007 <<
225 >; <<
226 }; <<
227 <<
228 mcu_mdio_pins_default: mcu-mdio1-defau <<
229 pinctrl-single,pins = < <<
230 AM65X_WKUP_IOPAD(0x008 <<
231 AM65X_WKUP_IOPAD(0x008 <<
232 >; <<
233 }; <<
234 <<
235 mcu_i2c0_pins_default: mcu-i2c0-defaul <<
236 pinctrl-single,pins = < <<
237 AM65X_WKUP_IOPAD(0x00e <<
238 AM65X_WKUP_IOPAD(0x00e <<
239 >; <<
240 }; <<
241 }; 72 };
242 73
243 &main_pmx0 { 74 &main_pmx0 {
244 main_uart0_pins_default: main-uart0-de !! 75 main_uart0_pins_default: main-uart0-pins-default {
245 pinctrl-single,pins = < 76 pinctrl-single,pins = <
246 AM65X_IOPAD(0x01e4, PI 77 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
247 AM65X_IOPAD(0x01e8, PI 78 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
248 AM65X_IOPAD(0x01ec, PI 79 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
249 AM65X_IOPAD(0x01f0, PI 80 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
250 >; 81 >;
251 }; 82 };
252 83
253 main_i2c2_pins_default: main-i2c2-defa !! 84 main_i2c2_pins_default: main-i2c2-pins-default {
254 pinctrl-single,pins = < 85 pinctrl-single,pins = <
255 AM65X_IOPAD(0x0074, PI 86 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
256 AM65X_IOPAD(0x0070, PI 87 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
257 >; 88 >;
258 }; 89 };
259 90
260 main_spi0_pins_default: main-spi0-defa !! 91 main_spi0_pins_default: main-spi0-pins-default {
261 pinctrl-single,pins = < 92 pinctrl-single,pins = <
262 AM65X_IOPAD(0x01c4, PI 93 AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
263 AM65X_IOPAD(0x01c8, PI 94 AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
264 AM65X_IOPAD(0x01cc, PI 95 AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
265 AM65X_IOPAD(0x01bc, PI 96 AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
266 >; 97 >;
267 }; 98 };
268 99
269 main_mmc0_pins_default: main-mmc0-defa !! 100 main_mmc0_pins_default: main-mmc0-pins-default {
270 pinctrl-single,pins = < 101 pinctrl-single,pins = <
271 AM65X_IOPAD(0x01a8, PI 102 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
272 AM65X_IOPAD(0x01ac, PI 103 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
273 AM65X_IOPAD(0x01a4, PI 104 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
274 AM65X_IOPAD(0x01a0, PI 105 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
275 AM65X_IOPAD(0x019c, PI 106 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
276 AM65X_IOPAD(0x0198, PI 107 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
277 AM65X_IOPAD(0x0194, PI 108 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
278 AM65X_IOPAD(0x0190, PI 109 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
279 AM65X_IOPAD(0x018c, PI 110 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
280 AM65X_IOPAD(0x0188, PI 111 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
281 AM65X_IOPAD(0x01b4, PI 112 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
282 AM65X_IOPAD(0x01b0, PI 113 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
283 >; 114 >;
284 }; 115 };
285 116
286 main_mmc1_pins_default: main-mmc1-defa !! 117 usb1_pins_default: usb1_pins_default {
287 pinctrl-single,pins = < <<
288 AM65X_IOPAD(0x02d4, PI <<
289 AM65X_IOPAD(0x02d8, PI <<
290 AM65X_IOPAD(0x02d0, PI <<
291 AM65X_IOPAD(0x02cc, PI <<
292 AM65X_IOPAD(0x02c8, PI <<
293 AM65X_IOPAD(0x02c4, PI <<
294 AM65X_IOPAD(0x02dc, PI <<
295 AM65X_IOPAD(0x02e0, PI <<
296 >; <<
297 }; <<
298 <<
299 usb1_pins_default: usb1-default-pins { <<
300 pinctrl-single,pins = < 118 pinctrl-single,pins = <
301 AM65X_IOPAD(0x02c0, PI 119 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
302 >; 120 >;
303 }; 121 };
304 }; 122 };
305 123
306 &main_pmx1 { 124 &main_pmx1 {
307 main_i2c0_pins_default: main-i2c0-defa !! 125 main_i2c0_pins_default: main-i2c0-pins-default {
308 pinctrl-single,pins = < 126 pinctrl-single,pins = <
309 AM65X_IOPAD(0x0000, PI 127 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
310 AM65X_IOPAD(0x0004, PI 128 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
311 >; 129 >;
312 }; 130 };
313 131
314 main_i2c1_pins_default: main-i2c1-defa !! 132 main_i2c1_pins_default: main-i2c1-pins-default {
315 pinctrl-single,pins = < 133 pinctrl-single,pins = <
316 AM65X_IOPAD(0x0008, PI 134 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
317 AM65X_IOPAD(0x000c, PI 135 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
318 >; 136 >;
319 }; 137 };
320 138
321 ecap0_pins_default: ecap0-default-pins !! 139 ecap0_pins_default: ecap0-pins-default {
322 pinctrl-single,pins = < 140 pinctrl-single,pins = <
323 AM65X_IOPAD(0x0010, PI 141 AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
324 >; 142 >;
325 }; 143 };
326 }; 144 };
327 145
328 &wkup_uart0 { 146 &wkup_uart0 {
329 /* Wakeup UART is used by System firmw 147 /* Wakeup UART is used by System firmware */
330 status = "reserved"; !! 148 status = "disabled";
331 pinctrl-names = "default"; <<
332 pinctrl-0 = <&wkup_uart0_pins_default> <<
333 }; <<
334 <<
335 &mcu_uart0 { <<
336 status = "okay"; <<
337 pinctrl-names = "default"; <<
338 pinctrl-0 = <&mcu_uart0_pins_default>; <<
339 }; 149 };
340 150
341 &main_uart0 { 151 &main_uart0 {
342 status = "okay"; <<
343 pinctrl-names = "default"; 152 pinctrl-names = "default";
344 pinctrl-0 = <&main_uart0_pins_default> 153 pinctrl-0 = <&main_uart0_pins_default>;
345 power-domains = <&k3_pds 146 TI_SCI_PD 154 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
346 }; 155 };
347 156
348 &wkup_i2c0 { 157 &wkup_i2c0 {
349 status = "okay"; <<
350 pinctrl-names = "default"; 158 pinctrl-names = "default";
351 pinctrl-0 = <&wkup_i2c0_pins_default>; 159 pinctrl-0 = <&wkup_i2c0_pins_default>;
352 clock-frequency = <400000>; 160 clock-frequency = <400000>;
353 161
354 eeprom@50 { <<
355 /* AT24CM01 */ <<
356 compatible = "atmel,24c1024"; <<
357 reg = <0x50>; <<
358 }; <<
359 <<
360 vdd_mpu: regulator@60 { <<
361 compatible = "ti,tps62363"; <<
362 reg = <0x60>; <<
363 regulator-name = "VDD_MPU"; <<
364 regulator-min-microvolt = <500 <<
365 regulator-max-microvolt = <177 <<
366 regulator-always-on; <<
367 regulator-boot-on; <<
368 ti,vsel0-state-high; <<
369 ti,vsel1-state-high; <<
370 ti,enable-vout-discharge; <<
371 }; <<
372 <<
373 gpio@38 { <<
374 compatible = "nxp,pca9554"; <<
375 reg = <0x38>; <<
376 gpio-controller; <<
377 #gpio-cells = <2>; <<
378 }; <<
379 <<
380 pca9554: gpio@39 { 162 pca9554: gpio@39 {
381 compatible = "nxp,pca9554"; 163 compatible = "nxp,pca9554";
382 reg = <0x39>; 164 reg = <0x39>;
383 gpio-controller; 165 gpio-controller;
384 #gpio-cells = <2>; 166 #gpio-cells = <2>;
385 pinctrl-names = "default"; <<
386 pinctrl-0 = <&wkup_pca554_defa <<
387 interrupt-parent = <&wkup_gpio <<
388 interrupts = <25 IRQ_TYPE_EDGE <<
389 interrupt-controller; <<
390 #interrupt-cells = <2>; <<
391 }; 167 };
392 }; 168 };
393 169
394 &mcu_i2c0 { <<
395 status = "okay"; <<
396 pinctrl-names = "default"; <<
397 pinctrl-0 = <&mcu_i2c0_pins_default>; <<
398 clock-frequency = <400000>; <<
399 }; <<
400 <<
401 &main_i2c0 { 170 &main_i2c0 {
402 status = "okay"; <<
403 pinctrl-names = "default"; 171 pinctrl-names = "default";
404 pinctrl-0 = <&main_i2c0_pins_default>; 172 pinctrl-0 = <&main_i2c0_pins_default>;
405 clock-frequency = <400000>; 173 clock-frequency = <400000>;
406 174
407 pca9555: gpio@21 { 175 pca9555: gpio@21 {
408 compatible = "nxp,pca9555"; 176 compatible = "nxp,pca9555";
409 reg = <0x21>; 177 reg = <0x21>;
410 gpio-controller; 178 gpio-controller;
411 #gpio-cells = <2>; 179 #gpio-cells = <2>;
412 }; 180 };
413 }; 181 };
414 182
415 &main_i2c1 { 183 &main_i2c1 {
416 status = "okay"; <<
417 pinctrl-names = "default"; 184 pinctrl-names = "default";
418 pinctrl-0 = <&main_i2c1_pins_default>; 185 pinctrl-0 = <&main_i2c1_pins_default>;
419 clock-frequency = <400000>; 186 clock-frequency = <400000>;
420 }; 187 };
421 188
422 &main_i2c2 { 189 &main_i2c2 {
423 status = "okay"; <<
424 pinctrl-names = "default"; 190 pinctrl-names = "default";
425 pinctrl-0 = <&main_i2c2_pins_default>; 191 pinctrl-0 = <&main_i2c2_pins_default>;
426 clock-frequency = <400000>; 192 clock-frequency = <400000>;
427 }; 193 };
428 194
429 &ecap0 { 195 &ecap0 {
430 status = "okay"; <<
431 pinctrl-names = "default"; 196 pinctrl-names = "default";
432 pinctrl-0 = <&ecap0_pins_default>; 197 pinctrl-0 = <&ecap0_pins_default>;
433 }; 198 };
434 199
435 &main_spi0 { 200 &main_spi0 {
436 status = "okay"; <<
437 pinctrl-names = "default"; 201 pinctrl-names = "default";
438 pinctrl-0 = <&main_spi0_pins_default>; 202 pinctrl-0 = <&main_spi0_pins_default>;
439 #address-cells = <1>; 203 #address-cells = <1>;
440 #size-cells = <0>; !! 204 #size-cells= <0>;
441 ti,pindir-d0-out-d1-in; !! 205 ti,pindir-d0-out-d1-in = <1>;
442 206
443 flash@0 { !! 207 flash@0{
444 compatible = "jedec,spi-nor"; 208 compatible = "jedec,spi-nor";
445 reg = <0x0>; 209 reg = <0x0>;
446 spi-tx-bus-width = <1>; 210 spi-tx-bus-width = <1>;
447 spi-rx-bus-width = <1>; 211 spi-rx-bus-width = <1>;
448 spi-max-frequency = <48000000> 212 spi-max-frequency = <48000000>;
>> 213 #address-cells = <1>;
>> 214 #size-cells= <1>;
449 }; 215 };
450 }; 216 };
451 217
452 &sdhci0 { 218 &sdhci0 {
453 status = "okay"; <<
454 pinctrl-names = "default"; 219 pinctrl-names = "default";
455 pinctrl-0 = <&main_mmc0_pins_default>; 220 pinctrl-0 = <&main_mmc0_pins_default>;
456 bus-width = <8>; 221 bus-width = <8>;
457 non-removable; 222 non-removable;
458 ti,driver-strength-ohm = <50>; 223 ti,driver-strength-ohm = <50>;
459 disable-wp; <<
460 }; 224 };
461 225
462 /* !! 226 &dwc3_1 {
463 * Because of erratas i2025 and i2026 for sili !! 227 status = "okay";
464 * SD card interface might fail. Boards with s !! 228 };
465 * disable sdhci1 !! 229
466 */ !! 230 &usb1_phy {
467 &sdhci1 { <<
468 status = "okay"; 231 status = "okay";
469 vmmc-supply = <&vdd_mmc1_sd>; <<
470 pinctrl-names = "default"; <<
471 pinctrl-0 = <&main_mmc1_pins_default>; <<
472 ti,driver-strength-ohm = <50>; <<
473 disable-wp; <<
474 }; 232 };
475 233
476 &usb1 { 234 &usb1 {
477 pinctrl-names = "default"; 235 pinctrl-names = "default";
478 pinctrl-0 = <&usb1_pins_default>; 236 pinctrl-0 = <&usb1_pins_default>;
479 dr_mode = "otg"; 237 dr_mode = "otg";
480 }; 238 };
481 239
482 &dwc3_0 { 240 &dwc3_0 {
483 status = "disabled"; 241 status = "disabled";
484 }; 242 };
485 243
486 &usb0_phy { 244 &usb0_phy {
487 status = "disabled"; 245 status = "disabled";
488 }; 246 };
489 247
490 &tscadc0 { 248 &tscadc0 {
491 status = "okay"; <<
492 adc { 249 adc {
493 ti,adc-channels = <0 1 2 3 4 5 250 ti,adc-channels = <0 1 2 3 4 5 6 7>;
494 }; 251 };
495 }; 252 };
496 253
497 &tscadc1 { 254 &tscadc1 {
498 status = "okay"; <<
499 adc { 255 adc {
500 ti,adc-channels = <0 1 2 3 4 5 256 ti,adc-channels = <0 1 2 3 4 5 6 7>;
501 }; 257 };
502 }; 258 };
503 259
504 &serdes0 { 260 &serdes0 {
505 status = "disabled"; 261 status = "disabled";
506 }; 262 };
507 263
508 &serdes1 { 264 &serdes1 {
509 status = "disabled"; 265 status = "disabled";
510 }; 266 };
511 267
512 &mailbox0_cluster0 { !! 268 &pcie0_rc {
513 status = "okay"; !! 269 status = "disabled";
514 interrupts = <436>; <<
515 <<
516 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0 <<
517 ti,mbox-tx = <1 0 0>; <<
518 ti,mbox-rx = <0 0 0>; <<
519 }; <<
520 }; <<
521 <<
522 &mailbox0_cluster1 { <<
523 status = "okay"; <<
524 interrupts = <432>; <<
525 <<
526 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0 <<
527 ti,mbox-tx = <1 0 0>; <<
528 ti,mbox-rx = <0 0 0>; <<
529 }; <<
530 }; <<
531 <<
532 &mcu_r5fss0_core0 { <<
533 memory-region = <&mcu_r5fss0_core0_dma <<
534 <&mcu_r5fss0_core0_mem <<
535 mboxes = <&mailbox0_cluster0 &mbox_mcu <<
536 }; <<
537 <<
538 &mcu_r5fss0_core1 { <<
539 memory-region = <&mcu_r5fss0_core1_dma <<
540 <&mcu_r5fss0_core1_mem <<
541 mboxes = <&mailbox0_cluster1 &mbox_mcu <<
542 }; <<
543 <<
544 &ospi0 { <<
545 status = "okay"; <<
546 pinctrl-names = "default"; <<
547 pinctrl-0 = <&mcu_fss0_ospi0_pins_defa <<
548 <<
549 flash@0 { <<
550 compatible = "jedec,spi-nor"; <<
551 reg = <0x0>; <<
552 spi-tx-bus-width = <8>; <<
553 spi-rx-bus-width = <8>; <<
554 spi-max-frequency = <25000000> <<
555 cdns,tshsl-ns = <60>; <<
556 cdns,tsd2d-ns = <60>; <<
557 cdns,tchsh-ns = <60>; <<
558 cdns,tslch-ns = <60>; <<
559 cdns,read-delay = <0>; <<
560 <<
561 partitions { <<
562 compatible = "fixed-pa <<
563 #address-cells = <1>; <<
564 #size-cells = <1>; <<
565 <<
566 partition@0 { <<
567 label = "ospi. <<
568 reg = <0x0 0x8 <<
569 }; <<
570 <<
571 partition@80000 { <<
572 label = "ospi. <<
573 reg = <0x80000 <<
574 }; <<
575 <<
576 partition@280000 { <<
577 label = "ospi. <<
578 reg = <0x28000 <<
579 }; <<
580 <<
581 partition@680000 { <<
582 label = "ospi. <<
583 reg = <0x68000 <<
584 }; <<
585 <<
586 partition@6a0000 { <<
587 label = "ospi. <<
588 reg = <0x6a000 <<
589 }; <<
590 <<
591 partition@6c0000 { <<
592 label = "ospi. <<
593 reg = <0x6c000 <<
594 }; <<
595 <<
596 partition@800000 { <<
597 label = "ospi. <<
598 reg = <0x80000 <<
599 }; <<
600 <<
601 partition@3fe0000 { <<
602 label = "ospi. <<
603 reg = <0x3fe00 <<
604 }; <<
605 }; <<
606 }; <<
607 }; <<
608 <<
609 &mcu_cpsw { <<
610 pinctrl-names = "default"; <<
611 pinctrl-0 = <&mcu_cpsw_pins_default>; <<
612 }; 270 };
613 271
614 &davinci_mdio { !! 272 &pcie0_ep {
615 status = "okay"; !! 273 status = "disabled";
616 pinctrl-names = "default"; <<
617 pinctrl-0 = <&mcu_mdio_pins_default>; <<
618 <<
619 phy0: ethernet-phy@0 { <<
620 reg = <0>; <<
621 ti,rx-internal-delay = <DP8386 <<
622 ti,fifo-depth = <DP83867_PHYCR <<
623 }; <<
624 }; 274 };
625 275
626 &cpsw_port1 { !! 276 &pcie1_rc {
627 phy-mode = "rgmii-rxid"; !! 277 status = "disabled";
628 phy-handle = <&phy0>; <<
629 }; 278 };
630 279
631 &dss { !! 280 &pcie1_ep {
632 status = "disabled"; 281 status = "disabled";
633 }; 282 };
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