1 // SPDX-License-Identifier: GPL-2.0-only OR MI !! 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (C) 2016-2024 Texas Instruments I !! 3 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 7
8 #include "k3-am654.dtsi" 8 #include "k3-am654.dtsi"
9 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/net/ti-dp83867.h> 10 #include <dt-bindings/net/ti-dp83867.h>
11 11
12 / { 12 / {
13 compatible = "ti,am654-evm", "ti,am654 !! 13 compatible = "ti,am654-evm", "ti,am654";
14 model = "Texas Instruments AM654 Base 14 model = "Texas Instruments AM654 Base Board";
15 15
16 aliases { <<
17 serial0 = &wkup_uart0; <<
18 serial1 = &mcu_uart0; <<
19 serial2 = &main_uart0; <<
20 i2c0 = &wkup_i2c0; <<
21 i2c1 = &mcu_i2c0; <<
22 i2c2 = &main_i2c0; <<
23 i2c3 = &main_i2c1; <<
24 i2c4 = &main_i2c2; <<
25 ethernet0 = &cpsw_port1; <<
26 mmc0 = &sdhci0; <<
27 mmc1 = &sdhci1; <<
28 }; <<
29 <<
30 chosen { 16 chosen {
31 stdout-path = "serial2:115200n 17 stdout-path = "serial2:115200n8";
>> 18 bootargs = "earlycon=ns16550a,mmio32,0x02800000";
32 }; 19 };
33 20
34 memory@80000000 { 21 memory@80000000 {
35 device_type = "memory"; 22 device_type = "memory";
36 bootph-all; <<
37 /* 4G RAM */ 23 /* 4G RAM */
38 reg = <0x00000000 0x80000000 0 24 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
39 <0x00000008 0x80000000 0 25 <0x00000008 0x80000000 0x00000000 0x80000000>;
40 }; 26 };
41 27
42 reserved-memory { 28 reserved-memory {
43 #address-cells = <2>; 29 #address-cells = <2>;
44 #size-cells = <2>; 30 #size-cells = <2>;
45 ranges; 31 ranges;
46 !! 32 secure_ddr: secure_ddr@9e800000 {
47 secure_ddr: secure-ddr@9e80000 <<
48 reg = <0 0x9e800000 0 33 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
49 alignment = <0x1000>; 34 alignment = <0x1000>;
50 no-map; 35 no-map;
51 }; 36 };
52 <<
53 mcu_r5fss0_core0_dma_memory_re <<
54 compatible = "shared-d <<
55 reg = <0 0xa0000000 0 <<
56 no-map; <<
57 }; <<
58 <<
59 mcu_r5fss0_core0_memory_region <<
60 compatible = "shared-d <<
61 reg = <0 0xa0100000 0 <<
62 no-map; <<
63 }; <<
64 <<
65 mcu_r5fss0_core1_dma_memory_re <<
66 compatible = "shared-d <<
67 reg = <0 0xa1000000 0 <<
68 no-map; <<
69 }; <<
70 <<
71 mcu_r5fss0_core1_memory_region <<
72 compatible = "shared-d <<
73 reg = <0 0xa1100000 0 <<
74 no-map; <<
75 }; <<
76 <<
77 rtos_ipc_memory_region: ipc-me <<
78 reg = <0x00 0xa2000000 <<
79 alignment = <0x1000>; <<
80 no-map; <<
81 }; <<
82 }; 37 };
83 38
84 gpio-keys { 39 gpio-keys {
85 compatible = "gpio-keys"; 40 compatible = "gpio-keys";
86 autorepeat; 41 autorepeat;
87 pinctrl-names = "default"; 42 pinctrl-names = "default";
88 pinctrl-0 = <&push_button_pins 43 pinctrl-0 = <&push_button_pins_default>;
89 44
90 switch-5 { !! 45 sw5 {
91 label = "GPIO Key USER 46 label = "GPIO Key USER1";
92 linux,code = <BTN_0>; 47 linux,code = <BTN_0>;
93 gpios = <&wkup_gpio0 2 48 gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
94 }; 49 };
95 50
96 switch-6 { !! 51 sw6 {
97 label = "GPIO Key USER 52 label = "GPIO Key USER2";
98 linux,code = <BTN_1>; 53 linux,code = <BTN_1>;
99 gpios = <&wkup_gpio0 2 54 gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
100 }; 55 };
101 }; 56 };
102 57
103 evm_12v0: regulator-0 { !! 58 clk_ov5640_fixed: clock {
104 /* main supply */ !! 59 compatible = "fixed-clock";
105 compatible = "regulator-fixed" !! 60 #clock-cells = <0>;
106 regulator-name = "evm_12v0"; !! 61 clock-frequency = <24000000>;
107 regulator-min-microvolt = <120 <<
108 regulator-max-microvolt = <120 <<
109 regulator-always-on; <<
110 regulator-boot-on; <<
111 }; <<
112 <<
113 vcc3v3_io: regulator-1 { <<
114 /* Output of TPS54334 */ <<
115 compatible = "regulator-fixed" <<
116 regulator-name = "vcc3v3_io"; <<
117 regulator-min-microvolt = <330 <<
118 regulator-max-microvolt = <330 <<
119 regulator-always-on; <<
120 regulator-boot-on; <<
121 vin-supply = <&evm_12v0>; <<
122 }; <<
123 <<
124 vdd_mmc1_sd: regulator-2 { <<
125 compatible = "regulator-fixed" <<
126 regulator-name = "vdd_mmc1_sd" <<
127 regulator-min-microvolt = <330 <<
128 regulator-max-microvolt = <330 <<
129 regulator-boot-on; <<
130 enable-active-high; <<
131 vin-supply = <&vcc3v3_io>; <<
132 gpio = <&pca9554 4 GPIO_ACTIVE <<
133 }; <<
134 <<
135 vtt_supply: regulator-3 { <<
136 compatible = "regulator-fixed" <<
137 regulator-name = "vtt"; <<
138 pinctrl-names = "default"; <<
139 pinctrl-0 = <&ddr_vtt_pins_def <<
140 regulator-min-microvolt = <330 <<
141 regulator-max-microvolt = <330 <<
142 enable-active-high; <<
143 regulator-always-on; <<
144 regulator-boot-on; <<
145 vin-supply = <&vcc3v3_io>; <<
146 gpio = <&wkup_gpio0 28 GPIO_AC <<
147 }; 62 };
148 }; 63 };
149 64
150 &wkup_pmx0 { 65 &wkup_pmx0 {
151 wkup_uart0_pins_default: wkup-uart0-de !! 66 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
152 pinctrl-single,pins = < <<
153 AM65X_WKUP_IOPAD(0x00a <<
154 AM65X_WKUP_IOPAD(0x00a <<
155 AM65X_WKUP_IOPAD(0x00c <<
156 AM65X_WKUP_IOPAD(0x00c <<
157 >; <<
158 }; <<
159 <<
160 ddr_vtt_pins_default: ddr-vtt-default- <<
161 pinctrl-single,pins = < <<
162 AM65X_WKUP_IOPAD(0x004 <<
163 >; <<
164 }; <<
165 <<
166 wkup_i2c0_pins_default: wkup-i2c0-defa <<
167 pinctrl-single,pins = < 67 pinctrl-single,pins = <
168 AM65X_WKUP_IOPAD(0x00e 68 AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
169 AM65X_WKUP_IOPAD(0x00e 69 AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
170 >; 70 >;
171 }; 71 };
172 72
173 push_button_pins_default: push-button- !! 73 push_button_pins_default: push_button__pins_default {
174 pinctrl-single,pins = < 74 pinctrl-single,pins = <
175 AM65X_WKUP_IOPAD(0x003 75 AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
176 AM65X_WKUP_IOPAD(0x003 76 AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
177 >; 77 >;
178 }; 78 };
179 79
180 mcu_fss0_ospi0_pins_default: mcu-fss0- !! 80 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
181 pinctrl-single,pins = < 81 pinctrl-single,pins = <
182 AM65X_WKUP_IOPAD(0x000 82 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
183 AM65X_WKUP_IOPAD(0x000 83 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
184 AM65X_WKUP_IOPAD(0x000 84 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
185 AM65X_WKUP_IOPAD(0x001 85 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
186 AM65X_WKUP_IOPAD(0x001 86 AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
187 AM65X_WKUP_IOPAD(0x001 87 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
188 AM65X_WKUP_IOPAD(0x001 88 AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
189 AM65X_WKUP_IOPAD(0x002 89 AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
190 AM65X_WKUP_IOPAD(0x002 90 AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
191 AM65X_WKUP_IOPAD(0x002 91 AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
192 AM65X_WKUP_IOPAD(0x002 92 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
193 >; 93 >;
194 }; 94 };
195 95
196 wkup_pca554_default: wkup-pca554-defau !! 96 wkup_pca554_default: wkup_pca554_default {
197 pinctrl-single,pins = < 97 pinctrl-single,pins = <
198 AM65X_WKUP_IOPAD(0x003 98 AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
199 >; 99 >;
200 }; 100 };
201 101
202 mcu_uart0_pins_default: mcu-uart0-defa !! 102 mcu_cpsw_pins_default: mcu_cpsw_pins_default {
203 pinctrl-single,pins = < <<
204 AM65X_WKUP_IOPAD(0x004 <<
205 AM65X_WKUP_IOPAD(0x004 <<
206 AM65X_WKUP_IOPAD(0x004 <<
207 AM65X_WKUP_IOPAD(0x005 <<
208 >; <<
209 }; <<
210 <<
211 mcu_cpsw_pins_default: mcu-cpsw-defaul <<
212 pinctrl-single,pins = < 103 pinctrl-single,pins = <
213 AM65X_WKUP_IOPAD(0x005 104 AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
214 AM65X_WKUP_IOPAD(0x005 105 AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
215 AM65X_WKUP_IOPAD(0x006 106 AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
216 AM65X_WKUP_IOPAD(0x006 107 AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
217 AM65X_WKUP_IOPAD(0x006 108 AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
218 AM65X_WKUP_IOPAD(0x006 109 AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
219 AM65X_WKUP_IOPAD(0x007 110 AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
220 AM65X_WKUP_IOPAD(0x007 111 AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
221 AM65X_WKUP_IOPAD(0x008 112 AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
222 AM65X_WKUP_IOPAD(0x008 113 AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
223 AM65X_WKUP_IOPAD(0x007 !! 114 AM65X_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* (N1) MCU_RGMII1_TXC */
224 AM65X_WKUP_IOPAD(0x007 115 AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
225 >; 116 >;
226 }; 117 };
227 118
228 mcu_mdio_pins_default: mcu-mdio1-defau !! 119 mcu_mdio_pins_default: mcu_mdio1_pins_default {
229 pinctrl-single,pins = < 120 pinctrl-single,pins = <
230 AM65X_WKUP_IOPAD(0x008 121 AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
231 AM65X_WKUP_IOPAD(0x008 122 AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
232 >; 123 >;
233 }; 124 };
234 <<
235 mcu_i2c0_pins_default: mcu-i2c0-defaul <<
236 pinctrl-single,pins = < <<
237 AM65X_WKUP_IOPAD(0x00e <<
238 AM65X_WKUP_IOPAD(0x00e <<
239 >; <<
240 }; <<
241 }; 125 };
242 126
243 &main_pmx0 { 127 &main_pmx0 {
244 main_uart0_pins_default: main-uart0-de !! 128 main_uart0_pins_default: main-uart0-pins-default {
245 pinctrl-single,pins = < 129 pinctrl-single,pins = <
246 AM65X_IOPAD(0x01e4, PI 130 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
247 AM65X_IOPAD(0x01e8, PI 131 AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
248 AM65X_IOPAD(0x01ec, PI 132 AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
249 AM65X_IOPAD(0x01f0, PI 133 AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
250 >; 134 >;
251 }; 135 };
252 136
253 main_i2c2_pins_default: main-i2c2-defa !! 137 main_i2c2_pins_default: main-i2c2-pins-default {
254 pinctrl-single,pins = < 138 pinctrl-single,pins = <
255 AM65X_IOPAD(0x0074, PI 139 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
256 AM65X_IOPAD(0x0070, PI 140 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
257 >; 141 >;
258 }; 142 };
259 143
260 main_spi0_pins_default: main-spi0-defa !! 144 main_spi0_pins_default: main-spi0-pins-default {
261 pinctrl-single,pins = < 145 pinctrl-single,pins = <
262 AM65X_IOPAD(0x01c4, PI 146 AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
263 AM65X_IOPAD(0x01c8, PI 147 AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
264 AM65X_IOPAD(0x01cc, PI 148 AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
265 AM65X_IOPAD(0x01bc, PI 149 AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
266 >; 150 >;
267 }; 151 };
268 152
269 main_mmc0_pins_default: main-mmc0-defa !! 153 main_mmc0_pins_default: main-mmc0-pins-default {
270 pinctrl-single,pins = < 154 pinctrl-single,pins = <
271 AM65X_IOPAD(0x01a8, PI 155 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
272 AM65X_IOPAD(0x01ac, PI 156 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
273 AM65X_IOPAD(0x01a4, PI 157 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
274 AM65X_IOPAD(0x01a0, PI 158 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
275 AM65X_IOPAD(0x019c, PI 159 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
276 AM65X_IOPAD(0x0198, PI 160 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
277 AM65X_IOPAD(0x0194, PI 161 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
278 AM65X_IOPAD(0x0190, PI 162 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
279 AM65X_IOPAD(0x018c, PI 163 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
280 AM65X_IOPAD(0x0188, PI 164 AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
281 AM65X_IOPAD(0x01b4, PI 165 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
282 AM65X_IOPAD(0x01b0, PI 166 AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
283 >; 167 >;
284 }; 168 };
285 169
286 main_mmc1_pins_default: main-mmc1-defa !! 170 usb1_pins_default: usb1_pins_default {
287 pinctrl-single,pins = < <<
288 AM65X_IOPAD(0x02d4, PI <<
289 AM65X_IOPAD(0x02d8, PI <<
290 AM65X_IOPAD(0x02d0, PI <<
291 AM65X_IOPAD(0x02cc, PI <<
292 AM65X_IOPAD(0x02c8, PI <<
293 AM65X_IOPAD(0x02c4, PI <<
294 AM65X_IOPAD(0x02dc, PI <<
295 AM65X_IOPAD(0x02e0, PI <<
296 >; <<
297 }; <<
298 <<
299 usb1_pins_default: usb1-default-pins { <<
300 pinctrl-single,pins = < 171 pinctrl-single,pins = <
301 AM65X_IOPAD(0x02c0, PI 172 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
302 >; 173 >;
303 }; 174 };
304 }; 175 };
305 176
306 &main_pmx1 { 177 &main_pmx1 {
307 main_i2c0_pins_default: main-i2c0-defa !! 178 main_i2c0_pins_default: main-i2c0-pins-default {
308 pinctrl-single,pins = < 179 pinctrl-single,pins = <
309 AM65X_IOPAD(0x0000, PI 180 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
310 AM65X_IOPAD(0x0004, PI 181 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
311 >; 182 >;
312 }; 183 };
313 184
314 main_i2c1_pins_default: main-i2c1-defa !! 185 main_i2c1_pins_default: main-i2c1-pins-default {
315 pinctrl-single,pins = < 186 pinctrl-single,pins = <
316 AM65X_IOPAD(0x0008, PI 187 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
317 AM65X_IOPAD(0x000c, PI 188 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
318 >; 189 >;
319 }; 190 };
320 191
321 ecap0_pins_default: ecap0-default-pins !! 192 ecap0_pins_default: ecap0-pins-default {
322 pinctrl-single,pins = < 193 pinctrl-single,pins = <
323 AM65X_IOPAD(0x0010, PI 194 AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
324 >; 195 >;
325 }; 196 };
326 }; 197 };
327 198
328 &wkup_uart0 { 199 &wkup_uart0 {
329 /* Wakeup UART is used by System firmw 200 /* Wakeup UART is used by System firmware */
330 status = "reserved"; !! 201 status = "disabled";
331 pinctrl-names = "default"; <<
332 pinctrl-0 = <&wkup_uart0_pins_default> <<
333 }; <<
334 <<
335 &mcu_uart0 { <<
336 status = "okay"; <<
337 pinctrl-names = "default"; <<
338 pinctrl-0 = <&mcu_uart0_pins_default>; <<
339 }; 202 };
340 203
341 &main_uart0 { 204 &main_uart0 {
342 status = "okay"; <<
343 pinctrl-names = "default"; 205 pinctrl-names = "default";
344 pinctrl-0 = <&main_uart0_pins_default> 206 pinctrl-0 = <&main_uart0_pins_default>;
345 power-domains = <&k3_pds 146 TI_SCI_PD 207 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
346 }; 208 };
347 209
348 &wkup_i2c0 { 210 &wkup_i2c0 {
349 status = "okay"; <<
350 pinctrl-names = "default"; 211 pinctrl-names = "default";
351 pinctrl-0 = <&wkup_i2c0_pins_default>; 212 pinctrl-0 = <&wkup_i2c0_pins_default>;
352 clock-frequency = <400000>; 213 clock-frequency = <400000>;
353 214
354 eeprom@50 { <<
355 /* AT24CM01 */ <<
356 compatible = "atmel,24c1024"; <<
357 reg = <0x50>; <<
358 }; <<
359 <<
360 vdd_mpu: regulator@60 { <<
361 compatible = "ti,tps62363"; <<
362 reg = <0x60>; <<
363 regulator-name = "VDD_MPU"; <<
364 regulator-min-microvolt = <500 <<
365 regulator-max-microvolt = <177 <<
366 regulator-always-on; <<
367 regulator-boot-on; <<
368 ti,vsel0-state-high; <<
369 ti,vsel1-state-high; <<
370 ti,enable-vout-discharge; <<
371 }; <<
372 <<
373 gpio@38 { <<
374 compatible = "nxp,pca9554"; <<
375 reg = <0x38>; <<
376 gpio-controller; <<
377 #gpio-cells = <2>; <<
378 }; <<
379 <<
380 pca9554: gpio@39 { 215 pca9554: gpio@39 {
381 compatible = "nxp,pca9554"; 216 compatible = "nxp,pca9554";
382 reg = <0x39>; 217 reg = <0x39>;
383 gpio-controller; 218 gpio-controller;
384 #gpio-cells = <2>; 219 #gpio-cells = <2>;
385 pinctrl-names = "default"; 220 pinctrl-names = "default";
386 pinctrl-0 = <&wkup_pca554_defa 221 pinctrl-0 = <&wkup_pca554_default>;
387 interrupt-parent = <&wkup_gpio 222 interrupt-parent = <&wkup_gpio0>;
388 interrupts = <25 IRQ_TYPE_EDGE 223 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
389 interrupt-controller; 224 interrupt-controller;
390 #interrupt-cells = <2>; 225 #interrupt-cells = <2>;
391 }; 226 };
392 }; 227 };
393 228
394 &mcu_i2c0 { <<
395 status = "okay"; <<
396 pinctrl-names = "default"; <<
397 pinctrl-0 = <&mcu_i2c0_pins_default>; <<
398 clock-frequency = <400000>; <<
399 }; <<
400 <<
401 &main_i2c0 { 229 &main_i2c0 {
402 status = "okay"; <<
403 pinctrl-names = "default"; 230 pinctrl-names = "default";
404 pinctrl-0 = <&main_i2c0_pins_default>; 231 pinctrl-0 = <&main_i2c0_pins_default>;
405 clock-frequency = <400000>; 232 clock-frequency = <400000>;
406 233
407 pca9555: gpio@21 { 234 pca9555: gpio@21 {
408 compatible = "nxp,pca9555"; 235 compatible = "nxp,pca9555";
409 reg = <0x21>; 236 reg = <0x21>;
410 gpio-controller; 237 gpio-controller;
411 #gpio-cells = <2>; 238 #gpio-cells = <2>;
412 }; 239 };
413 }; 240 };
414 241
415 &main_i2c1 { 242 &main_i2c1 {
416 status = "okay"; <<
417 pinctrl-names = "default"; 243 pinctrl-names = "default";
418 pinctrl-0 = <&main_i2c1_pins_default>; 244 pinctrl-0 = <&main_i2c1_pins_default>;
419 clock-frequency = <400000>; 245 clock-frequency = <400000>;
>> 246
>> 247 ov5640@3c {
>> 248 compatible = "ovti,ov5640";
>> 249 reg = <0x3c>;
>> 250
>> 251 clocks = <&clk_ov5640_fixed>;
>> 252 clock-names = "xclk";
>> 253
>> 254 port {
>> 255 csi2_cam0: endpoint {
>> 256 remote-endpoint = <&csi2_phy0>;
>> 257 clock-lanes = <0>;
>> 258 data-lanes = <1 2>;
>> 259 };
>> 260 };
>> 261 };
>> 262
420 }; 263 };
421 264
422 &main_i2c2 { 265 &main_i2c2 {
423 status = "okay"; <<
424 pinctrl-names = "default"; 266 pinctrl-names = "default";
425 pinctrl-0 = <&main_i2c2_pins_default>; 267 pinctrl-0 = <&main_i2c2_pins_default>;
426 clock-frequency = <400000>; 268 clock-frequency = <400000>;
427 }; 269 };
428 270
429 &ecap0 { 271 &ecap0 {
430 status = "okay"; <<
431 pinctrl-names = "default"; 272 pinctrl-names = "default";
432 pinctrl-0 = <&ecap0_pins_default>; 273 pinctrl-0 = <&ecap0_pins_default>;
433 }; 274 };
434 275
435 &main_spi0 { 276 &main_spi0 {
436 status = "okay"; <<
437 pinctrl-names = "default"; 277 pinctrl-names = "default";
438 pinctrl-0 = <&main_spi0_pins_default>; 278 pinctrl-0 = <&main_spi0_pins_default>;
439 #address-cells = <1>; 279 #address-cells = <1>;
440 #size-cells = <0>; !! 280 #size-cells= <0>;
441 ti,pindir-d0-out-d1-in; !! 281 ti,pindir-d0-out-d1-in = <1>;
442 282
443 flash@0 { !! 283 flash@0{
444 compatible = "jedec,spi-nor"; 284 compatible = "jedec,spi-nor";
445 reg = <0x0>; 285 reg = <0x0>;
446 spi-tx-bus-width = <1>; 286 spi-tx-bus-width = <1>;
447 spi-rx-bus-width = <1>; 287 spi-rx-bus-width = <1>;
448 spi-max-frequency = <48000000> 288 spi-max-frequency = <48000000>;
>> 289 #address-cells = <1>;
>> 290 #size-cells= <1>;
449 }; 291 };
450 }; 292 };
451 293
452 &sdhci0 { 294 &sdhci0 {
453 status = "okay"; <<
454 pinctrl-names = "default"; 295 pinctrl-names = "default";
455 pinctrl-0 = <&main_mmc0_pins_default>; 296 pinctrl-0 = <&main_mmc0_pins_default>;
456 bus-width = <8>; 297 bus-width = <8>;
457 non-removable; 298 non-removable;
458 ti,driver-strength-ohm = <50>; 299 ti,driver-strength-ohm = <50>;
459 disable-wp; 300 disable-wp;
460 }; 301 };
461 302
462 /* !! 303 &dwc3_1 {
463 * Because of erratas i2025 and i2026 for sili !! 304 status = "okay";
464 * SD card interface might fail. Boards with s !! 305 };
465 * disable sdhci1 !! 306
466 */ !! 307 &usb1_phy {
467 &sdhci1 { <<
468 status = "okay"; 308 status = "okay";
469 vmmc-supply = <&vdd_mmc1_sd>; <<
470 pinctrl-names = "default"; <<
471 pinctrl-0 = <&main_mmc1_pins_default>; <<
472 ti,driver-strength-ohm = <50>; <<
473 disable-wp; <<
474 }; 309 };
475 310
476 &usb1 { 311 &usb1 {
477 pinctrl-names = "default"; 312 pinctrl-names = "default";
478 pinctrl-0 = <&usb1_pins_default>; 313 pinctrl-0 = <&usb1_pins_default>;
479 dr_mode = "otg"; 314 dr_mode = "otg";
480 }; 315 };
481 316
482 &dwc3_0 { 317 &dwc3_0 {
483 status = "disabled"; 318 status = "disabled";
484 }; 319 };
485 320
486 &usb0_phy { 321 &usb0_phy {
487 status = "disabled"; 322 status = "disabled";
488 }; 323 };
489 324
490 &tscadc0 { 325 &tscadc0 {
491 status = "okay"; <<
492 adc { 326 adc {
493 ti,adc-channels = <0 1 2 3 4 5 327 ti,adc-channels = <0 1 2 3 4 5 6 7>;
494 }; 328 };
495 }; 329 };
496 330
497 &tscadc1 { 331 &tscadc1 {
498 status = "okay"; <<
499 adc { 332 adc {
500 ti,adc-channels = <0 1 2 3 4 5 333 ti,adc-channels = <0 1 2 3 4 5 6 7>;
501 }; 334 };
502 }; 335 };
503 336
504 &serdes0 { 337 &serdes0 {
505 status = "disabled"; 338 status = "disabled";
506 }; 339 };
507 340
508 &serdes1 { 341 &serdes1 {
509 status = "disabled"; 342 status = "disabled";
510 }; 343 };
511 344
>> 345 &pcie0_rc {
>> 346 status = "disabled";
>> 347 };
>> 348
>> 349 &pcie0_ep {
>> 350 status = "disabled";
>> 351 };
>> 352
>> 353 &pcie1_rc {
>> 354 status = "disabled";
>> 355 };
>> 356
>> 357 &pcie1_ep {
>> 358 status = "disabled";
>> 359 };
>> 360
512 &mailbox0_cluster0 { 361 &mailbox0_cluster0 {
513 status = "okay"; !! 362 interrupts = <164 0>;
514 interrupts = <436>; <<
515 363
516 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0 364 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
517 ti,mbox-tx = <1 0 0>; 365 ti,mbox-tx = <1 0 0>;
518 ti,mbox-rx = <0 0 0>; 366 ti,mbox-rx = <0 0 0>;
519 }; 367 };
520 }; 368 };
521 369
522 &mailbox0_cluster1 { 370 &mailbox0_cluster1 {
523 status = "okay"; !! 371 interrupts = <165 0>;
524 interrupts = <432>; <<
525 372
526 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0 373 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
527 ti,mbox-tx = <1 0 0>; 374 ti,mbox-tx = <1 0 0>;
528 ti,mbox-rx = <0 0 0>; 375 ti,mbox-rx = <0 0 0>;
529 }; 376 };
530 }; 377 };
531 378
532 &mcu_r5fss0_core0 { !! 379 &mailbox0_cluster2 {
533 memory-region = <&mcu_r5fss0_core0_dma !! 380 status = "disabled";
534 <&mcu_r5fss0_core0_mem !! 381 };
535 mboxes = <&mailbox0_cluster0 &mbox_mcu !! 382
>> 383 &mailbox0_cluster3 {
>> 384 status = "disabled";
>> 385 };
>> 386
>> 387 &mailbox0_cluster4 {
>> 388 status = "disabled";
>> 389 };
>> 390
>> 391 &mailbox0_cluster5 {
>> 392 status = "disabled";
536 }; 393 };
537 394
538 &mcu_r5fss0_core1 { !! 395 &mailbox0_cluster6 {
539 memory-region = <&mcu_r5fss0_core1_dma !! 396 status = "disabled";
540 <&mcu_r5fss0_core1_mem !! 397 };
541 mboxes = <&mailbox0_cluster1 &mbox_mcu !! 398
>> 399 &mailbox0_cluster7 {
>> 400 status = "disabled";
>> 401 };
>> 402
>> 403 &mailbox0_cluster8 {
>> 404 status = "disabled";
>> 405 };
>> 406
>> 407 &mailbox0_cluster9 {
>> 408 status = "disabled";
>> 409 };
>> 410
>> 411 &mailbox0_cluster10 {
>> 412 status = "disabled";
>> 413 };
>> 414
>> 415 &mailbox0_cluster11 {
>> 416 status = "disabled";
542 }; 417 };
543 418
544 &ospi0 { 419 &ospi0 {
545 status = "okay"; <<
546 pinctrl-names = "default"; 420 pinctrl-names = "default";
547 pinctrl-0 = <&mcu_fss0_ospi0_pins_defa 421 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
548 422
549 flash@0 { !! 423 flash@0{
550 compatible = "jedec,spi-nor"; 424 compatible = "jedec,spi-nor";
551 reg = <0x0>; 425 reg = <0x0>;
552 spi-tx-bus-width = <8>; !! 426 spi-tx-bus-width = <1>;
553 spi-rx-bus-width = <8>; 427 spi-rx-bus-width = <8>;
554 spi-max-frequency = <25000000> !! 428 spi-max-frequency = <40000000>;
555 cdns,tshsl-ns = <60>; 429 cdns,tshsl-ns = <60>;
556 cdns,tsd2d-ns = <60>; 430 cdns,tsd2d-ns = <60>;
557 cdns,tchsh-ns = <60>; 431 cdns,tchsh-ns = <60>;
558 cdns,tslch-ns = <60>; 432 cdns,tslch-ns = <60>;
559 cdns,read-delay = <0>; 433 cdns,read-delay = <0>;
>> 434 #address-cells = <1>;
>> 435 #size-cells = <1>;
>> 436 };
>> 437 };
560 438
561 partitions { !! 439 &csi2_0 {
562 compatible = "fixed-pa !! 440 csi2_phy0: endpoint {
563 #address-cells = <1>; !! 441 remote-endpoint = <&csi2_cam0>;
564 #size-cells = <1>; !! 442 clock-lanes = <0>;
565 !! 443 data-lanes = <1 2>;
566 partition@0 { <<
567 label = "ospi. <<
568 reg = <0x0 0x8 <<
569 }; <<
570 <<
571 partition@80000 { <<
572 label = "ospi. <<
573 reg = <0x80000 <<
574 }; <<
575 <<
576 partition@280000 { <<
577 label = "ospi. <<
578 reg = <0x28000 <<
579 }; <<
580 <<
581 partition@680000 { <<
582 label = "ospi. <<
583 reg = <0x68000 <<
584 }; <<
585 <<
586 partition@6a0000 { <<
587 label = "ospi. <<
588 reg = <0x6a000 <<
589 }; <<
590 <<
591 partition@6c0000 { <<
592 label = "ospi. <<
593 reg = <0x6c000 <<
594 }; <<
595 <<
596 partition@800000 { <<
597 label = "ospi. <<
598 reg = <0x80000 <<
599 }; <<
600 <<
601 partition@3fe0000 { <<
602 label = "ospi. <<
603 reg = <0x3fe00 <<
604 }; <<
605 }; <<
606 }; 444 };
607 }; 445 };
608 446
609 &mcu_cpsw { 447 &mcu_cpsw {
610 pinctrl-names = "default"; 448 pinctrl-names = "default";
611 pinctrl-0 = <&mcu_cpsw_pins_default>; !! 449 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
612 }; 450 };
613 451
614 &davinci_mdio { 452 &davinci_mdio {
615 status = "okay"; <<
616 pinctrl-names = "default"; <<
617 pinctrl-0 = <&mcu_mdio_pins_default>; <<
618 <<
619 phy0: ethernet-phy@0 { 453 phy0: ethernet-phy@0 {
620 reg = <0>; 454 reg = <0>;
621 ti,rx-internal-delay = <DP8386 455 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
622 ti,fifo-depth = <DP83867_PHYCR 456 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
623 }; 457 };
624 }; 458 };
625 459
626 &cpsw_port1 { 460 &cpsw_port1 {
627 phy-mode = "rgmii-rxid"; 461 phy-mode = "rgmii-rxid";
628 phy-handle = <&phy0>; 462 phy-handle = <&phy0>;
629 }; <<
630 <<
631 &dss { <<
632 status = "disabled"; <<
633 }; 463 };
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