1 // SPDX-License-Identifier: GPL-2.0-only OR MI
2 /*
3 * Copyright (C) 2023-2024 Texas Instruments I
4 *
5 * Base Board: https://www.ti.com/lit/zip/SPRR
6 */
7
8 /dts-v1/;
9
10 #include "k3-am68-sk-som.dtsi"
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-cadence.h>
13 #include <dt-bindings/phy/phy.h>
14
15 #include "k3-serdes.h"
16
17 / {
18 compatible = "ti,am68-sk", "ti,j721s2"
19 model = "Texas Instruments AM68 SK";
20
21 chosen {
22 stdout-path = "serial2:115200n
23 };
24
25 aliases {
26 serial0 = &wkup_uart0;
27 serial1 = &mcu_uart0;
28 serial2 = &main_uart8;
29 mmc1 = &main_sdhci1;
30 can0 = &mcu_mcan0;
31 can1 = &mcu_mcan1;
32 can2 = &main_mcan6;
33 can3 = &main_mcan7;
34 ethernet0 = &cpsw_port1;
35 };
36
37 vusb_main: regulator-vusb-main5v0 {
38 /* USB MAIN INPUT 5V DC */
39 compatible = "regulator-fixed"
40 regulator-name = "vusb-main5v0
41 regulator-min-microvolt = <500
42 regulator-max-microvolt = <500
43 regulator-always-on;
44 regulator-boot-on;
45 };
46
47 vsys_3v3: regulator-vsys3v3 {
48 /* Output of LM5141 */
49 compatible = "regulator-fixed"
50 regulator-name = "vsys_3v3";
51 regulator-min-microvolt = <330
52 regulator-max-microvolt = <330
53 vin-supply = <&vusb_main>;
54 regulator-always-on;
55 regulator-boot-on;
56 };
57
58 vdd_mmc1: regulator-sd {
59 /* Output of TPS22918 */
60 compatible = "regulator-fixed"
61 regulator-name = "vdd_mmc1";
62 regulator-min-microvolt = <330
63 regulator-max-microvolt = <330
64 regulator-boot-on;
65 enable-active-high;
66 vin-supply = <&vsys_3v3>;
67 gpio = <&exp1 8 GPIO_ACTIVE_HI
68 };
69
70 vdd_sd_dv: regulator-tlv71033 {
71 /* Output of TLV71033 */
72 compatible = "regulator-gpio";
73 regulator-name = "tlv71033";
74 pinctrl-names = "default";
75 pinctrl-0 = <&vdd_sd_dv_pins_d
76 regulator-min-microvolt = <180
77 regulator-max-microvolt = <330
78 regulator-boot-on;
79 vin-supply = <&vsys_3v3>;
80 gpios = <&main_gpio0 49 GPIO_A
81 states = <1800000 0x0>,
82 <3300000 0x1>;
83 };
84
85 vsys_io_1v8: regulator-vsys-io-1v8 {
86 compatible = "regulator-fixed"
87 regulator-name = "vsys_io_1v8"
88 regulator-min-microvolt = <180
89 regulator-max-microvolt = <180
90 regulator-always-on;
91 regulator-boot-on;
92 };
93
94 vsys_io_1v2: regulator-vsys-io-1v2 {
95 compatible = "regulator-fixed"
96 regulator-name = "vsys_io_1v2"
97 regulator-min-microvolt = <120
98 regulator-max-microvolt = <120
99 regulator-always-on;
100 regulator-boot-on;
101 };
102
103 transceiver1: can-phy0 {
104 compatible = "ti,tcan1042";
105 #phy-cells = <0>;
106 max-bitrate = <5000000>;
107 };
108
109 transceiver2: can-phy1 {
110 compatible = "ti,tcan1042";
111 #phy-cells = <0>;
112 max-bitrate = <5000000>;
113 };
114
115 transceiver3: can-phy2 {
116 compatible = "ti,tcan1042";
117 #phy-cells = <0>;
118 max-bitrate = <5000000>;
119 };
120
121 transceiver4: can-phy3 {
122 compatible = "ti,tcan1042";
123 #phy-cells = <0>;
124 max-bitrate = <5000000>;
125 };
126
127 connector-hdmi {
128 compatible = "hdmi-connector";
129 label = "hdmi";
130 type = "a";
131 pinctrl-names = "default";
132 pinctrl-0 = <&hdmi_hpd_pins_de
133 ddc-i2c-bus = <&mcu_i2c1>;
134 /* HDMI_HPD */
135 hpd-gpios = <&main_gpio0 0 GPI
136
137 port {
138 hdmi_connector_in: end
139 remote-endpoin
140 };
141 };
142 };
143
144 bridge-dvi {
145 compatible = "ti,tfp410";
146 /* HDMI_PDn */
147 powerdown-gpios = <&exp2 0 GPI
148 ti,deskew = <0>;
149
150 ports {
151 #address-cells = <1>;
152 #size-cells = <0>;
153
154 port@0 {
155 reg = <0>;
156
157 tfp410_in: end
158 remote
159 pclk-s
160 };
161 };
162
163 port@1 {
164 reg = <1>;
165
166 tfp410_out: en
167 remote
168 };
169 };
170 };
171 };
172
173 csi_mux: mux-controller {
174 compatible = "gpio-mux";
175 #mux-state-cells = <1>;
176 mux-gpios = <&exp3 1 GPIO_ACTI
177 idle-state = <0>;
178 };
179 };
180
181 &main_pmx0 {
182 main_uart8_pins_default: main-uart8-de
183 pinctrl-single,pins = <
184 J721S2_IOPAD(0x0d0, PI
185 J721S2_IOPAD(0x0d4, PI
186 >;
187 };
188
189 main_i2c0_pins_default: main-i2c0-defa
190 pinctrl-single,pins = <
191 J721S2_IOPAD(0x0e0, PI
192 J721S2_IOPAD(0x0e4, PI
193 >;
194 };
195
196 main_i2c1_pins_default: main-i2c1-defa
197 pinctrl-single,pins = <
198 J721S2_IOPAD(0x0ac, PI
199 J721S2_IOPAD(0x0b0, PI
200 >;
201 };
202
203 main_mmc1_pins_default: main-mmc1-defa
204 pinctrl-single,pins = <
205 J721S2_IOPAD(0x104, PI
206 J721S2_IOPAD(0x108, PI
207 J721S2_IOPAD(0x100, PI
208 J721S2_IOPAD(0x0fc, PI
209 J721S2_IOPAD(0x0f8, PI
210 J721S2_IOPAD(0x0f4, PI
211 J721S2_IOPAD(0x0f0, PI
212 J721S2_IOPAD(0x0e8, PI
213 >;
214 };
215
216 vdd_sd_dv_pins_default: vdd-sd-dv-defa
217 pinctrl-single,pins = <
218 J721S2_IOPAD(0x0c4, PI
219 >;
220 };
221
222 main_usbss0_pins_default: main-usbss0-
223 pinctrl-single,pins = <
224 J721S2_IOPAD(0x0ec, PI
225 >;
226 };
227
228 main_mcan6_pins_default: main-mcan6-de
229 pinctrl-single,pins = <
230 J721S2_IOPAD(0x098, PI
231 J721S2_IOPAD(0x094, PI
232 >;
233 };
234
235 main_mcan7_pins_default: main-mcan7-de
236 pinctrl-single,pins = <
237 J721S2_IOPAD(0x0a0, PI
238 J721S2_IOPAD(0x09c, PI
239 >;
240 };
241
242 main_i2c4_pins_default: main-i2c4-defa
243 pinctrl-single,pins = <
244 J721S2_IOPAD(0x010, PI
245 J721S2_IOPAD(0x014, PI
246 >;
247 };
248
249 rpi_header_gpio0_pins_default: rpi-hea
250 pinctrl-single,pins = <
251 J721S2_IOPAD(0x0a8, PI
252 J721S2_IOPAD(0x090, PI
253 J721S2_IOPAD(0x0bc, PI
254 J721S2_IOPAD(0x06c, PI
255 J721S2_IOPAD(0x004, PI
256 J721S2_IOPAD(0x008, PI
257 J721S2_IOPAD(0x0b8, PI
258 J721S2_IOPAD(0x00c, PI
259 J721S2_IOPAD(0x034, PI
260 J721S2_IOPAD(0x0a4, PI
261 J721S2_IOPAD(0x0c0, PI
262 J721S2_IOPAD(0x0b4, PI
263 J721S2_IOPAD(0x0cc, PI
264 J721S2_IOPAD(0x08c, PI
265 >;
266 };
267
268 dss_vout0_pins_default: dss-vout0-defa
269 pinctrl-single,pins = <
270 J721S2_IOPAD(0x074, PI
271 J721S2_IOPAD(0x070, PI
272 J721S2_IOPAD(0x04c, PI
273 J721S2_IOPAD(0x048, PI
274 J721S2_IOPAD(0x044, PI
275 J721S2_IOPAD(0x040, PI
276 J721S2_IOPAD(0x03c, PI
277 J721S2_IOPAD(0x038, PI
278 J721S2_IOPAD(0x0c8, PI
279 J721S2_IOPAD(0x030, PI
280 J721S2_IOPAD(0x02c, PI
281 J721S2_IOPAD(0x028, PI
282 J721S2_IOPAD(0x07c, PI
283 J721S2_IOPAD(0x024, PI
284 J721S2_IOPAD(0x020, PI
285 J721S2_IOPAD(0x01c, PI
286 J721S2_IOPAD(0x018, PI
287 J721S2_IOPAD(0x068, PI
288 J721S2_IOPAD(0x064, PI
289 J721S2_IOPAD(0x060, PI
290 J721S2_IOPAD(0x05c, PI
291 J721S2_IOPAD(0x058, PI
292 J721S2_IOPAD(0x054, PI
293 J721S2_IOPAD(0x050, PI
294 J721S2_IOPAD(0x084, PI
295 J721S2_IOPAD(0x080, PI
296 J721S2_IOPAD(0x078, PI
297 J721S2_IOPAD(0x088, PI
298 >;
299 };
300
301 hdmi_hpd_pins_default: hdmi-hpd-defaul
302 pinctrl-single,pins = <
303 J721S2_IOPAD(0x000, PI
304 >;
305 };
306 };
307
308 &wkup_pmx2 {
309 wkup_uart0_pins_default: wkup-uart0-de
310 pinctrl-single,pins = <
311 J721S2_WKUP_IOPAD(0x07
312 J721S2_WKUP_IOPAD(0x07
313 J721S2_WKUP_IOPAD(0x04
314 J721S2_WKUP_IOPAD(0x04
315 >;
316 };
317
318 mcu_cpsw_pins_default: mcu-cpsw-defaul
319 pinctrl-single,pins = <
320 J721S2_WKUP_IOPAD(0x02
321 J721S2_WKUP_IOPAD(0x02
322 J721S2_WKUP_IOPAD(0x02
323 J721S2_WKUP_IOPAD(0x02
324 J721S2_WKUP_IOPAD(0x01
325 J721S2_WKUP_IOPAD(0x00
326 J721S2_WKUP_IOPAD(0x01
327 J721S2_WKUP_IOPAD(0x01
328 J721S2_WKUP_IOPAD(0x00
329 J721S2_WKUP_IOPAD(0x00
330 J721S2_WKUP_IOPAD(0x01
331 J721S2_WKUP_IOPAD(0x00
332 >;
333 };
334
335 mcu_mdio_pins_default: mcu-mdio-defaul
336 pinctrl-single,pins = <
337 J721S2_WKUP_IOPAD(0x03
338 J721S2_WKUP_IOPAD(0x03
339 >;
340 };
341
342 mcu_mcan0_pins_default: mcu-mcan0-defa
343 pinctrl-single,pins = <
344 J721S2_WKUP_IOPAD(0x05
345 J721S2_WKUP_IOPAD(0x05
346 >;
347 };
348
349 mcu_mcan1_pins_default: mcu-mcan1-defa
350 pinctrl-single,pins = <
351 J721S2_WKUP_IOPAD(0x06
352 J721S2_WKUP_IOPAD(0x06
353 >;
354 };
355
356 mcu_i2c0_pins_default: mcu-i2c0-defaul
357 pinctrl-single,pins = <
358 J721S2_WKUP_IOPAD(0x0a
359 J721S2_WKUP_IOPAD(0x0a
360 >;
361 };
362
363 mcu_i2c1_pins_default: mcu-i2c1-defaul
364 pinctrl-single,pins = <
365 J721S2_WKUP_IOPAD(0x07
366 J721S2_WKUP_IOPAD(0x07
367 >;
368 };
369
370 mcu_uart0_pins_default: mcu-uart0-defa
371 pinctrl-single,pins = <
372 J721S2_WKUP_IOPAD(0x08
373 J721S2_WKUP_IOPAD(0x08
374 >;
375 };
376
377 mcu_rpi_header_gpio0_pins0_default: mc
378 pinctrl-single,pins = <
379 J721S2_WKUP_IOPAD(0x11
380 J721S2_WKUP_IOPAD(0x05
381 J721S2_WKUP_IOPAD(0x06
382 J721S2_WKUP_IOPAD(0x05
383 J721S2_WKUP_IOPAD(0x09
384 J721S2_WKUP_IOPAD(0x0B
385 J721S2_WKUP_IOPAD(0x11
386 J721S2_WKUP_IOPAD(0x11
387 J721S2_WKUP_IOPAD(0x06
388 >;
389 };
390 };
391
392 &wkup_pmx3 {
393 mcu_rpi_header_gpio0_pins1_default: mc
394 pinctrl-single,pins = <
395 J721S2_WKUP_IOPAD(0x00
396 >;
397 };
398 };
399
400 &main_gpio0 {
401 status = "okay";
402 pinctrl-names = "default";
403 pinctrl-0 = <&rpi_header_gpio0_pins_de
404 };
405
406 &wkup_gpio0 {
407 status = "okay";
408 pinctrl-names = "default";
409 pinctrl-0 = <&mcu_rpi_header_gpio0_pin
410 };
411
412 &wkup_uart0 {
413 status = "reserved";
414 pinctrl-names = "default";
415 pinctrl-0 = <&wkup_uart0_pins_default>
416 };
417
418 &wkup_i2c0 {
419 bootph-all;
420 clock-frequency = <400000>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&wkup_i2c0_pins_default>;
423 status = "okay";
424
425 lp8733: pmic@60 {
426 compatible = "ti,lp8733";
427 reg = <0x60>;
428 buck0-in-supply = <&vsys_3v3>;
429 buck1-in-supply = <&vsys_3v3>;
430 ldo0-in-supply = <&vsys_3v3>;
431 ldo1-in-supply = <&vsys_3v3>;
432
433 lp8733_regulators: regulators
434 lp8733_buck0_reg: buck
435 /* FB_B0 -> LP
436 regulator-name
437 regulator-min-
438 regulator-max-
439 regulator-alwa
440 regulator-boot
441 };
442
443 lp8733_buck1_reg: buck
444 /* FB_B1 -> LP
445 regulator-name
446 regulator-min-
447 regulator-max-
448 regulator-alwa
449 regulator-boot
450 };
451
452 lp8733_ldo0_reg: ldo0
453 /* LDO0 -> LP8
454 regulator-name
455 regulator-min-
456 regulator-max-
457 regulator-boot
458 regulator-alwa
459 };
460
461 lp8733_ldo1_reg: ldo1
462 /* LDO1 -> LP8
463 regulator-name
464 regulator-min-
465 regulator-max-
466 regulator-alwa
467 regulator-boot
468 };
469 };
470 };
471
472 tps62873a: regulator@40 {
473 compatible = "ti,tps62873";
474 reg = <0x40>;
475 bootph-pre-ram;
476 regulator-name = "VDD_CPU_AVS"
477 regulator-min-microvolt = <600
478 regulator-max-microvolt = <900
479 regulator-boot-on;
480 regulator-always-on;
481 };
482
483 tps62873b: regulator@43 {
484 compatible = "ti,tps62873";
485 reg = <0x43>;
486 regulator-name = "VDD_CORE_0V8
487 regulator-min-microvolt = <800
488 regulator-max-microvolt = <800
489 regulator-boot-on;
490 regulator-always-on;
491 };
492 };
493
494 &mcu_uart0 {
495 status = "okay";
496 pinctrl-names = "default";
497 pinctrl-0 = <&mcu_uart0_pins_default>;
498 };
499
500 &main_uart8 {
501 status = "okay";
502 pinctrl-names = "default";
503 pinctrl-0 = <&main_uart8_pins_default>
504 /* Shared with TFA on this platform */
505 power-domains = <&k3_pds 357 TI_SCI_PD
506 };
507
508 &main_i2c0 {
509 pinctrl-names = "default";
510 pinctrl-0 = <&main_i2c0_pins_default>;
511 clock-frequency = <400000>;
512
513 exp1: gpio@21 {
514 compatible = "ti,tca6416";
515 reg = <0x21>;
516 gpio-controller;
517 #gpio-cells = <2>;
518 gpio-line-names = " ", " ", "
519 "BOARDID_EEP
520 "GPIO_uSD_PW
521 "IO_EXP_MCU_
522 };
523 };
524
525 &main_i2c1 {
526 pinctrl-names = "default";
527 pinctrl-0 = <&main_i2c1_pins_default>;
528 status = "okay";
529
530 exp3: gpio@20 {
531 compatible = "ti,tca6408";
532 reg = <0x20>;
533 gpio-controller;
534 #gpio-cells = <2>;
535 gpio-line-names = "CSI_VIO_SEL
536 "IO_EXP_CSI2
537 "CSI1_B_GPIO
538 };
539
540 i2c-mux@70 {
541 compatible = "nxp,pca9543";
542 #address-cells = <1>;
543 #size-cells = <0>;
544 reg = <0x70>;
545
546 cam0_i2c: i2c@0 {
547 #address-cells = <1>;
548 #size-cells = <0>;
549 reg = <0>;
550 };
551
552 cam1_i2c: i2c@1 {
553 #address-cells = <1>;
554 #size-cells = <0>;
555 reg = <1>;
556 };
557
558 };
559 };
560
561 &main_i2c4 {
562 status = "okay";
563 pinctrl-names = "default";
564 pinctrl-0 = <&main_i2c4_pins_default>;
565 clock-frequency = <400000>;
566 };
567
568 &mcu_i2c0 {
569 status = "okay";
570 pinctrl-names = "default";
571 pinctrl-0 = <&mcu_i2c0_pins_default>;
572 clock-frequency = <400000>;
573 };
574
575 &mcu_i2c1 {
576 status = "okay";
577 pinctrl-names = "default";
578 pinctrl-0 = <&mcu_i2c1_pins_default>;
579 /* i2c1 is used for DVI DDC, so we nee
580 clock-frequency = <100000>;
581
582 exp2: gpio@20 {
583 compatible = "ti,tca6408";
584 reg = <0x20>;
585 gpio-controller;
586 #gpio-cells = <2>;
587 gpio-line-names = "HDMI_PDn","
588 "DP0_3V3_EN"
589 };
590 };
591
592 &main_sdhci1 {
593 /* SD card */
594 status = "okay";
595 pinctrl-0 = <&main_mmc1_pins_default>;
596 pinctrl-names = "default";
597 disable-wp;
598 vmmc-supply = <&vdd_mmc1>;
599 vqmmc-supply = <&vdd_sd_dv>;
600 };
601
602 &mcu_cpsw {
603 pinctrl-names = "default";
604 pinctrl-0 = <&mcu_cpsw_pins_default>,
605 };
606
607 &davinci_mdio {
608 phy0: ethernet-phy@0 {
609 reg = <0>;
610 ti,rx-internal-delay = <DP8386
611 ti,fifo-depth = <DP83867_PHYCR
612 ti,min-output-impedance;
613 };
614 };
615
616 &cpsw_port1 {
617 phy-mode = "rgmii-rxid";
618 phy-handle = <&phy0>;
619 };
620
621 &mcu_mcan0 {
622 status = "okay";
623 pinctrl-names = "default";
624 pinctrl-0 = <&mcu_mcan0_pins_default>;
625 phys = <&transceiver1>;
626 };
627
628 &mcu_mcan1 {
629 status = "okay";
630 pinctrl-names = "default";
631 pinctrl-0 = <&mcu_mcan1_pins_default>;
632 phys = <&transceiver2>;
633 };
634
635 &main_mcan6 {
636 status = "okay";
637 pinctrl-names = "default";
638 pinctrl-0 = <&main_mcan6_pins_default>
639 phys = <&transceiver3>;
640 };
641
642 &main_mcan7 {
643 status = "okay";
644 pinctrl-names = "default";
645 pinctrl-0 = <&main_mcan7_pins_default>
646 phys = <&transceiver4>;
647 };
648
649 &dss {
650 status = "okay";
651 pinctrl-names = "default";
652 pinctrl-0 = <&dss_vout0_pins_default>;
653 /*
654 * These clock assignments are chosen
655 *
656 * VP0 - DisplayPort SST
657 * VP1 - DPI0
658 * VP2 - DSI
659 * VP3 - DPI1
660 */
661 assigned-clocks = <&k3_clks 158 2>,
662 <&k3_clks 158 5>,
663 <&k3_clks 158 14>,
664 <&k3_clks 158 18>;
665 assigned-clock-parents = <&k3_clks 158
666 <&k3_clks 158
667 <&k3_clks 158
668 <&k3_clks 158
669 };
670
671 &dss_ports {
672 #address-cells = <1>;
673 #size-cells = <0>;
674
675 /* HDMI */
676 port@1 {
677 reg = <1>;
678
679 dpi_out0: endpoint {
680 remote-endpoint = <&tf
681 };
682 };
683 };
684
685 &serdes_ln_ctrl {
686 idle-states = <J721S2_SERDES0_LANE0_PC
687 <J721S2_SERDES0_LANE2_US
688 };
689
690 &serdes_refclk {
691 clock-frequency = <100000000>;
692 };
693
694 &serdes0 {
695 status = "okay";
696
697 serdes0_pcie_link: phy@0 {
698 reg = <0>;
699 cdns,num-lanes = <2>;
700 #phy-cells = <0>;
701 cdns,phy-type = <PHY_TYPE_PCIE
702 resets = <&serdes_wiz0 1>, <&s
703 };
704
705 serdes0_usb_link: phy@2 {
706 status = "okay";
707 reg = <2>;
708 cdns,num-lanes = <1>;
709 #phy-cells = <0>;
710 cdns,phy-type = <PHY_TYPE_USB3
711 resets = <&serdes_wiz0 3>;
712 };
713 };
714
715 &pcie1_rc {
716 status = "okay";
717 reset-gpios = <&exp1 10 GPIO_ACTIVE_HI
718 phys = <&serdes0_pcie_link>;
719 phy-names = "pcie-phy";
720 num-lanes = <2>;
721 };
722
723 &usb_serdes_mux {
724 idle-states = <0>; /* USB0 to SERDES l
725 };
726
727 &usbss0 {
728 status = "okay";
729 pinctrl-0 = <&main_usbss0_pins_default
730 pinctrl-names = "default";
731 ti,vbus-divider;
732 };
733
734 &usb0 {
735 dr_mode = "host";
736 maximum-speed = "super-speed";
737 phys = <&serdes0_usb_link>;
738 phy-names = "cdns3,usb3-phy";
739 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.