1 // SPDX-License-Identifier: GPL-2.0-only OR MI !! 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * https://beagleboard.org/ai-64 3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022-2024 Texas Instruments I !! 4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
5 * Copyright (C) 2022-2024 Jason Kridner, Beag !! 5 * Copyright (C) 2022 Jason Kridner, BeagleBoard.org Foundation
6 * Copyright (C) 2022-2024 Robert Nelson, Beag !! 6 * Copyright (C) 2022 Robert Nelson, BeagleBoard.org Foundation
7 */ 7 */
8 8
9 /dts-v1/; 9 /dts-v1/;
10 10
11 #include "k3-j721e.dtsi" 11 #include "k3-j721e.dtsi"
12 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h> 15 #include <dt-bindings/net/ti-dp83867.h>
16 #include <dt-bindings/phy/phy-cadence.h> 16 #include <dt-bindings/phy/phy-cadence.h>
17 17
18 / { 18 / {
19 compatible = "beagle,j721e-beaglebonea 19 compatible = "beagle,j721e-beagleboneai64", "ti,j721e";
20 model = "BeagleBoard.org BeagleBone AI 20 model = "BeagleBoard.org BeagleBone AI-64";
21 21
22 aliases { 22 aliases {
23 serial0 = &wkup_uart0; <<
24 serial2 = &main_uart0; 23 serial2 = &main_uart0;
25 mmc0 = &main_sdhci0; 24 mmc0 = &main_sdhci0;
26 mmc1 = &main_sdhci1; 25 mmc1 = &main_sdhci1;
27 i2c0 = &wkup_i2c0; 26 i2c0 = &wkup_i2c0;
28 i2c1 = &main_i2c6; 27 i2c1 = &main_i2c6;
29 i2c2 = &main_i2c2; 28 i2c2 = &main_i2c2;
30 i2c3 = &main_i2c4; 29 i2c3 = &main_i2c4;
31 }; 30 };
32 31
33 chosen { 32 chosen {
34 stdout-path = "serial2:115200n 33 stdout-path = "serial2:115200n8";
35 }; 34 };
36 35
37 memory@80000000 { 36 memory@80000000 {
38 device_type = "memory"; 37 device_type = "memory";
39 /* 4G RAM */ 38 /* 4G RAM */
40 reg = <0x00000000 0x80000000 0 39 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
41 <0x00000008 0x80000000 0 40 <0x00000008 0x80000000 0x00000000 0x80000000>;
42 }; 41 };
43 42
44 reserved_memory: reserved-memory { 43 reserved_memory: reserved-memory {
45 #address-cells = <2>; 44 #address-cells = <2>;
46 #size-cells = <2>; 45 #size-cells = <2>;
47 ranges; 46 ranges;
48 47
49 secure_ddr: optee@9e800000 { 48 secure_ddr: optee@9e800000 {
50 reg = <0x00 0x9e800000 49 reg = <0x00 0x9e800000 0x00 0x01800000>;
51 no-map; 50 no-map;
52 }; 51 };
53 52
54 mcu_r5fss0_core0_dma_memory_re 53 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
55 compatible = "shared-d 54 compatible = "shared-dma-pool";
56 reg = <0x00 0xa0000000 55 reg = <0x00 0xa0000000 0x00 0x100000>;
57 no-map; 56 no-map;
58 }; 57 };
59 58
60 mcu_r5fss0_core0_memory_region 59 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
61 compatible = "shared-d 60 compatible = "shared-dma-pool";
62 reg = <0x00 0xa0100000 61 reg = <0x00 0xa0100000 0x00 0xf00000>;
63 no-map; 62 no-map;
64 }; 63 };
65 64
66 mcu_r5fss0_core1_dma_memory_re 65 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
67 compatible = "shared-d 66 compatible = "shared-dma-pool";
68 reg = <0x00 0xa1000000 67 reg = <0x00 0xa1000000 0x00 0x100000>;
69 no-map; 68 no-map;
70 }; 69 };
71 70
72 mcu_r5fss0_core1_memory_region 71 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
73 compatible = "shared-d 72 compatible = "shared-dma-pool";
74 reg = <0x00 0xa1100000 73 reg = <0x00 0xa1100000 0x00 0xf00000>;
75 no-map; 74 no-map;
76 }; 75 };
77 76
78 main_r5fss0_core0_dma_memory_r 77 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
79 compatible = "shared-d 78 compatible = "shared-dma-pool";
80 reg = <0x00 0xa2000000 79 reg = <0x00 0xa2000000 0x00 0x100000>;
81 no-map; 80 no-map;
82 }; 81 };
83 82
84 main_r5fss0_core0_memory_regio 83 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
85 compatible = "shared-d 84 compatible = "shared-dma-pool";
86 reg = <0x00 0xa2100000 85 reg = <0x00 0xa2100000 0x00 0xf00000>;
87 no-map; 86 no-map;
88 }; 87 };
89 88
90 main_r5fss0_core1_dma_memory_r 89 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
91 compatible = "shared-d 90 compatible = "shared-dma-pool";
92 reg = <0x00 0xa3000000 91 reg = <0x00 0xa3000000 0x00 0x100000>;
93 no-map; 92 no-map;
94 }; 93 };
95 94
96 main_r5fss0_core1_memory_regio 95 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
97 compatible = "shared-d 96 compatible = "shared-dma-pool";
98 reg = <0x00 0xa3100000 97 reg = <0x00 0xa3100000 0x00 0xf00000>;
99 no-map; 98 no-map;
100 }; 99 };
101 100
102 main_r5fss1_core0_dma_memory_r 101 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
103 compatible = "shared-d 102 compatible = "shared-dma-pool";
104 reg = <0x00 0xa4000000 103 reg = <0x00 0xa4000000 0x00 0x100000>;
105 no-map; 104 no-map;
106 }; 105 };
107 106
108 main_r5fss1_core0_memory_regio 107 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
109 compatible = "shared-d 108 compatible = "shared-dma-pool";
110 reg = <0x00 0xa4100000 109 reg = <0x00 0xa4100000 0x00 0xf00000>;
111 no-map; 110 no-map;
112 }; 111 };
113 112
114 main_r5fss1_core1_dma_memory_r 113 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
115 compatible = "shared-d 114 compatible = "shared-dma-pool";
116 reg = <0x00 0xa5000000 115 reg = <0x00 0xa5000000 0x00 0x100000>;
117 no-map; 116 no-map;
118 }; 117 };
119 118
120 main_r5fss1_core1_memory_regio 119 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
121 compatible = "shared-d 120 compatible = "shared-dma-pool";
122 reg = <0x00 0xa5100000 121 reg = <0x00 0xa5100000 0x00 0xf00000>;
123 no-map; 122 no-map;
124 }; 123 };
125 124
126 c66_0_dma_memory_region: c66-d !! 125 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
127 compatible = "shared-d 126 compatible = "shared-dma-pool";
128 reg = <0x00 0xa6000000 127 reg = <0x00 0xa6000000 0x00 0x100000>;
129 no-map; 128 no-map;
130 }; 129 };
131 130
132 c66_0_memory_region: c66-memor 131 c66_0_memory_region: c66-memory@a6100000 {
133 compatible = "shared-d 132 compatible = "shared-dma-pool";
134 reg = <0x00 0xa6100000 133 reg = <0x00 0xa6100000 0x00 0xf00000>;
135 no-map; 134 no-map;
136 }; 135 };
137 136
138 c66_1_dma_memory_region: c66-d !! 137 c66_0_dma_memory_region: c66-dma-memory@a7000000 {
139 compatible = "shared-d 138 compatible = "shared-dma-pool";
140 reg = <0x00 0xa7000000 139 reg = <0x00 0xa7000000 0x00 0x100000>;
141 no-map; 140 no-map;
142 }; 141 };
143 142
144 c66_1_memory_region: c66-memor 143 c66_1_memory_region: c66-memory@a7100000 {
145 compatible = "shared-d 144 compatible = "shared-dma-pool";
146 reg = <0x00 0xa7100000 145 reg = <0x00 0xa7100000 0x00 0xf00000>;
147 no-map; 146 no-map;
148 }; 147 };
149 148
150 c71_0_dma_memory_region: c71-d 149 c71_0_dma_memory_region: c71-dma-memory@a8000000 {
151 compatible = "shared-d 150 compatible = "shared-dma-pool";
152 reg = <0x00 0xa8000000 151 reg = <0x00 0xa8000000 0x00 0x100000>;
153 no-map; 152 no-map;
154 }; 153 };
155 154
156 c71_0_memory_region: c71-memor 155 c71_0_memory_region: c71-memory@a8100000 {
157 compatible = "shared-d 156 compatible = "shared-dma-pool";
158 reg = <0x00 0xa8100000 157 reg = <0x00 0xa8100000 0x00 0xf00000>;
159 no-map; 158 no-map;
160 }; 159 };
161 160
162 rtos_ipc_memory_region: ipc-me 161 rtos_ipc_memory_region: ipc-memories@aa000000 {
163 reg = <0x00 0xaa000000 162 reg = <0x00 0xaa000000 0x00 0x01c00000>;
164 alignment = <0x1000>; 163 alignment = <0x1000>;
165 no-map; 164 no-map;
166 }; 165 };
167 }; 166 };
168 167
169 gpio_keys: gpio-keys { 168 gpio_keys: gpio-keys {
170 compatible = "gpio-keys"; 169 compatible = "gpio-keys";
171 pinctrl-names = "default"; 170 pinctrl-names = "default";
172 pinctrl-0 = <&sw_pwr_pins_defa 171 pinctrl-0 = <&sw_pwr_pins_default>;
173 172
174 button-1 { 173 button-1 {
175 label = "BOOT"; 174 label = "BOOT";
176 linux,code = <BTN_0>; 175 linux,code = <BTN_0>;
177 gpios = <&wkup_gpio0 0 176 gpios = <&wkup_gpio0 0 GPIO_ACTIVE_LOW>;
178 }; 177 };
179 178
180 button-2 { 179 button-2 {
181 label = "POWER"; 180 label = "POWER";
182 linux,code = <KEY_POWE 181 linux,code = <KEY_POWER>;
183 gpios = <&wkup_gpio0 4 182 gpios = <&wkup_gpio0 4 GPIO_ACTIVE_LOW>;
184 }; 183 };
185 }; 184 };
186 185
187 leds { 186 leds {
188 compatible = "gpio-leds"; 187 compatible = "gpio-leds";
189 pinctrl-names = "default"; 188 pinctrl-names = "default";
190 pinctrl-0 = <&led_pins_default 189 pinctrl-0 = <&led_pins_default>;
191 190
192 led-0 { 191 led-0 {
193 gpios = <&main_gpio0 9 192 gpios = <&main_gpio0 96 GPIO_ACTIVE_HIGH>;
194 function = LED_FUNCTIO 193 function = LED_FUNCTION_HEARTBEAT;
195 linux,default-trigger 194 linux,default-trigger = "heartbeat";
196 }; 195 };
197 196
198 led-1 { 197 led-1 {
199 gpios = <&main_gpio0 9 198 gpios = <&main_gpio0 95 GPIO_ACTIVE_HIGH>;
200 function = LED_FUNCTIO 199 function = LED_FUNCTION_DISK_ACTIVITY;
201 linux,default-trigger 200 linux,default-trigger = "mmc0";
202 }; 201 };
203 202
204 led-2 { 203 led-2 {
205 gpios = <&main_gpio0 9 204 gpios = <&main_gpio0 97 GPIO_ACTIVE_HIGH>;
206 function = LED_FUNCTIO 205 function = LED_FUNCTION_CPU;
207 linux,default-trigger 206 linux,default-trigger = "cpu";
208 }; 207 };
209 208
210 led-3 { 209 led-3 {
211 gpios = <&main_gpio0 1 210 gpios = <&main_gpio0 110 GPIO_ACTIVE_HIGH>;
212 function = LED_FUNCTIO 211 function = LED_FUNCTION_DISK_ACTIVITY;
213 linux,default-trigger 212 linux,default-trigger = "mmc1";
214 }; 213 };
215 214
216 led-4 { 215 led-4 {
217 gpios = <&main_gpio0 1 216 gpios = <&main_gpio0 109 GPIO_ACTIVE_HIGH>;
218 function = LED_FUNCTIO 217 function = LED_FUNCTION_WLAN;
219 default-state = "off"; 218 default-state = "off";
220 }; 219 };
221 }; 220 };
222 221
223 evm_12v0: regulator-0 { 222 evm_12v0: regulator-0 {
224 /* main supply */ 223 /* main supply */
225 compatible = "regulator-fixed" 224 compatible = "regulator-fixed";
226 regulator-name = "evm_12v0"; 225 regulator-name = "evm_12v0";
227 regulator-min-microvolt = <120 226 regulator-min-microvolt = <12000000>;
228 regulator-max-microvolt = <120 227 regulator-max-microvolt = <12000000>;
229 regulator-always-on; 228 regulator-always-on;
230 regulator-boot-on; 229 regulator-boot-on;
231 }; 230 };
232 231
233 vsys_3v3: regulator-1 { 232 vsys_3v3: regulator-1 {
234 /* Output of LMS140 */ 233 /* Output of LMS140 */
235 compatible = "regulator-fixed" 234 compatible = "regulator-fixed";
236 regulator-name = "vsys_3v3"; 235 regulator-name = "vsys_3v3";
237 regulator-min-microvolt = <330 236 regulator-min-microvolt = <3300000>;
238 regulator-max-microvolt = <330 237 regulator-max-microvolt = <3300000>;
239 vin-supply = <&evm_12v0>; 238 vin-supply = <&evm_12v0>;
240 regulator-always-on; 239 regulator-always-on;
241 regulator-boot-on; 240 regulator-boot-on;
242 }; 241 };
243 242
244 vsys_5v0: regulator-2 { 243 vsys_5v0: regulator-2 {
245 /* Output of LM5140 */ 244 /* Output of LM5140 */
246 compatible = "regulator-fixed" 245 compatible = "regulator-fixed";
247 regulator-name = "vsys_5v0"; 246 regulator-name = "vsys_5v0";
248 regulator-min-microvolt = <500 247 regulator-min-microvolt = <5000000>;
249 regulator-max-microvolt = <500 248 regulator-max-microvolt = <5000000>;
250 vin-supply = <&evm_12v0>; 249 vin-supply = <&evm_12v0>;
251 regulator-always-on; 250 regulator-always-on;
252 regulator-boot-on; 251 regulator-boot-on;
253 }; 252 };
254 253
255 vdd_mmc1: regulator-3 { 254 vdd_mmc1: regulator-3 {
256 compatible = "regulator-fixed" 255 compatible = "regulator-fixed";
257 pinctrl-names = "default"; 256 pinctrl-names = "default";
258 pinctrl-0 = <&sd_pwr_en_pins_d 257 pinctrl-0 = <&sd_pwr_en_pins_default>;
259 regulator-name = "vdd_mmc1"; 258 regulator-name = "vdd_mmc1";
260 regulator-min-microvolt = <330 259 regulator-min-microvolt = <3300000>;
261 regulator-max-microvolt = <330 260 regulator-max-microvolt = <3300000>;
262 regulator-boot-on; 261 regulator-boot-on;
263 enable-active-high; 262 enable-active-high;
264 vin-supply = <&vsys_3v3>; 263 vin-supply = <&vsys_3v3>;
265 gpio = <&main_gpio0 82 GPIO_AC 264 gpio = <&main_gpio0 82 GPIO_ACTIVE_HIGH>;
266 }; 265 };
267 266
268 vdd_sd_dv_alt: regulator-4 { 267 vdd_sd_dv_alt: regulator-4 {
269 compatible = "regulator-gpio"; 268 compatible = "regulator-gpio";
270 pinctrl-names = "default"; 269 pinctrl-names = "default";
271 pinctrl-0 = <&vdd_sd_dv_alt_pi 270 pinctrl-0 = <&vdd_sd_dv_alt_pins_default>;
272 regulator-name = "tlv71033"; 271 regulator-name = "tlv71033";
273 regulator-min-microvolt = <180 272 regulator-min-microvolt = <1800000>;
274 regulator-max-microvolt = <330 273 regulator-max-microvolt = <3300000>;
275 regulator-boot-on; 274 regulator-boot-on;
276 vin-supply = <&vsys_5v0>; 275 vin-supply = <&vsys_5v0>;
277 gpios = <&main_gpio0 117 GPIO_ 276 gpios = <&main_gpio0 117 GPIO_ACTIVE_HIGH>;
278 states = <1800000 0x0>, 277 states = <1800000 0x0>,
279 <3300000 0x1>; 278 <3300000 0x1>;
280 }; 279 };
281 280
282 dp_pwr_3v3: regulator-5 { 281 dp_pwr_3v3: regulator-5 {
283 compatible = "regulator-fixed" 282 compatible = "regulator-fixed";
284 pinctrl-names = "default"; 283 pinctrl-names = "default";
285 pinctrl-0 = <&dp0_3v3_en_pins_ 284 pinctrl-0 = <&dp0_3v3_en_pins_default>;
286 regulator-name = "dp-pwr"; 285 regulator-name = "dp-pwr";
287 regulator-min-microvolt = <330 286 regulator-min-microvolt = <3300000>;
288 regulator-max-microvolt = <330 287 regulator-max-microvolt = <3300000>;
289 gpio = <&main_gpio0 49 GPIO_AC 288 gpio = <&main_gpio0 49 GPIO_ACTIVE_HIGH>; /* DP0_PWR_SW_EN */
290 enable-active-high; 289 enable-active-high;
291 }; 290 };
292 291
293 dp0: connector { 292 dp0: connector {
294 compatible = "dp-connector"; 293 compatible = "dp-connector";
295 label = "DP0"; 294 label = "DP0";
296 type = "full-size"; 295 type = "full-size";
297 dp-pwr-supply = <&dp_pwr_3v3>; 296 dp-pwr-supply = <&dp_pwr_3v3>;
298 297
299 port { 298 port {
300 dp_connector_in: endpo 299 dp_connector_in: endpoint {
301 remote-endpoin 300 remote-endpoint = <&dp0_out>;
302 }; 301 };
303 }; 302 };
304 }; 303 };
305 }; 304 };
306 305
307 &main_pmx0 { 306 &main_pmx0 {
308 led_pins_default: led-default-pins { !! 307 led_pins_default: led-pins-default {
309 pinctrl-single,pins = < 308 pinctrl-single,pins = <
310 J721E_IOPAD(0x184, PIN 309 J721E_IOPAD(0x184, PIN_INPUT, 7) /* (T23) RGMII5_RD0.GPIO0_96 */
311 J721E_IOPAD(0x180, PIN 310 J721E_IOPAD(0x180, PIN_INPUT, 7) /* (R23) RGMII5_RD1.GPIO0_95 */
312 J721E_IOPAD(0x188, PIN 311 J721E_IOPAD(0x188, PIN_INPUT, 7) /* (Y28) RGMII6_TX_CTL.GPIO0_97 */
313 J721E_IOPAD(0x1bc, PIN 312 J721E_IOPAD(0x1bc, PIN_INPUT, 7) /* (V24) MDIO0_MDC.GPIO0_110 */
314 J721E_IOPAD(0x1b8, PIN 313 J721E_IOPAD(0x1b8, PIN_INPUT, 7) /* (V26) MDIO0_MDIO.GPIO0_109 */
315 >; 314 >;
316 }; 315 };
317 316
318 main_mmc1_pins_default: main-mmc1-defa !! 317 main_mmc1_pins_default: main-mmc1-pins-default {
319 pinctrl-single,pins = < 318 pinctrl-single,pins = <
320 J721E_IOPAD(0x254, PIN 319 J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
321 J721E_IOPAD(0x250, PIN 320 J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
322 J721E_IOPAD(0x2ac, PIN 321 J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
323 J721E_IOPAD(0x24c, PIN 322 J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
324 J721E_IOPAD(0x248, PIN 323 J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
325 J721E_IOPAD(0x244, PIN 324 J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
326 J721E_IOPAD(0x240, PIN 325 J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
327 J721E_IOPAD(0x258, PIN 326 J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
328 >; 327 >;
329 }; 328 };
330 329
331 main_uart0_pins_default: main-uart0-de !! 330 main_uart0_pins_default: main-uart0-pins-default {
332 pinctrl-single,pins = < 331 pinctrl-single,pins = <
333 J721E_IOPAD(0x1e8, PIN 332 J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
334 J721E_IOPAD(0x1ec, PIN 333 J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
335 >; 334 >;
336 }; 335 };
337 336
338 sd_pwr_en_pins_default: sd-pwr-en-defa !! 337 sd_pwr_en_pins_default: sd-pwr-en-pins-default {
339 pinctrl-single,pins = < 338 pinctrl-single,pins = <
340 J721E_IOPAD(0x14c, PIN 339 J721E_IOPAD(0x14c, PIN_INPUT, 7) /* (AA29) PRG0_PRU1_GPO19.GPIO0_82 */
341 >; 340 >;
342 }; 341 };
343 342
344 vdd_sd_dv_alt_pins_default: vdd-sd-dv- !! 343 vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-pins-default {
345 pinctrl-single,pins = < 344 pinctrl-single,pins = <
346 J721E_IOPAD(0x1d8, PIN 345 J721E_IOPAD(0x1d8, PIN_INPUT, 7) /* (W4) SPI1_CS1.GPIO0_117 */
347 >; 346 >;
348 }; 347 };
349 348
350 main_usbss0_pins_default: main-usbss0- !! 349 main_usbss0_pins_default: main-usbss0-pins-default {
351 pinctrl-single,pins = < 350 pinctrl-single,pins = <
352 J721E_IOPAD(0x210, PIN 351 J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 - USBC_DIR */
353 >; 352 >;
354 }; 353 };
355 354
356 main_usbss1_pins_default: main-usbss1- !! 355 main_usbss1_pins_default: main-usbss1-pins-default {
357 pinctrl-single,pins = < 356 pinctrl-single,pins = <
358 J721E_IOPAD(0x290, INP 357 J721E_IOPAD(0x290, INPUT_DISABLE, 1) /* (U6) USB0_DRVVBUS.USB1_DRVVBUS */
359 >; 358 >;
360 }; 359 };
361 360
362 dp0_3v3_en_pins_default:dp0-3v3-en-def !! 361 dp0_3v3_en_pins_default:dp0-3v3-en-pins-default {
363 pinctrl-single,pins = < 362 pinctrl-single,pins = <
364 J721E_IOPAD(0xc8, PIN_ 363 J721E_IOPAD(0xc8, PIN_INPUT, 7) /* (AE26) PRG0_PRU0_GPO6.GPIO0_49 */
365 >; 364 >;
366 }; 365 };
367 366
368 dp0_pins_default: dp0-default-pins { !! 367 dp0_pins_default: dp0-pins-default {
369 pinctrl-single,pins = < 368 pinctrl-single,pins = <
370 J721E_IOPAD(0x1c4, PIN 369 J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* (Y4) SPI0_CS1.DP0_HPD */
371 >; 370 >;
372 }; 371 };
373 372
374 main_i2c0_pins_default: main-i2c0-defa !! 373 main_i2c0_pins_default: main-i2c0-pins-default {
375 pinctrl-single,pins = < 374 pinctrl-single,pins = <
376 J721E_IOPAD(0x220, PIN 375 J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
377 J721E_IOPAD(0x224, PIN 376 J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
378 >; 377 >;
379 }; 378 };
380 379
381 main_i2c1_pins_default: main-i2c1-defa !! 380 main_i2c1_pins_default: main-i2c1-pins-default {
382 pinctrl-single,pins = < 381 pinctrl-single,pins = <
383 J721E_IOPAD(0x228, PIN 382 J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */
384 J721E_IOPAD(0x22c, PIN 383 J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */
385 >; 384 >;
386 }; 385 };
387 386
388 main_i2c2_pins_default: main-i2c2-defa !! 387 main_i2c2_pins_default: main-i2c2-pins-default {
389 pinctrl-single,pins = < 388 pinctrl-single,pins = <
390 J721E_IOPAD(0x208, PIN 389 J721E_IOPAD(0x208, PIN_INPUT_PULLUP, 4) /* (W5) MCAN0_RX.I2C2_SCL */
391 J721E_IOPAD(0x20c, PIN 390 J721E_IOPAD(0x20c, PIN_INPUT_PULLUP, 4) /* (W6) MCAN0_TX.I2C2_SDA */
392 J721E_IOPAD(0x138, PIN 391 J721E_IOPAD(0x138, PIN_INPUT, 7) /* (AE25) PRG0_PRU1_GPO14.GPIO0_77 */
393 J721E_IOPAD(0x13c, PIN 392 J721E_IOPAD(0x13c, PIN_INPUT, 7) /* (AF29) PRG0_PRU1_GPO15.GPIO0_78 */
394 >; 393 >;
395 }; 394 };
396 395
397 main_i2c3_pins_default: main-i2c3-defa !! 396 main_i2c3_pins_default: main-i2c3-pins-default {
398 pinctrl-single,pins = < 397 pinctrl-single,pins = <
399 J721E_IOPAD(0x270, PIN 398 J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */
400 J721E_IOPAD(0x274, PIN 399 J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */
401 >; 400 >;
402 }; 401 };
403 402
404 main_i2c4_pins_default: main-i2c4-defa !! 403 main_i2c4_pins_default: main-i2c4-pins-default {
405 pinctrl-single,pins = < 404 pinctrl-single,pins = <
406 J721E_IOPAD(0x1e0, PIN 405 J721E_IOPAD(0x1e0, PIN_INPUT_PULLUP, 2) /* (Y5) SPI1_D0.I2C4_SCL */
407 J721E_IOPAD(0x1dc, PIN 406 J721E_IOPAD(0x1dc, PIN_INPUT_PULLUP, 2) /* (Y1) SPI1_CLK.I2C4_SDA */
408 J721E_IOPAD(0x30, PIN_ 407 J721E_IOPAD(0x30, PIN_INPUT, 7) /* (AF24) PRG1_PRU0_GPO11.GPIO0_12 */
409 J721E_IOPAD(0x34, PIN_ 408 J721E_IOPAD(0x34, PIN_INPUT, 7) /* (AJ24) PRG1_PRU0_GPO12.GPIO0_13 */
410 >; 409 >;
411 }; 410 };
412 411
413 main_i2c5_pins_default: main-i2c5-defa !! 412 main_i2c5_pins_default: main-i2c5-pins-default {
414 pinctrl-single,pins = < 413 pinctrl-single,pins = <
415 J721E_IOPAD(0x150, PIN 414 J721E_IOPAD(0x150, PIN_INPUT_PULLUP, 2) /* (Y26) PRG0_MDIO0_MDIO.I2C5_SCL */
416 J721E_IOPAD(0x154, PIN 415 J721E_IOPAD(0x154, PIN_INPUT_PULLUP, 2) /* (AA27) PRG0_MDIO0_MDC.I2C5_SDA */
417 >; 416 >;
418 }; 417 };
419 418
420 main_i2c6_pins_default: main-i2c6-defa !! 419 main_i2c6_pins_default: main-i2c6-pins-default {
421 pinctrl-single,pins = < 420 pinctrl-single,pins = <
422 J721E_IOPAD(0x1d0, PIN 421 J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */
423 J721E_IOPAD(0x1e4, PIN 422 J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */
424 J721E_IOPAD(0x74, PIN_ 423 J721E_IOPAD(0x74, PIN_INPUT, 7) /* (AC21) PRG1_PRU1_GPO7.GPIO0_28 */
425 J721E_IOPAD(0xa4, PIN_ 424 J721E_IOPAD(0xa4, PIN_INPUT, 7) /* (AH22) PRG1_PRU1_GPO19.GPIO0_40 */
426 >; 425 >;
427 }; 426 };
428 427
429 csi0_gpio_pins_default: csi0-gpio-defa !! 428 csi0_gpio_pins_default: csi0-gpio-pins-default {
430 pinctrl-single,pins = < 429 pinctrl-single,pins = <
431 J721E_IOPAD(0x19c, PIN 430 J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 7) /* (W27) RGMII6_TD0.GPIO0_102 */
432 J721E_IOPAD(0x1a0, PIN 431 J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 7) /* (W29) RGMII6_TXC.GPIO0_103 */
433 >; 432 >;
434 }; 433 };
435 434
436 csi1_gpio_pins_default: csi1-gpio-defa !! 435 csi1_gpio_pins_default: csi1-gpio-pins-default {
437 pinctrl-single,pins = < 436 pinctrl-single,pins = <
438 J721E_IOPAD(0x198, PIN 437 J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 7) /* (V25) RGMII6_TD1.GPIO0_101 */
439 J721E_IOPAD(0x1b0, PIN 438 J721E_IOPAD(0x1b0, PIN_INPUT_PULLDOWN, 7) /* (W24) RGMII6_RD1.GPIO0_107 */
440 >; 439 >;
441 }; 440 };
442 441
443 pcie1_rst_pins_default: pcie1-rst-defa !! 442 pcie1_rst_pins_default: pcie1-rst-pins-default {
444 pinctrl-single,pins = < 443 pinctrl-single,pins = <
445 J721E_IOPAD(0x5c, PIN_ 444 J721E_IOPAD(0x5c, PIN_INPUT, 7) /* (AG23) PRG1_PRU1_GPO1.GPIO0_22 */
446 >; 445 >;
447 }; 446 };
448 }; 447 };
449 448
450 &wkup_pmx0 { 449 &wkup_pmx0 {
451 eeprom_wp_pins_default: eeprom-wp-defa !! 450 eeprom_wp_pins_default: eeprom-wp-pins-default {
452 pinctrl-single,pins = < 451 pinctrl-single,pins = <
453 J721E_WKUP_IOPAD(0xc4, 452 J721E_WKUP_IOPAD(0xc4, PIN_OUTPUT_PULLUP, 7) /* (G24) WKUP_GPIO0_5 */
454 >; 453 >;
455 }; 454 };
456 455
457 mcu_adc0_pins_default: mcu-adc0-defaul !! 456 mcu_adc0_pins_default: mcu-adc0-pins-default {
458 pinctrl-single,pins = < 457 pinctrl-single,pins = <
459 J721E_WKUP_IOPAD(0x130 458 J721E_WKUP_IOPAD(0x130, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN0 */
460 J721E_WKUP_IOPAD(0x134 459 J721E_WKUP_IOPAD(0x134, PIN_INPUT, 0) /* (K26) MCU_ADC0_AIN1 */
461 J721E_WKUP_IOPAD(0x138 460 J721E_WKUP_IOPAD(0x138, PIN_INPUT, 0) /* (K28) MCU_ADC0_AIN2 */
462 J721E_WKUP_IOPAD(0x13c 461 J721E_WKUP_IOPAD(0x13c, PIN_INPUT, 0) /* (L28) MCU_ADC0_AIN3 */
463 J721E_WKUP_IOPAD(0x140 462 J721E_WKUP_IOPAD(0x140, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN4 */
464 J721E_WKUP_IOPAD(0x144 463 J721E_WKUP_IOPAD(0x144, PIN_INPUT, 0) /* (K27) MCU_ADC0_AIN5 */
465 J721E_WKUP_IOPAD(0x148 464 J721E_WKUP_IOPAD(0x148, PIN_INPUT, 0) /* (K29) MCU_ADC0_AIN6 */
466 >; 465 >;
467 }; 466 };
468 467
469 mcu_adc1_pins_default: mcu-adc1-defaul !! 468 mcu_adc1_pins_default: mcu-adc1-pins-default {
470 pinctrl-single,pins = < 469 pinctrl-single,pins = <
471 J721E_WKUP_IOPAD(0x150 470 J721E_WKUP_IOPAD(0x150, PIN_INPUT, 0) /* (N23) MCU_ADC1_AIN0 */
472 >; 471 >;
473 }; 472 };
474 473
475 mikro_bus_pins_default: mikro-bus-defa !! 474 mikro_bus_pins_default: mikro-bus-pins-default {
476 pinctrl-single,pins = < 475 pinctrl-single,pins = <
477 J721E_WKUP_IOPAD(0x108 476 J721E_WKUP_IOPAD(0x108, PIN_INPUT, 7) /* SDAPULLEN (E26) PMIC_POWER_EN0.WKUP_GPIO0_66 */
478 J721E_WKUP_IOPAD(0xd4, 477 J721E_WKUP_IOPAD(0xd4, PIN_INPUT, 7) /* SDA (G26) WKUP_GPIO0_9.MCU_I2C1_SDA */
479 J721E_WKUP_IOPAD(0xf4, 478 J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 7) /* SDA (D25) MCU_I3C0_SDA.WKUP_GPIO0_61 */
480 J721E_WKUP_IOPAD(0xd0, 479 J721E_WKUP_IOPAD(0xd0, PIN_INPUT, 7) /* SCL (G27) WKUP_GPIO0_8.MCU_I2C1_SCL */
481 J721E_WKUP_IOPAD(0xf0, 480 J721E_WKUP_IOPAD(0xf0, PIN_INPUT, 7) /* SCL (D26) MCU_I3C0_SCL.WKUP_GPIO0_60 */
482 481
483 J721E_WKUP_IOPAD(0xb8, 482 J721E_WKUP_IOPAD(0xb8, PIN_INPUT, 7) /* MOSI (F28) WKUP_GPIO0_2.MCU_SPI1_D1 */
484 J721E_WKUP_IOPAD(0xb4, 483 J721E_WKUP_IOPAD(0xb4, PIN_INPUT, 7) /* MISO (F25) WKUP_GPIO0_1.MCU_SPI1_D0 */
485 J721E_WKUP_IOPAD(0xb0, 484 J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 7) /* CLK (F26) WKUP_GPIO0_0.MCU_SPI1_CLK */
486 J721E_WKUP_IOPAD(0xbc, 485 J721E_WKUP_IOPAD(0xbc, PIN_INPUT, 7) /* CS (F27) WKUP_GPIO0_3.MCU_SPI1_CS0 */
487 486
488 J721E_WKUP_IOPAD(0x44, 487 J721E_WKUP_IOPAD(0x44, PIN_INPUT, 7) /* RX (G22) MCU_OSPI1_D1.WKUP_GPIO0_33 */
489 J721E_WKUP_IOPAD(0x48, 488 J721E_WKUP_IOPAD(0x48, PIN_INPUT, 7) /* TX (D23) MCU_OSPI1_D2.WKUP_GPIO0_34 */
490 489
491 J721E_WKUP_IOPAD(0x4c, 490 J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 7) /* INT (C23) MCU_OSPI1_D3.WKUP_GPIO0_35 */
492 J721E_WKUP_IOPAD(0x54, 491 J721E_WKUP_IOPAD(0x54, PIN_INPUT, 7) /* RST (E22) MCU_OSPI1_CSn1.WKUP_GPIO0_37 */
493 J721E_WKUP_IOPAD(0xdc, 492 J721E_WKUP_IOPAD(0xdc, PIN_INPUT, 7) /* PWM (H27) WKUP_GPIO0_11 */
494 J721E_WKUP_IOPAD(0xac, 493 J721E_WKUP_IOPAD(0xac, PIN_INPUT, 7) /* AN (C29) MCU_MCAN0_RX.WKUP_GPIO0_59 */
495 >; 494 >;
496 }; 495 };
497 496
498 mcu_cpsw_pins_default: mcu-cpsw-defaul !! 497 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
499 pinctrl-single,pins = < 498 pinctrl-single,pins = <
500 J721E_WKUP_IOPAD(0x84, 499 J721E_WKUP_IOPAD(0x84, PIN_INPUT, 0) /* (B24) MCU_RGMII1_RD0 */
501 J721E_WKUP_IOPAD(0x80, 500 J721E_WKUP_IOPAD(0x80, PIN_INPUT, 0) /* (A24) MCU_RGMII1_RD1 */
502 J721E_WKUP_IOPAD(0x7c, 501 J721E_WKUP_IOPAD(0x7c, PIN_INPUT, 0) /* (D24) MCU_RGMII1_RD2 */
503 J721E_WKUP_IOPAD(0x78, 502 J721E_WKUP_IOPAD(0x78, PIN_INPUT, 0) /* (A25) MCU_RGMII1_RD3 */
504 J721E_WKUP_IOPAD(0x74, 503 J721E_WKUP_IOPAD(0x74, PIN_INPUT, 0) /* (C24) MCU_RGMII1_RXC */
505 J721E_WKUP_IOPAD(0x5c, 504 J721E_WKUP_IOPAD(0x5c, PIN_INPUT, 0) /* (C25) MCU_RGMII1_RX_CTL */
506 J721E_WKUP_IOPAD(0x6c, 505 J721E_WKUP_IOPAD(0x6c, PIN_OUTPUT, 0) /* (B25) MCU_RGMII1_TD0 */
507 J721E_WKUP_IOPAD(0x68, 506 J721E_WKUP_IOPAD(0x68, PIN_OUTPUT, 0) /* (A26) MCU_RGMII1_TD1 */
508 J721E_WKUP_IOPAD(0x64, 507 J721E_WKUP_IOPAD(0x64, PIN_OUTPUT, 0) /* (A27) MCU_RGMII1_TD2 */
509 J721E_WKUP_IOPAD(0x60, 508 J721E_WKUP_IOPAD(0x60, PIN_OUTPUT, 0) /* (A28) MCU_RGMII1_TD3 */
510 J721E_WKUP_IOPAD(0x70, 509 J721E_WKUP_IOPAD(0x70, PIN_OUTPUT, 0) /* (B26) MCU_RGMII1_TXC */
511 J721E_WKUP_IOPAD(0x58, 510 J721E_WKUP_IOPAD(0x58, PIN_OUTPUT, 0) /* (B27) MCU_RGMII1_TX_CTL */
512 >; 511 >;
513 }; 512 };
514 513
515 mcu_mdio_pins_default: mcu-mdio1-defau !! 514 mcu_mdio_pins_default: mcu-mdio1-pins-default {
516 pinctrl-single,pins = < 515 pinctrl-single,pins = <
517 J721E_WKUP_IOPAD(0x8c, 516 J721E_WKUP_IOPAD(0x8c, PIN_OUTPUT, 0) /* (F23) MCU_MDIO0_MDC */
518 J721E_WKUP_IOPAD(0x88, 517 J721E_WKUP_IOPAD(0x88, PIN_INPUT, 0) /* (E23) MCU_MDIO0_MDIO */
519 >; 518 >;
520 }; 519 };
521 520
522 sw_pwr_pins_default: sw-pwr-default-pi !! 521 sw_pwr_pins_default: sw-pwr-pins-default {
523 pinctrl-single,pins = < 522 pinctrl-single,pins = <
524 J721E_WKUP_IOPAD(0xc0, 523 J721E_WKUP_IOPAD(0xc0, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_4 */
525 >; 524 >;
526 }; 525 };
527 526
528 wkup_i2c0_pins_default: wkup-i2c0-defa !! 527 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
529 pinctrl-single,pins = < 528 pinctrl-single,pins = <
530 J721E_WKUP_IOPAD(0xf8, 529 J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
531 J721E_WKUP_IOPAD(0xfc, 530 J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
532 >; 531 >;
533 }; 532 };
534 533
535 wkup_uart0_pins_default: wkup-uart0-de !! 534 mcu_usbss1_pins_default: mcu-usbss1-pins-default {
536 pinctrl-single,pins = < <<
537 J721E_WKUP_IOPAD(0xa0, <<
538 J721E_WKUP_IOPAD(0xa4, <<
539 >; <<
540 }; <<
541 <<
542 mcu_usbss1_pins_default: mcu-usbss1-de <<
543 pinctrl-single,pins = < 535 pinctrl-single,pins = <
544 J721E_WKUP_IOPAD(0x3c, 536 J721E_WKUP_IOPAD(0x3c, PIN_OUTPUT_PULLUP, 5) /* (A23) MCU_OSPI1_LBCLKO.WKUP_GPIO0_30 */
545 >; 537 >;
546 }; 538 };
547 }; 539 };
548 540
549 &wkup_uart0 { 541 &wkup_uart0 {
550 /* Wakeup UART is used by TIFS firmwar 542 /* Wakeup UART is used by TIFS firmware. */
551 status = "reserved"; 543 status = "reserved";
552 pinctrl-names = "default"; <<
553 pinctrl-0 = <&wkup_uart0_pins_default> <<
554 }; 544 };
555 545
556 &main_uart0 { 546 &main_uart0 {
557 status = "okay"; 547 status = "okay";
558 pinctrl-names = "default"; 548 pinctrl-names = "default";
559 pinctrl-0 = <&main_uart0_pins_default> 549 pinctrl-0 = <&main_uart0_pins_default>;
560 /* Shared with ATF on this platform */ 550 /* Shared with ATF on this platform */
561 power-domains = <&k3_pds 146 TI_SCI_PD 551 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
562 }; 552 };
563 553
564 &main_sdhci0 { 554 &main_sdhci0 {
565 /* eMMC */ 555 /* eMMC */
566 status = "okay"; <<
567 non-removable; 556 non-removable;
568 ti,driver-strength-ohm = <50>; 557 ti,driver-strength-ohm = <50>;
569 disable-wp; 558 disable-wp;
570 }; 559 };
571 560
572 &main_sdhci1 { 561 &main_sdhci1 {
573 /* SD Card */ 562 /* SD Card */
574 status = "okay"; <<
575 vmmc-supply = <&vdd_mmc1>; 563 vmmc-supply = <&vdd_mmc1>;
576 vqmmc-supply = <&vdd_sd_dv_alt>; 564 vqmmc-supply = <&vdd_sd_dv_alt>;
577 pinctrl-names = "default"; 565 pinctrl-names = "default";
578 pinctrl-0 = <&main_mmc1_pins_default>; 566 pinctrl-0 = <&main_mmc1_pins_default>;
579 ti,driver-strength-ohm = <50>; 567 ti,driver-strength-ohm = <50>;
580 disable-wp; 568 disable-wp;
581 }; 569 };
582 570
>> 571 &main_sdhci2 {
>> 572 /* Unused */
>> 573 status = "disabled";
>> 574 };
>> 575
>> 576 &ospi0 {
>> 577 /* Unused */
>> 578 status = "disabled";
>> 579 };
>> 580
>> 581 &ospi1 {
>> 582 /* Unused */
>> 583 status = "disabled";
>> 584 };
>> 585
583 &main_i2c0 { 586 &main_i2c0 {
584 status = "okay"; 587 status = "okay";
585 pinctrl-names = "default"; 588 pinctrl-names = "default";
586 pinctrl-0 = <&main_i2c0_pins_default>; 589 pinctrl-0 = <&main_i2c0_pins_default>;
587 clock-frequency = <400000>; 590 clock-frequency = <400000>;
588 }; 591 };
589 592
590 &main_i2c1 { 593 &main_i2c1 {
591 status = "okay"; 594 status = "okay";
592 pinctrl-names = "default"; 595 pinctrl-names = "default";
593 pinctrl-0 = <&main_i2c1_pins_default>; !! 596 pinctrl-0 = <&main_i2c1_pins_default &csi1_gpio_pins_default>;
594 clock-frequency = <400000>; 597 clock-frequency = <400000>;
595 }; 598 };
596 599
597 &main_i2c2 { 600 &main_i2c2 {
598 /* BBB Header: P9.19 and P9.20 */ 601 /* BBB Header: P9.19 and P9.20 */
599 status = "okay"; 602 status = "okay";
600 pinctrl-names = "default"; 603 pinctrl-names = "default";
601 pinctrl-0 = <&main_i2c2_pins_default>; 604 pinctrl-0 = <&main_i2c2_pins_default>;
602 clock-frequency = <100000>; 605 clock-frequency = <100000>;
603 }; 606 };
604 607
605 &main_i2c3 { 608 &main_i2c3 {
606 status = "okay"; 609 status = "okay";
607 pinctrl-names = "default"; 610 pinctrl-names = "default";
608 pinctrl-0 = <&main_i2c3_pins_default>; 611 pinctrl-0 = <&main_i2c3_pins_default>;
609 clock-frequency = <400000>; 612 clock-frequency = <400000>;
610 }; 613 };
611 614
612 &main_i2c4 { 615 &main_i2c4 {
613 /* BBB Header: P9.24 and P9.26 */ 616 /* BBB Header: P9.24 and P9.26 */
614 status = "okay"; 617 status = "okay";
615 pinctrl-names = "default"; 618 pinctrl-names = "default";
616 pinctrl-0 = <&main_i2c4_pins_default>; 619 pinctrl-0 = <&main_i2c4_pins_default>;
617 clock-frequency = <100000>; 620 clock-frequency = <100000>;
618 }; 621 };
619 622
620 &main_i2c5 { 623 &main_i2c5 {
621 status = "okay"; 624 status = "okay";
622 pinctrl-names = "default"; 625 pinctrl-names = "default";
623 pinctrl-0 = <&main_i2c5_pins_default>; !! 626 pinctrl-0 = <&main_i2c5_pins_default &csi0_gpio_pins_default>;
624 clock-frequency = <400000>; 627 clock-frequency = <400000>;
625 }; 628 };
626 629
627 &main_i2c6 { 630 &main_i2c6 {
628 /* BBB Header: P9.17 and P9.18 */ 631 /* BBB Header: P9.17 and P9.18 */
629 status = "okay"; 632 status = "okay";
630 pinctrl-names = "default"; 633 pinctrl-names = "default";
631 pinctrl-0 = <&main_i2c6_pins_default>; 634 pinctrl-0 = <&main_i2c6_pins_default>;
632 clock-frequency = <100000>; 635 clock-frequency = <100000>;
633 status = "okay"; 636 status = "okay";
634 }; 637 };
635 638
636 &wkup_i2c0 { 639 &wkup_i2c0 {
637 status = "okay"; 640 status = "okay";
638 pinctrl-names = "default"; 641 pinctrl-names = "default";
639 pinctrl-0 = <&wkup_i2c0_pins_default>; !! 642 pinctrl-0 = <&wkup_i2c0_pins_default &eeprom_wp_pins_default>;
640 clock-frequency = <400000>; 643 clock-frequency = <400000>;
641 644
642 eeprom@50 { 645 eeprom@50 {
643 compatible = "atmel,24c04"; 646 compatible = "atmel,24c04";
644 reg = <0x50>; 647 reg = <0x50>;
645 pinctrl-names = "default"; <<
646 pinctrl-0 = <&eeprom_wp_pins_d <<
647 }; 648 };
648 }; 649 };
649 650
650 &wkup_gpio0 { !! 651 &main_gpio2 {
651 status = "okay"; !! 652 /* Unused */
652 pinctrl-names = "default"; !! 653 status = "disabled";
653 pinctrl-0 = <&mcu_adc0_pins_default>, <<
654 <&mikro_bus_pins_default>; <<
655 }; 654 };
656 655
657 &main_gpio0 { !! 656 &main_gpio3 {
658 status = "okay"; !! 657 /* Unused */
>> 658 status = "disabled";
>> 659 };
>> 660
>> 661 &main_gpio4 {
>> 662 /* Unused */
>> 663 status = "disabled";
>> 664 };
>> 665
>> 666 &main_gpio5 {
>> 667 /* Unused */
>> 668 status = "disabled";
>> 669 };
>> 670
>> 671 &main_gpio6 {
>> 672 /* Unused */
>> 673 status = "disabled";
>> 674 };
>> 675
>> 676 &main_gpio7 {
>> 677 /* Unused */
>> 678 status = "disabled";
>> 679 };
>> 680
>> 681 &wkup_gpio0 {
659 pinctrl-names = "default"; 682 pinctrl-names = "default";
660 pinctrl-0 = <&csi1_gpio_pins_default>, !! 683 pinctrl-0 = <&mcu_adc0_pins_default &mcu_adc1_pins_default &mikro_bus_pins_default>;
661 }; 684 };
662 685
663 &main_gpio1 { !! 686 &wkup_gpio1 {
664 status = "okay"; !! 687 /* Unused */
>> 688 status = "disabled";
665 }; 689 };
666 690
667 &usb_serdes_mux { 691 &usb_serdes_mux {
668 idle-states = <1>, <1>; /* USB0 to SER 692 idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
669 }; 693 };
670 694
671 &serdes_ln_ctrl { 695 &serdes_ln_ctrl {
672 idle-states = <J721E_SERDES0_LANE0_IP4 696 idle-states = <J721E_SERDES0_LANE0_IP4_UNUSED>, <J721E_SERDES0_LANE1_IP4_UNUSED>,
673 <J721E_SERDES1_LANE0_PCI 697 <J721E_SERDES1_LANE0_PCIE1_LANE0>, <J721E_SERDES1_LANE1_PCIE1_LANE1>,
674 <J721E_SERDES2_LANE0_IP1 698 <J721E_SERDES2_LANE0_IP1_UNUSED>, <J721E_SERDES2_LANE1_USB3_1>,
675 <J721E_SERDES3_LANE0_USB 699 <J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
676 <J721E_SERDES4_LANE0_EDP 700 <J721E_SERDES4_LANE0_EDP_LANE0>, <J721E_SERDES4_LANE1_EDP_LANE1>,
677 <J721E_SERDES4_LANE2_EDP 701 <J721E_SERDES4_LANE2_EDP_LANE2>, <J721E_SERDES4_LANE3_EDP_LANE3>;
678 }; 702 };
679 703
680 &serdes_wiz3 { 704 &serdes_wiz3 {
681 typec-dir-gpios = <&main_gpio1 3 GPIO_ 705 typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_LOW>;
682 typec-dir-debounce-ms = <700>; /* TUS 706 typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
683 }; 707 };
684 708
685 &serdes3 { 709 &serdes3 {
686 serdes3_usb_link: phy@0 { 710 serdes3_usb_link: phy@0 {
687 reg = <0>; 711 reg = <0>;
688 cdns,num-lanes = <2>; 712 cdns,num-lanes = <2>;
689 #phy-cells = <0>; 713 #phy-cells = <0>;
690 cdns,phy-type = <PHY_TYPE_USB3 714 cdns,phy-type = <PHY_TYPE_USB3>;
691 resets = <&serdes_wiz3 1>, <&s 715 resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
692 }; 716 };
693 }; 717 };
694 718
695 &serdes4 { 719 &serdes4 {
696 torrent_phy_dp: phy@0 { 720 torrent_phy_dp: phy@0 {
697 reg = <0>; 721 reg = <0>;
698 resets = <&serdes_wiz4 1>; 722 resets = <&serdes_wiz4 1>;
699 cdns,phy-type = <PHY_TYPE_DP>; 723 cdns,phy-type = <PHY_TYPE_DP>;
700 cdns,num-lanes = <4>; 724 cdns,num-lanes = <4>;
701 cdns,max-bit-rate = <5400>; 725 cdns,max-bit-rate = <5400>;
702 #phy-cells = <0>; 726 #phy-cells = <0>;
703 }; 727 };
704 }; 728 };
705 729
706 &mhdp { 730 &mhdp {
707 phys = <&torrent_phy_dp>; 731 phys = <&torrent_phy_dp>;
708 phy-names = "dpphy"; 732 phy-names = "dpphy";
709 pinctrl-names = "default"; 733 pinctrl-names = "default";
710 pinctrl-0 = <&dp0_pins_default>; 734 pinctrl-0 = <&dp0_pins_default>;
711 }; 735 };
712 736
713 &usbss0 { 737 &usbss0 {
714 pinctrl-names = "default"; 738 pinctrl-names = "default";
715 pinctrl-0 = <&main_usbss0_pins_default 739 pinctrl-0 = <&main_usbss0_pins_default>;
716 ti,vbus-divider; 740 ti,vbus-divider;
717 }; 741 };
718 742
719 &usb0 { 743 &usb0 {
720 dr_mode = "peripheral"; 744 dr_mode = "peripheral";
721 maximum-speed = "super-speed"; 745 maximum-speed = "super-speed";
722 phys = <&serdes3_usb_link>; 746 phys = <&serdes3_usb_link>;
723 phy-names = "cdns3,usb3-phy"; 747 phy-names = "cdns3,usb3-phy";
724 }; 748 };
725 749
726 &serdes2 { 750 &serdes2 {
727 serdes2_usb_link: phy@1 { 751 serdes2_usb_link: phy@1 {
728 reg = <1>; 752 reg = <1>;
729 cdns,num-lanes = <1>; 753 cdns,num-lanes = <1>;
730 #phy-cells = <0>; 754 #phy-cells = <0>;
731 cdns,phy-type = <PHY_TYPE_USB3 755 cdns,phy-type = <PHY_TYPE_USB3>;
732 resets = <&serdes_wiz2 2>; 756 resets = <&serdes_wiz2 2>;
733 }; 757 };
734 }; 758 };
735 759
736 &usbss1 { 760 &usbss1 {
737 pinctrl-names = "default"; 761 pinctrl-names = "default";
738 pinctrl-0 = <&main_usbss1_pins_default !! 762 pinctrl-0 = <&main_usbss1_pins_default &mcu_usbss1_pins_default>;
739 ti,vbus-divider; 763 ti,vbus-divider;
740 }; 764 };
741 765
742 &usb1 { 766 &usb1 {
743 dr_mode = "host"; 767 dr_mode = "host";
744 maximum-speed = "super-speed"; 768 maximum-speed = "super-speed";
745 phys = <&serdes2_usb_link>; 769 phys = <&serdes2_usb_link>;
746 phy-names = "cdns3,usb3-phy"; 770 phy-names = "cdns3,usb3-phy";
747 }; 771 };
748 772
749 &tscadc0 { 773 &tscadc0 {
750 status = "okay"; <<
751 /* BBB Header: P9.39, P9.40, P9.37, P9 774 /* BBB Header: P9.39, P9.40, P9.37, P9.38, P9.33, P9.36, P9.35 */
752 adc { 775 adc {
753 ti,adc-channels = <0 1 2 3 4 5 776 ti,adc-channels = <0 1 2 3 4 5 6>;
754 }; 777 };
755 }; 778 };
756 779
757 &tscadc1 { 780 &tscadc1 {
758 status = "okay"; <<
759 /* MCU mikroBUS Header J10.1 - MCU_ADC 781 /* MCU mikroBUS Header J10.1 - MCU_ADC1_AIN0 */
760 adc { 782 adc {
761 ti,adc-channels = <0>; 783 ti,adc-channels = <0>;
762 }; 784 };
763 }; 785 };
764 786
765 &mcu_cpsw { 787 &mcu_cpsw {
766 pinctrl-names = "default"; 788 pinctrl-names = "default";
767 pinctrl-0 = <&mcu_cpsw_pins_default>; 789 pinctrl-0 = <&mcu_cpsw_pins_default>;
768 }; 790 };
769 791
770 &davinci_mdio { 792 &davinci_mdio {
771 pinctrl-names = "default"; 793 pinctrl-names = "default";
772 pinctrl-0 = <&mcu_mdio_pins_default>; 794 pinctrl-0 = <&mcu_mdio_pins_default>;
773 795
774 phy0: ethernet-phy@0 { 796 phy0: ethernet-phy@0 {
775 reg = <0>; 797 reg = <0>;
776 ti,rx-internal-delay = <DP8386 798 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
777 ti,fifo-depth = <DP83867_PHYCR 799 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
778 }; 800 };
779 }; 801 };
780 802
781 &cpsw_port1 { 803 &cpsw_port1 {
782 phy-mode = "rgmii-rxid"; 804 phy-mode = "rgmii-rxid";
783 phy-handle = <&phy0>; 805 phy-handle = <&phy0>;
784 }; 806 };
785 807
786 &dss { 808 &dss {
787 /* 809 /*
788 * These clock assignments are chosen 810 * These clock assignments are chosen to enable the following outputs:
789 * 811 *
790 * VP0 - DisplayPort SST 812 * VP0 - DisplayPort SST
791 * VP1 - DPI0 813 * VP1 - DPI0
792 * VP2 - DSI 814 * VP2 - DSI
793 * VP3 - DPI1 815 * VP3 - DPI1
794 */ 816 */
795 817
796 assigned-clocks = <&k3_clks 152 1>, 818 assigned-clocks = <&k3_clks 152 1>, /* VP 1 pixel clock */
797 <&k3_clks 152 4>, 819 <&k3_clks 152 4>, /* VP 2 pixel clock */
798 <&k3_clks 152 9>, 820 <&k3_clks 152 9>, /* VP 3 pixel clock */
799 <&k3_clks 152 13>; 821 <&k3_clks 152 13>; /* VP 4 pixel clock */
800 assigned-clock-parents = <&k3_clks 152 822 assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */
801 <&k3_clks 152 823 <&k3_clks 152 6>, /* PLL19_HSDIV0 */
802 <&k3_clks 152 824 <&k3_clks 152 11>, /* PLL18_HSDIV0 */
803 <&k3_clks 152 825 <&k3_clks 152 18>; /* PLL23_HSDIV0 */
804 }; 826 };
805 827
806 &dss_ports { 828 &dss_ports {
807 port { 829 port {
808 dpi0_out: endpoint { 830 dpi0_out: endpoint {
809 remote-endpoint = <&dp 831 remote-endpoint = <&dp0_in>;
810 }; 832 };
811 }; 833 };
812 }; 834 };
813 835
814 &dp0_ports { 836 &dp0_ports {
815 #address-cells = <1>; 837 #address-cells = <1>;
816 #size-cells = <0>; 838 #size-cells = <0>;
817 839
818 port@0 { 840 port@0 {
819 reg = <0>; 841 reg = <0>;
820 dp0_in: endpoint { 842 dp0_in: endpoint {
821 remote-endpoint = <&dp 843 remote-endpoint = <&dpi0_out>;
822 }; 844 };
823 }; 845 };
824 846
825 port@4 { 847 port@4 {
826 reg = <4>; 848 reg = <4>;
827 dp0_out: endpoint { 849 dp0_out: endpoint {
828 remote-endpoint = <&dp 850 remote-endpoint = <&dp_connector_in>;
829 }; 851 };
830 }; 852 };
831 }; 853 };
832 854
833 &serdes0 { 855 &serdes0 {
834 serdes0_pcie_link: phy@0 { 856 serdes0_pcie_link: phy@0 {
835 reg = <0>; 857 reg = <0>;
836 cdns,num-lanes = <1>; 858 cdns,num-lanes = <1>;
837 #phy-cells = <0>; 859 #phy-cells = <0>;
838 cdns,phy-type = <PHY_TYPE_PCIE 860 cdns,phy-type = <PHY_TYPE_PCIE>;
839 resets = <&serdes_wiz0 1>; 861 resets = <&serdes_wiz0 1>;
840 }; 862 };
841 }; 863 };
842 864
843 &serdes1 { 865 &serdes1 {
844 serdes1_pcie_link: phy@0 { 866 serdes1_pcie_link: phy@0 {
845 reg = <0>; 867 reg = <0>;
846 cdns,num-lanes = <2>; 868 cdns,num-lanes = <2>;
847 #phy-cells = <0>; 869 #phy-cells = <0>;
848 cdns,phy-type = <PHY_TYPE_PCIE 870 cdns,phy-type = <PHY_TYPE_PCIE>;
849 resets = <&serdes_wiz1 1>, <&s 871 resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>;
850 }; 872 };
851 }; 873 };
852 874
>> 875 &pcie0_rc {
>> 876 /* Unused */
>> 877 status = "disabled";
>> 878 };
>> 879
853 &pcie1_rc { 880 &pcie1_rc {
854 status = "okay"; <<
855 pinctrl-names = "default"; 881 pinctrl-names = "default";
856 pinctrl-0 = <&pcie1_rst_pins_default>; 882 pinctrl-0 = <&pcie1_rst_pins_default>;
857 phys = <&serdes1_pcie_link>; 883 phys = <&serdes1_pcie_link>;
858 phy-names = "pcie-phy"; 884 phy-names = "pcie-phy";
859 num-lanes = <2>; 885 num-lanes = <2>;
860 max-link-speed = <3>; 886 max-link-speed = <3>;
861 reset-gpios = <&main_gpio0 22 GPIO_ACT 887 reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_HIGH>;
862 }; 888 };
863 889
>> 890 &pcie2_rc {
>> 891 /* Unused */
>> 892 status = "disabled";
>> 893 };
>> 894
>> 895 &pcie0_ep {
>> 896 status = "disabled";
>> 897 phys = <&serdes0_pcie_link>;
>> 898 phy-names = "pcie-phy";
>> 899 num-lanes = <1>;
>> 900 };
>> 901
>> 902 &pcie1_ep {
>> 903 status = "disabled";
>> 904 phys = <&serdes1_pcie_link>;
>> 905 phy-names = "pcie-phy";
>> 906 num-lanes = <2>;
>> 907 };
>> 908
>> 909 &pcie2_ep {
>> 910 /* Unused */
>> 911 status = "disabled";
>> 912 };
>> 913
>> 914 &pcie3_rc {
>> 915 /* Unused */
>> 916 status = "disabled";
>> 917 };
>> 918
>> 919 &pcie3_ep {
>> 920 /* Unused */
>> 921 status = "disabled";
>> 922 };
>> 923
>> 924 &icssg0_mdio {
>> 925 /* Unused */
>> 926 status = "disabled";
>> 927 };
>> 928
>> 929 &icssg1_mdio {
>> 930 /* Unused */
>> 931 status = "disabled";
>> 932 };
>> 933
864 &ufs_wrapper { 934 &ufs_wrapper {
865 status = "disabled"; 935 status = "disabled";
866 }; 936 };
867 937
868 &mailbox0_cluster0 { 938 &mailbox0_cluster0 {
869 status = "okay"; 939 status = "okay";
870 interrupts = <436>; 940 interrupts = <436>;
871 941
872 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0 942 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
873 ti,mbox-rx = <0 0 0>; 943 ti,mbox-rx = <0 0 0>;
874 ti,mbox-tx = <1 0 0>; 944 ti,mbox-tx = <1 0 0>;
875 }; 945 };
876 946
877 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0 947 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
878 ti,mbox-rx = <2 0 0>; 948 ti,mbox-rx = <2 0 0>;
879 ti,mbox-tx = <3 0 0>; 949 ti,mbox-tx = <3 0 0>;
880 }; 950 };
881 }; 951 };
882 952
883 &mailbox0_cluster1 { 953 &mailbox0_cluster1 {
884 status = "okay"; 954 status = "okay";
885 interrupts = <432>; 955 interrupts = <432>;
886 956
887 mbox_main_r5fss0_core0: mbox-main-r5fs 957 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
888 ti,mbox-rx = <0 0 0>; 958 ti,mbox-rx = <0 0 0>;
889 ti,mbox-tx = <1 0 0>; 959 ti,mbox-tx = <1 0 0>;
890 }; 960 };
891 961
892 mbox_main_r5fss0_core1: mbox-main-r5fs 962 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
893 ti,mbox-rx = <2 0 0>; 963 ti,mbox-rx = <2 0 0>;
894 ti,mbox-tx = <3 0 0>; 964 ti,mbox-tx = <3 0 0>;
895 }; 965 };
896 }; 966 };
897 967
898 &mailbox0_cluster2 { 968 &mailbox0_cluster2 {
899 status = "okay"; 969 status = "okay";
900 interrupts = <428>; 970 interrupts = <428>;
901 971
902 mbox_main_r5fss1_core0: mbox-main-r5fs 972 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
903 ti,mbox-rx = <0 0 0>; 973 ti,mbox-rx = <0 0 0>;
904 ti,mbox-tx = <1 0 0>; 974 ti,mbox-tx = <1 0 0>;
905 }; 975 };
906 976
907 mbox_main_r5fss1_core1: mbox-main-r5fs 977 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
908 ti,mbox-rx = <2 0 0>; 978 ti,mbox-rx = <2 0 0>;
909 ti,mbox-tx = <3 0 0>; 979 ti,mbox-tx = <3 0 0>;
910 }; 980 };
911 }; 981 };
912 982
913 &mailbox0_cluster3 { 983 &mailbox0_cluster3 {
914 status = "okay"; 984 status = "okay";
915 interrupts = <424>; 985 interrupts = <424>;
916 986
917 mbox_c66_0: mbox-c66-0 { 987 mbox_c66_0: mbox-c66-0 {
918 ti,mbox-rx = <0 0 0>; 988 ti,mbox-rx = <0 0 0>;
919 ti,mbox-tx = <1 0 0>; 989 ti,mbox-tx = <1 0 0>;
920 }; 990 };
921 991
922 mbox_c66_1: mbox-c66-1 { 992 mbox_c66_1: mbox-c66-1 {
923 ti,mbox-rx = <2 0 0>; 993 ti,mbox-rx = <2 0 0>;
924 ti,mbox-tx = <3 0 0>; 994 ti,mbox-tx = <3 0 0>;
925 }; 995 };
926 }; 996 };
927 997
928 &mailbox0_cluster4 { 998 &mailbox0_cluster4 {
929 status = "okay"; 999 status = "okay";
930 interrupts = <420>; 1000 interrupts = <420>;
931 1001
932 mbox_c71_0: mbox-c71-0 { 1002 mbox_c71_0: mbox-c71-0 {
933 ti,mbox-rx = <0 0 0>; 1003 ti,mbox-rx = <0 0 0>;
934 ti,mbox-tx = <1 0 0>; 1004 ti,mbox-tx = <1 0 0>;
935 }; 1005 };
936 }; 1006 };
937 1007
938 &mcu_r5fss0_core0 { 1008 &mcu_r5fss0_core0 {
939 mboxes = <&mailbox0_cluster0 &mbox_mcu 1009 mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
940 memory-region = <&mcu_r5fss0_core0_dma 1010 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
941 <&mcu_r5fss0_core0_mem 1011 <&mcu_r5fss0_core0_memory_region>;
942 }; 1012 };
943 1013
944 &mcu_r5fss0_core1 { 1014 &mcu_r5fss0_core1 {
945 mboxes = <&mailbox0_cluster0 &mbox_mcu 1015 mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
946 memory-region = <&mcu_r5fss0_core1_dma 1016 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
947 <&mcu_r5fss0_core1_mem 1017 <&mcu_r5fss0_core1_memory_region>;
948 }; 1018 };
949 1019
950 &main_r5fss0_core0 { 1020 &main_r5fss0_core0 {
951 mboxes = <&mailbox0_cluster1 &mbox_mai 1021 mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
952 memory-region = <&main_r5fss0_core0_dm 1022 memory-region = <&main_r5fss0_core0_dma_memory_region>,
953 <&main_r5fss0_core0_me 1023 <&main_r5fss0_core0_memory_region>;
954 }; 1024 };
955 1025
956 &main_r5fss0_core1 { 1026 &main_r5fss0_core1 {
957 mboxes = <&mailbox0_cluster1 &mbox_mai 1027 mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
958 memory-region = <&main_r5fss0_core1_dm 1028 memory-region = <&main_r5fss0_core1_dma_memory_region>,
959 <&main_r5fss0_core1_me 1029 <&main_r5fss0_core1_memory_region>;
960 }; 1030 };
961 1031
962 &main_r5fss1_core0 { 1032 &main_r5fss1_core0 {
963 mboxes = <&mailbox0_cluster2 &mbox_mai 1033 mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
964 memory-region = <&main_r5fss1_core0_dm 1034 memory-region = <&main_r5fss1_core0_dma_memory_region>,
965 <&main_r5fss1_core0_me 1035 <&main_r5fss1_core0_memory_region>;
966 }; 1036 };
967 1037
968 &main_r5fss1_core1 { 1038 &main_r5fss1_core1 {
969 mboxes = <&mailbox0_cluster2 &mbox_mai 1039 mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
970 memory-region = <&main_r5fss1_core1_dm 1040 memory-region = <&main_r5fss1_core1_dma_memory_region>,
971 <&main_r5fss1_core1_me 1041 <&main_r5fss1_core1_memory_region>;
972 }; 1042 };
973 1043
974 &c66_0 { 1044 &c66_0 {
975 status = "okay"; <<
976 mboxes = <&mailbox0_cluster3 &mbox_c66 1045 mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
977 memory-region = <&c66_0_dma_memory_reg 1046 memory-region = <&c66_0_dma_memory_region>,
978 <&c66_0_memory_region> 1047 <&c66_0_memory_region>;
979 }; 1048 };
980 1049
981 &c66_1 { 1050 &c66_1 {
982 status = "okay"; <<
983 mboxes = <&mailbox0_cluster3 &mbox_c66 1051 mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
984 memory-region = <&c66_1_dma_memory_reg 1052 memory-region = <&c66_1_dma_memory_region>,
985 <&c66_1_memory_region> 1053 <&c66_1_memory_region>;
986 }; 1054 };
987 1055
988 &c71_0 { 1056 &c71_0 {
989 status = "okay"; <<
990 mboxes = <&mailbox0_cluster4 &mbox_c71 1057 mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
991 memory-region = <&c71_0_dma_memory_reg 1058 memory-region = <&c71_0_dma_memory_region>,
992 <&c71_0_memory_region> 1059 <&c71_0_memory_region>;
993 }; 1060 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.