Linux/scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 // SPDX-License-Identifier: GPL-2.0-only OR MI !! 1 // SPDX-License-Identifier: GPL-2.0 2 /* 2 /* 3 * SoM: https://www.ti.com/lit/zip/sprr439 3 * SoM: https://www.ti.com/lit/zip/sprr439 4 * 4 * 5 * Copyright (C) 2021-2024 Texas Instruments I !! 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 6 */ 7 7 8 /dts-v1/; 8 /dts-v1/; 9 9 10 #include "k3-j721s2.dtsi" 10 #include "k3-j721s2.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/gpio.h> 12 12 13 / { 13 / { 14 memory@80000000 { 14 memory@80000000 { 15 device_type = "memory"; 15 device_type = "memory"; 16 bootph-all; << 17 /* 16 GB RAM */ 16 /* 16 GB RAM */ 18 reg = <0x00000000 0x80000000 0 !! 17 reg = <0x00 0x80000000 0x00 0x80000000>, 19 <0x00000008 0x80000000 0 !! 18 <0x08 0x80000000 0x03 0x80000000>; 20 }; 19 }; 21 20 22 /* Reserving memory regions still pend 21 /* Reserving memory regions still pending */ 23 reserved_memory: reserved-memory { 22 reserved_memory: reserved-memory { 24 #address-cells = <2>; 23 #address-cells = <2>; 25 #size-cells = <2>; 24 #size-cells = <2>; 26 ranges; 25 ranges; 27 26 28 secure_ddr: optee@9e800000 { 27 secure_ddr: optee@9e800000 { 29 reg = <0x00 0x9e800000 28 reg = <0x00 0x9e800000 0x00 0x01800000>; 30 alignment = <0x1000>; 29 alignment = <0x1000>; 31 no-map; 30 no-map; 32 }; 31 }; 33 << 34 mcu_r5fss0_core0_dma_memory_re << 35 compatible = "shared-d << 36 reg = <0x00 0xa0000000 << 37 no-map; << 38 }; << 39 << 40 mcu_r5fss0_core0_memory_region << 41 compatible = "shared-d << 42 reg = <0x00 0xa0100000 << 43 no-map; << 44 }; << 45 << 46 mcu_r5fss0_core1_dma_memory_re << 47 compatible = "shared-d << 48 reg = <0x00 0xa1000000 << 49 no-map; << 50 }; << 51 << 52 mcu_r5fss0_core1_memory_region << 53 compatible = "shared-d << 54 reg = <0x00 0xa1100000 << 55 no-map; << 56 }; << 57 << 58 main_r5fss0_core0_dma_memory_r << 59 compatible = "shared-d << 60 reg = <0x00 0xa2000000 << 61 no-map; << 62 }; << 63 << 64 main_r5fss0_core0_memory_regio << 65 compatible = "shared-d << 66 reg = <0x00 0xa2100000 << 67 no-map; << 68 }; << 69 << 70 main_r5fss0_core1_dma_memory_r << 71 compatible = "shared-d << 72 reg = <0x00 0xa3000000 << 73 no-map; << 74 }; << 75 << 76 main_r5fss0_core1_memory_regio << 77 compatible = "shared-d << 78 reg = <0x00 0xa3100000 << 79 no-map; << 80 }; << 81 << 82 main_r5fss1_core0_dma_memory_r << 83 compatible = "shared-d << 84 reg = <0x00 0xa4000000 << 85 no-map; << 86 }; << 87 << 88 main_r5fss1_core0_memory_regio << 89 compatible = "shared-d << 90 reg = <0x00 0xa4100000 << 91 no-map; << 92 }; << 93 << 94 main_r5fss1_core1_dma_memory_r << 95 compatible = "shared-d << 96 reg = <0x00 0xa5000000 << 97 no-map; << 98 }; << 99 << 100 main_r5fss1_core1_memory_regio << 101 compatible = "shared-d << 102 reg = <0x00 0xa5100000 << 103 no-map; << 104 }; << 105 << 106 c71_0_dma_memory_region: c71-d << 107 compatible = "shared-d << 108 reg = <0x00 0xa6000000 << 109 no-map; << 110 }; << 111 << 112 c71_0_memory_region: c71-memor << 113 compatible = "shared-d << 114 reg = <0x00 0xa6100000 << 115 no-map; << 116 }; << 117 << 118 c71_1_dma_memory_region: c71-d << 119 compatible = "shared-d << 120 reg = <0x00 0xa7000000 << 121 no-map; << 122 }; << 123 << 124 c71_1_memory_region: c71-memor << 125 compatible = "shared-d << 126 reg = <0x00 0xa7100000 << 127 no-map; << 128 }; << 129 << 130 rtos_ipc_memory_region: ipc-me << 131 reg = <0x00 0xa8000000 << 132 alignment = <0x1000>; << 133 no-map; << 134 }; << 135 }; << 136 << 137 mux0: mux-controller-0 { << 138 compatible = "gpio-mux"; << 139 #mux-state-cells = <1>; << 140 mux-gpios = <&exp_som 1 GPIO_A << 141 }; << 142 << 143 mux1: mux-controller-1 { << 144 compatible = "gpio-mux"; << 145 #mux-state-cells = <1>; << 146 mux-gpios = <&exp_som 2 GPIO_A << 147 }; 32 }; 148 33 149 transceiver0: can-phy0 { 34 transceiver0: can-phy0 { 150 /* standby pin has been ground 35 /* standby pin has been grounded by default */ 151 compatible = "ti,tcan1042"; 36 compatible = "ti,tcan1042"; 152 #phy-cells = <0>; 37 #phy-cells = <0>; 153 max-bitrate = <5000000>; 38 max-bitrate = <5000000>; 154 }; 39 }; 155 }; 40 }; 156 41 157 &wkup_pmx0 { << 158 mcu_fss0_ospi0_pins_default: mcu-fss0- << 159 pinctrl-single,pins = < << 160 J721S2_WKUP_IOPAD(0x00 << 161 J721S2_WKUP_IOPAD(0x02 << 162 J721S2_WKUP_IOPAD(0x00 << 163 J721S2_WKUP_IOPAD(0x01 << 164 J721S2_WKUP_IOPAD(0x01 << 165 J721S2_WKUP_IOPAD(0x01 << 166 J721S2_WKUP_IOPAD(0x01 << 167 J721S2_WKUP_IOPAD(0x02 << 168 J721S2_WKUP_IOPAD(0x02 << 169 J721S2_WKUP_IOPAD(0x02 << 170 J721S2_WKUP_IOPAD(0x00 << 171 J721S2_WKUP_IOPAD(0x00 << 172 >; << 173 }; << 174 }; << 175 << 176 &wkup_pmx1 { << 177 pmic_irq_pins_default: pmic-irq-defaul << 178 pinctrl-single,pins = < << 179 /* (C21) MCU_OSPI1_CSn << 180 J721S2_WKUP_IOPAD(0x02 << 181 >; << 182 }; << 183 }; << 184 << 185 &wkup_pmx2 { << 186 wkup_i2c0_pins_default: wkup-i2c0-defa << 187 pinctrl-single,pins = < << 188 J721S2_WKUP_IOPAD(0x98 << 189 J721S2_WKUP_IOPAD(0x9c << 190 >; << 191 }; << 192 }; << 193 << 194 &main_pmx0 { 42 &main_pmx0 { 195 main_i2c0_pins_default: main-i2c0-defa !! 43 main_i2c0_pins_default: main-i2c0-pins-default { 196 pinctrl-single,pins = < 44 pinctrl-single,pins = < 197 J721S2_IOPAD(0x0e0, PI 45 J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */ 198 J721S2_IOPAD(0x0e4, PI 46 J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */ 199 >; 47 >; 200 }; 48 }; 201 49 202 main_mcan16_pins_default: main-mcan16- !! 50 main_mcan16_pins_default: main-mcan16-pins-default { 203 pinctrl-single,pins = < 51 pinctrl-single,pins = < 204 J721S2_IOPAD(0x028, PI 52 J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */ 205 J721S2_IOPAD(0x024, PI 53 J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */ 206 >; 54 >; 207 }; 55 }; 208 }; 56 }; 209 57 210 &wkup_i2c0 { << 211 status = "okay"; << 212 pinctrl-names = "default"; << 213 pinctrl-0 = <&wkup_i2c0_pins_default>; << 214 clock-frequency = <400000>; << 215 << 216 eeprom@50 { << 217 /* CAV24C256WE-GT3 */ << 218 compatible = "atmel,24c256"; << 219 reg = <0x50>; << 220 }; << 221 << 222 tps659411: pmic@48 { << 223 compatible = "ti,tps6594-q1"; << 224 reg = <0x48>; << 225 system-power-controller; << 226 pinctrl-names = "default"; << 227 pinctrl-0 = <&pmic_irq_pins_de << 228 interrupt-parent = <&wkup_gpio << 229 interrupts = <39 IRQ_TYPE_EDGE << 230 gpio-controller; << 231 #gpio-cells = <2>; << 232 ti,primary-pmic; << 233 buck1234-supply = <&vsys_3v3>; << 234 buck5-supply = <&vsys_3v3>; << 235 ldo1-supply = <&vsys_3v3>; << 236 ldo2-supply = <&vsys_3v3>; << 237 ldo3-supply = <&vsys_3v3>; << 238 ldo4-supply = <&vsys_3v3>; << 239 << 240 regulators { << 241 bucka1234: buck1234 { << 242 regulator-name << 243 regulator-min- << 244 regulator-max- << 245 regulator-boot << 246 regulator-alwa << 247 bootph-pre-ram << 248 }; << 249 << 250 bucka5: buck5 { << 251 regulator-name << 252 regulator-min- << 253 regulator-max- << 254 regulator-boot << 255 regulator-alwa << 256 }; << 257 << 258 ldoa1: ldo1 { << 259 regulator-name << 260 regulator-min- << 261 regulator-max- << 262 regulator-boot << 263 regulator-alwa << 264 }; << 265 << 266 ldoa2: ldo2 { << 267 regulator-name << 268 regulator-min- << 269 regulator-max- << 270 regulator-boot << 271 regulator-alwa << 272 }; << 273 << 274 ldoa3: ldo3 { << 275 regulator-name << 276 regulator-min- << 277 regulator-max- << 278 regulator-boot << 279 regulator-alwa << 280 }; << 281 << 282 ldoa4: ldo4 { << 283 regulator-name << 284 regulator-min- << 285 regulator-max- << 286 regulator-boot << 287 regulator-alwa << 288 }; << 289 }; << 290 }; << 291 << 292 tps659414: pmic@4c { << 293 compatible = "ti,tps6594-q1"; << 294 reg = <0x4c>; << 295 system-power-controller; << 296 interrupt-parent = <&wkup_gpio << 297 interrupts = <39 IRQ_TYPE_EDGE << 298 gpio-controller; << 299 #gpio-cells = <2>; << 300 buck1-supply = <&vsys_3v3>; << 301 buck2-supply = <&vsys_3v3>; << 302 buck3-supply = <&vsys_3v3>; << 303 buck4-supply = <&vsys_3v3>; << 304 buck5-supply = <&vsys_3v3>; << 305 ldo1-supply = <&vsys_3v3>; << 306 ldo2-supply = <&vsys_3v3>; << 307 ldo3-supply = <&vsys_3v3>; << 308 ldo4-supply = <&vsys_3v3>; << 309 << 310 regulators { << 311 buckb1: buck1 { << 312 regulator-name << 313 regulator-min- << 314 regulator-max- << 315 regulator-alwa << 316 regulator-boot << 317 }; << 318 << 319 buckb2: buck2 { << 320 regulator-name << 321 regulator-min- << 322 regulator-max- << 323 regulator-boot << 324 regulator-alwa << 325 }; << 326 << 327 buckb3: buck3 { << 328 regulator-name << 329 regulator-min- << 330 regulator-max- << 331 regulator-boot << 332 regulator-alwa << 333 }; << 334 << 335 buckb4: buck4 { << 336 regulator-name << 337 regulator-min- << 338 regulator-max- << 339 regulator-boot << 340 regulator-alwa << 341 }; << 342 << 343 buckb5: buck5 { << 344 regulator-name << 345 regulator-min- << 346 regulator-max- << 347 regulator-boot << 348 regulator-alwa << 349 }; << 350 << 351 ldob1: ldo1 { << 352 regulator-name << 353 regulator-min- << 354 regulator-max- << 355 regulator-boot << 356 regulator-alwa << 357 }; << 358 << 359 ldob2: ldo2 { << 360 regulator-name << 361 regulator-min- << 362 regulator-max- << 363 regulator-boot << 364 regulator-alwa << 365 }; << 366 << 367 ldob3: ldo3 { << 368 regulator-name << 369 regulator-min- << 370 regulator-max- << 371 regulator-boot << 372 regulator-alwa << 373 }; << 374 << 375 ldob4: ldo4 { << 376 regulator-name << 377 regulator-min- << 378 regulator-max- << 379 regulator-boot << 380 regulator-alwa << 381 }; << 382 }; << 383 }; << 384 << 385 lp876411: pmic@58 { << 386 compatible = "ti,lp8764-q1"; << 387 reg = <0x58>; << 388 system-power-controller; << 389 interrupt-parent = <&wkup_gpio << 390 interrupts = <39 IRQ_TYPE_EDGE << 391 gpio-controller; << 392 #gpio-cells = <2>; << 393 buck1234-supply = <&vsys_3v3>; << 394 << 395 regulators { << 396 buckc1234: buck1234 { << 397 regulator-name << 398 regulator-min- << 399 regulator-max- << 400 regulator-boot << 401 regulator-alwa << 402 }; << 403 }; << 404 }; << 405 }; << 406 << 407 &main_i2c0 { 58 &main_i2c0 { 408 status = "okay"; << 409 pinctrl-names = "default"; 59 pinctrl-names = "default"; 410 pinctrl-0 = <&main_i2c0_pins_default>; 60 pinctrl-0 = <&main_i2c0_pins_default>; 411 clock-frequency = <400000>; 61 clock-frequency = <400000>; 412 62 413 exp_som: gpio@21 { 63 exp_som: gpio@21 { 414 compatible = "ti,tca6408"; 64 compatible = "ti,tca6408"; 415 reg = <0x21>; 65 reg = <0x21>; 416 gpio-controller; 66 gpio-controller; 417 #gpio-cells = <2>; 67 #gpio-cells = <2>; 418 gpio-line-names = "USB2.0_MUX_ 68 gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0", 419 "CANUART_MUX 69 "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1", 420 "GPIO_RGMII1 70 "GPIO_RGMII1_RST", "GPIO_eDP_ENABLE", 421 "GPIO_LIN_E 71 "GPIO_LIN_EN", "CAN_STB"; 422 }; 72 }; 423 }; 73 }; 424 74 425 &main_mcan16 { 75 &main_mcan16 { 426 status = "okay"; << 427 pinctrl-0 = <&main_mcan16_pins_default 76 pinctrl-0 = <&main_mcan16_pins_default>; 428 pinctrl-names = "default"; 77 pinctrl-names = "default"; 429 phys = <&transceiver0>; 78 phys = <&transceiver0>; 430 }; 79 }; 431 80 432 &ospi0 { << 433 status = "okay"; << 434 pinctrl-names = "default"; << 435 pinctrl-0 = <&mcu_fss0_ospi0_pins_defa << 436 << 437 flash@0 { << 438 compatible = "jedec,spi-nor"; << 439 reg = <0x0>; << 440 spi-tx-bus-width = <8>; << 441 spi-rx-bus-width = <8>; << 442 spi-max-frequency = <25000000> << 443 cdns,tshsl-ns = <60>; << 444 cdns,tsd2d-ns = <60>; << 445 cdns,tchsh-ns = <60>; << 446 cdns,tslch-ns = <60>; << 447 cdns,read-delay = <4>; << 448 }; << 449 }; << 450 << 451 &mailbox0_cluster0 { 81 &mailbox0_cluster0 { 452 status = "okay"; !! 82 status = "disabled"; 453 interrupts = <436>; << 454 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0 << 455 ti,mbox-rx = <0 0 0>; << 456 ti,mbox-tx = <1 0 0>; << 457 }; << 458 << 459 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0 << 460 ti,mbox-rx = <2 0 0>; << 461 ti,mbox-tx = <3 0 0>; << 462 }; << 463 }; 83 }; 464 84 465 &mailbox0_cluster1 { 85 &mailbox0_cluster1 { 466 status = "okay"; !! 86 status = "disabled"; 467 interrupts = <432>; << 468 mbox_main_r5fss0_core0: mbox-main-r5fs << 469 ti,mbox-rx = <0 0 0>; << 470 ti,mbox-tx = <1 0 0>; << 471 }; << 472 << 473 mbox_main_r5fss0_core1: mbox-main-r5fs << 474 ti,mbox-rx = <2 0 0>; << 475 ti,mbox-tx = <3 0 0>; << 476 }; << 477 }; 87 }; 478 88 479 &mailbox0_cluster2 { 89 &mailbox0_cluster2 { 480 status = "okay"; !! 90 status = "disabled"; 481 interrupts = <428>; !! 91 }; 482 mbox_main_r5fss1_core0: mbox-main-r5fs << 483 ti,mbox-rx = <0 0 0>; << 484 ti,mbox-tx = <1 0 0>; << 485 }; << 486 92 487 mbox_main_r5fss1_core1: mbox-main-r5fs !! 93 &mailbox0_cluster3 { 488 ti,mbox-rx = <2 0 0>; !! 94 status = "disabled"; 489 ti,mbox-tx = <3 0 0>; << 490 }; << 491 }; 95 }; 492 96 493 &mailbox0_cluster4 { 97 &mailbox0_cluster4 { 494 status = "okay"; !! 98 status = "disabled"; 495 interrupts = <420>; !! 99 }; 496 mbox_c71_0: mbox-c71-0 { << 497 ti,mbox-rx = <0 0 0>; << 498 ti,mbox-tx = <1 0 0>; << 499 }; << 500 100 501 mbox_c71_1: mbox-c71-1 { !! 101 &mailbox0_cluster5 { 502 ti,mbox-rx = <2 0 0>; !! 102 status = "disabled"; 503 ti,mbox-tx = <3 0 0>; !! 103 }; 504 }; !! 104 >> 105 &mailbox0_cluster6 { >> 106 status = "disabled"; >> 107 }; >> 108 >> 109 &mailbox0_cluster7 { >> 110 status = "disabled"; 505 }; 111 }; 506 112 507 &mcu_r5fss0_core0 { !! 113 &mailbox0_cluster8 { 508 mboxes = <&mailbox0_cluster0 &mbox_mcu !! 114 status = "disabled"; 509 memory-region = <&mcu_r5fss0_core0_dma << 510 <&mcu_r5fss0_core0_mem << 511 }; 115 }; 512 116 513 &mcu_r5fss0_core1 { !! 117 &mailbox0_cluster9 { 514 mboxes = <&mailbox0_cluster0 &mbox_mcu !! 118 status = "disabled"; 515 memory-region = <&mcu_r5fss0_core1_dma << 516 <&mcu_r5fss0_core1_mem << 517 }; 119 }; 518 120 519 &main_r5fss0 { !! 121 &mailbox0_cluster10 { 520 ti,cluster-mode = <0>; !! 122 status = "disabled"; 521 }; 123 }; 522 124 523 &main_r5fss1 { !! 125 &mailbox0_cluster11 { 524 ti,cluster-mode = <0>; !! 126 status = "disabled"; 525 }; 127 }; 526 128 527 /* Timers are used by Remoteproc firmware */ !! 129 &mailbox1_cluster0 { 528 &main_timer0 { !! 130 status = "disabled"; 529 status = "reserved"; << 530 }; 131 }; 531 132 532 &main_timer1 { !! 133 &mailbox1_cluster1 { 533 status = "reserved"; !! 134 status = "disabled"; 534 }; 135 }; 535 136 536 &main_timer2 { !! 137 &mailbox1_cluster2 { 537 status = "reserved"; !! 138 status = "disabled"; 538 }; 139 }; 539 140 540 &main_timer3 { !! 141 &mailbox1_cluster3 { 541 status = "reserved"; !! 142 status = "disabled"; 542 }; 143 }; 543 144 544 &main_timer4 { !! 145 &mailbox1_cluster4 { 545 status = "reserved"; !! 146 status = "disabled"; 546 }; 147 }; 547 148 548 &main_timer5 { !! 149 &mailbox1_cluster5 { 549 status = "reserved"; !! 150 status = "disabled"; 550 }; 151 }; 551 152 552 &main_r5fss0_core0 { !! 153 &mailbox1_cluster6 { 553 mboxes = <&mailbox0_cluster1 &mbox_mai !! 154 status = "disabled"; 554 memory-region = <&main_r5fss0_core0_dm << 555 <&main_r5fss0_core0_me << 556 }; 155 }; 557 156 558 &main_r5fss0_core1 { !! 157 &mailbox1_cluster7 { 559 mboxes = <&mailbox0_cluster1 &mbox_mai !! 158 status = "disabled"; 560 memory-region = <&main_r5fss0_core1_dm << 561 <&main_r5fss0_core1_me << 562 }; 159 }; 563 160 564 &main_r5fss1_core0 { !! 161 &mailbox1_cluster8 { 565 mboxes = <&mailbox0_cluster2 &mbox_mai !! 162 status = "disabled"; 566 memory-region = <&main_r5fss1_core0_dm << 567 <&main_r5fss1_core0_me << 568 }; 163 }; 569 164 570 &main_r5fss1_core1 { !! 165 &mailbox1_cluster9 { 571 mboxes = <&mailbox0_cluster2 &mbox_mai !! 166 status = "disabled"; 572 memory-region = <&main_r5fss1_core1_dm << 573 <&main_r5fss1_core1_me << 574 }; 167 }; 575 168 576 &c71_0 { !! 169 &mailbox1_cluster10 { 577 status = "okay"; !! 170 status = "disabled"; 578 mboxes = <&mailbox0_cluster4 &mbox_c71 << 579 memory-region = <&c71_0_dma_memory_reg << 580 <&c71_0_memory_region> << 581 }; 171 }; 582 172 583 &c71_1 { !! 173 &mailbox1_cluster11 { 584 status = "okay"; !! 174 status = "disabled"; 585 mboxes = <&mailbox0_cluster4 &mbox_c71 << 586 memory-region = <&c71_1_dma_memory_reg << 587 <&c71_1_memory_region> << 588 }; 175 };

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Linux/scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi

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Differences between /scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi (Version linux-5.17.15)

TOMOYO Linux Cross Reference Linux/scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi

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Differences between /scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi (Version linux-5.17.15)

TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm64/ti/k3-j721s2-som-p0.dtsi