1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 2 /* 3 * dts file for Xilinx ZynqMP ZCU100 revC 3 * dts file for Xilinx ZynqMP ZCU100 revC 4 * 4 * 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. !! 5 * (C) Copyright 2016 - 2019, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro D << 7 * 6 * 8 * Michal Simek <michal.simek@amd.com> !! 7 * Michal Simek <michal.simek@xilinx.com> 9 * Nathalie Chan King Choy 8 * Nathalie Chan King Choy 10 */ 9 */ 11 10 12 /dts-v1/; 11 /dts-v1/; 13 12 14 #include "zynqmp.dtsi" 13 #include "zynqmp.dtsi" 15 #include "zynqmp-clk-ccf.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 16 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq 16 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/gpio/gpio.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h << 20 #include <dt-bindings/phy/phy.h> 18 #include <dt-bindings/phy/phy.h> 21 19 22 / { 20 / { 23 model = "ZynqMP ZCU100 RevC"; 21 model = "ZynqMP ZCU100 RevC"; 24 compatible = "xlnx,zynqmp-zcu100-revC" 22 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp"; 25 23 26 aliases { 24 aliases { 27 i2c0 = &i2c1; 25 i2c0 = &i2c1; 28 rtc0 = &rtc; 26 rtc0 = &rtc; 29 serial0 = &uart1; 27 serial0 = &uart1; 30 serial1 = &uart0; 28 serial1 = &uart0; 31 serial2 = &dcc; 29 serial2 = &dcc; 32 spi0 = &spi0; 30 spi0 = &spi0; 33 spi1 = &spi1; 31 spi1 = &spi1; 34 usb0 = &usb0; << 35 usb1 = &usb1; << 36 mmc0 = &sdhci0; 32 mmc0 = &sdhci0; 37 mmc1 = &sdhci1; 33 mmc1 = &sdhci1; 38 }; 34 }; 39 35 40 chosen { 36 chosen { 41 bootargs = "earlycon"; 37 bootargs = "earlycon"; 42 stdout-path = "serial0:115200n 38 stdout-path = "serial0:115200n8"; 43 }; 39 }; 44 40 45 memory@0 { 41 memory@0 { 46 device_type = "memory"; 42 device_type = "memory"; 47 reg = <0x0 0x0 0x0 0x80000000> 43 reg = <0x0 0x0 0x0 0x80000000>; 48 }; 44 }; 49 45 50 gpio-keys { 46 gpio-keys { 51 compatible = "gpio-keys"; 47 compatible = "gpio-keys"; 52 autorepeat; 48 autorepeat; 53 switch-4 { !! 49 sw4 { 54 label = "sw4"; 50 label = "sw4"; 55 gpios = <&gpio 23 GPIO 51 gpios = <&gpio 23 GPIO_ACTIVE_LOW>; 56 linux,code = <KEY_POWE 52 linux,code = <KEY_POWER>; 57 wakeup-source; 53 wakeup-source; 58 autorepeat; 54 autorepeat; 59 }; 55 }; 60 }; 56 }; 61 57 62 iio-hwmon { << 63 compatible = "iio-hwmon"; << 64 io-channels = <&xilinx_ams 0>, << 65 <&xilinx_ams 3>, << 66 <&xilinx_ams 6>, << 67 <&xilinx_ams 9>, << 68 <&xilinx_ams 11> << 69 }; << 70 << 71 leds { 58 leds { 72 compatible = "gpio-leds"; 59 compatible = "gpio-leds"; 73 led-ds2 { 60 led-ds2 { 74 label = "ds2"; 61 label = "ds2"; 75 gpios = <&gpio 20 GPIO 62 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; 76 linux,default-trigger 63 linux,default-trigger = "heartbeat"; 77 }; 64 }; 78 65 79 led-ds3 { 66 led-ds3 { 80 label = "ds3"; 67 label = "ds3"; 81 gpios = <&gpio 19 GPIO 68 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; 82 linux,default-trigger 69 linux,default-trigger = "phy0tx"; /* WLAN tx */ 83 default-state = "off"; 70 default-state = "off"; 84 }; 71 }; 85 72 86 led-ds4 { 73 led-ds4 { 87 label = "ds4"; 74 label = "ds4"; 88 gpios = <&gpio 18 GPIO 75 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; 89 linux,default-trigger 76 linux,default-trigger = "phy0rx"; /* WLAN rx */ 90 default-state = "off"; 77 default-state = "off"; 91 }; 78 }; 92 79 93 led-ds5 { 80 led-ds5 { 94 label = "ds5"; 81 label = "ds5"; 95 gpios = <&gpio 17 GPIO 82 gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; 96 linux,default-trigger 83 linux,default-trigger = "bluetooth-power"; 97 }; 84 }; 98 85 99 led-vbus-det { /* U5 USB5744 V !! 86 vbus-det { /* U5 USB5744 VBUS detection via MIO25 */ 100 label = "vbus_det"; 87 label = "vbus_det"; 101 gpios = <&gpio 25 GPIO 88 gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; 102 default-state = "on"; 89 default-state = "on"; 103 }; 90 }; 104 }; 91 }; 105 92 106 wmmcsdio_fixed: fixedregulator-mmcsdio 93 wmmcsdio_fixed: fixedregulator-mmcsdio { 107 compatible = "regulator-fixed" 94 compatible = "regulator-fixed"; 108 regulator-name = "wmmcsdio_fix 95 regulator-name = "wmmcsdio_fixed"; 109 regulator-min-microvolt = <330 96 regulator-min-microvolt = <3300000>; 110 regulator-max-microvolt = <330 97 regulator-max-microvolt = <3300000>; 111 regulator-always-on; 98 regulator-always-on; 112 regulator-boot-on; 99 regulator-boot-on; 113 }; 100 }; 114 101 115 sdio_pwrseq: sdio-pwrseq { 102 sdio_pwrseq: sdio-pwrseq { 116 compatible = "mmc-pwrseq-simpl 103 compatible = "mmc-pwrseq-simple"; 117 reset-gpios = <&gpio 7 GPIO_AC 104 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */ 118 post-power-on-delay-ms = <10>; 105 post-power-on-delay-ms = <10>; 119 }; 106 }; 120 107 121 ina226 { 108 ina226 { 122 compatible = "iio-hwmon"; 109 compatible = "iio-hwmon"; 123 io-channels = <&u35 0>, <&u35 110 io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>; 124 }; 111 }; 125 112 126 si5335_0: si5335-0 { /* clk0_usb - u23 !! 113 si5335a_0: clk26 { 127 compatible = "fixed-clock"; 114 compatible = "fixed-clock"; 128 #clock-cells = <0>; 115 #clock-cells = <0>; 129 clock-frequency = <26000000>; 116 clock-frequency = <26000000>; 130 }; 117 }; 131 118 132 si5335_1: si5335-1 { /* clk1_dp - u23 !! 119 si5335a_1: clk27 { 133 compatible = "fixed-clock"; 120 compatible = "fixed-clock"; 134 #clock-cells = <0>; 121 #clock-cells = <0>; 135 clock-frequency = <27000000>; 122 clock-frequency = <27000000>; 136 }; 123 }; 137 }; 124 }; 138 125 139 &dcc { 126 &dcc { 140 status = "okay"; 127 status = "okay"; 141 }; 128 }; 142 129 143 &gpio { 130 &gpio { 144 status = "okay"; 131 status = "okay"; 145 gpio-line-names = "UART1_TX", "UART1_R 132 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL", 146 "I2C1_SDA", "SPI1_SC 133 "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS", 147 "SPI1_MISO", "SPI1_M 134 "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1", 148 "SD0_DAT2", "SD0_DAT 135 "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1", 149 "PS_LED0", "SD0_CMD" 136 "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT", 150 "VBUS_DET", "POWER_I 137 "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE", 151 "DP_AUX_IN", "INA226 138 "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL", 152 "", "GPIO-A", "GPIO- 139 "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C", 153 "GPIO-D", "SPI0_CS", 140 "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E", 154 "GPIO-F", "SD1_D0", 141 "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3", 155 "SD1_CMD", "SD1_CLK" 142 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", 156 "USB0_NXT", "USB0_DA 143 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", 157 "USB0_DATA4", "USB0_ 144 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", 158 "USB1_DIR", "USB1_DA 145 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", 159 "USB1_STP", "USB1_DA 146 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", 160 "USB_DATA7", "WLAN_I 147 "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */ 161 "", "", 148 "", "", 162 "", "", "", "", "", 149 "", "", "", "", "", "", "", "", "", "", 163 "", "", "", "", "", 150 "", "", "", "", "", "", "", "", "", "", 164 "", "", "", "", "", 151 "", "", "", "", "", "", "", "", "", "", 165 "", "", "", "", "", 152 "", "", "", "", "", "", "", "", "", "", 166 "", "", "", "", "", 153 "", "", "", "", "", "", "", "", "", "", 167 "", "", "", "", "", 154 "", "", "", "", "", "", "", "", "", "", 168 "", "", "", "", "", 155 "", "", "", "", "", "", "", "", "", "", 169 "", "", "", "", "", 156 "", "", "", "", "", "", "", "", "", "", 170 "", "", "", "", "", 157 "", "", "", "", "", "", "", "", "", "", 171 "", "", "", ""; 158 "", "", "", ""; 172 }; 159 }; 173 160 174 &gpu { << 175 status = "okay"; << 176 }; << 177 << 178 &i2c1 { 161 &i2c1 { 179 status = "okay"; 162 status = "okay"; 180 pinctrl-names = "default", "gpio"; << 181 pinctrl-0 = <&pinctrl_i2c1_default>; << 182 pinctrl-1 = <&pinctrl_i2c1_gpio>; << 183 scl-gpios = <&gpio 4 (GPIO_ACTIVE_HIGH << 184 sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH << 185 clock-frequency = <100000>; 163 clock-frequency = <100000>; 186 i2c-mux@75 { /* u11 */ 164 i2c-mux@75 { /* u11 */ 187 compatible = "nxp,pca9548"; 165 compatible = "nxp,pca9548"; 188 #address-cells = <1>; 166 #address-cells = <1>; 189 #size-cells = <0>; 167 #size-cells = <0>; 190 reg = <0x75>; 168 reg = <0x75>; 191 i2csw_0: i2c@0 { 169 i2csw_0: i2c@0 { 192 #address-cells = <1>; 170 #address-cells = <1>; 193 #size-cells = <0>; 171 #size-cells = <0>; 194 reg = <0>; 172 reg = <0>; 195 label = "LS-I2C0"; 173 label = "LS-I2C0"; 196 }; 174 }; 197 i2csw_1: i2c@1 { 175 i2csw_1: i2c@1 { 198 #address-cells = <1>; 176 #address-cells = <1>; 199 #size-cells = <0>; 177 #size-cells = <0>; 200 reg = <1>; 178 reg = <1>; 201 label = "LS-I2C1"; 179 label = "LS-I2C1"; 202 }; 180 }; 203 i2csw_2: i2c@2 { 181 i2csw_2: i2c@2 { 204 #address-cells = <1>; 182 #address-cells = <1>; 205 #size-cells = <0>; 183 #size-cells = <0>; 206 reg = <2>; 184 reg = <2>; 207 label = "HS-I2C2"; 185 label = "HS-I2C2"; 208 }; 186 }; 209 i2csw_3: i2c@3 { 187 i2csw_3: i2c@3 { 210 #address-cells = <1>; 188 #address-cells = <1>; 211 #size-cells = <0>; 189 #size-cells = <0>; 212 reg = <3>; 190 reg = <3>; 213 label = "HS-I2C3"; 191 label = "HS-I2C3"; 214 }; 192 }; 215 i2csw_4: i2c@4 { 193 i2csw_4: i2c@4 { 216 #address-cells = <1>; 194 #address-cells = <1>; 217 #size-cells = <0>; 195 #size-cells = <0>; 218 reg = <0x4>; 196 reg = <0x4>; 219 197 220 pmic: pmic@5e { /* Cus 198 pmic: pmic@5e { /* Custom TI PMIC u33 */ 221 compatible = " 199 compatible = "ti,tps65086"; 222 reg = <0x5e>; 200 reg = <0x5e>; 223 interrupt-pare 201 interrupt-parent = <&gpio>; 224 interrupts = < 202 interrupts = <77 IRQ_TYPE_LEVEL_LOW>; 225 #gpio-cells = 203 #gpio-cells = <2>; 226 gpio-controlle 204 gpio-controller; 227 }; 205 }; 228 }; 206 }; 229 i2csw_5: i2c@5 { 207 i2csw_5: i2c@5 { 230 #address-cells = <1>; 208 #address-cells = <1>; 231 #size-cells = <0>; 209 #size-cells = <0>; 232 reg = <5>; 210 reg = <5>; 233 /* PS_PMBUS */ 211 /* PS_PMBUS */ 234 u35: ina226@40 { /* u3 212 u35: ina226@40 { /* u35 */ 235 compatible = " 213 compatible = "ti,ina226"; 236 #io-channel-ce 214 #io-channel-cells = <1>; 237 reg = <0x40>; 215 reg = <0x40>; 238 shunt-resistor 216 shunt-resistor = <10000>; 239 /* MIO31 is al 217 /* MIO31 is alert which should be routed to PMUFW */ 240 }; 218 }; 241 }; 219 }; 242 i2csw_6: i2c@6 { 220 i2csw_6: i2c@6 { 243 #address-cells = <1>; 221 #address-cells = <1>; 244 #size-cells = <0>; 222 #size-cells = <0>; 245 reg = <6>; 223 reg = <6>; 246 /* 224 /* 247 * Not Connected 225 * Not Connected 248 */ 226 */ 249 }; 227 }; 250 i2csw_7: i2c@7 { 228 i2csw_7: i2c@7 { 251 #address-cells = <1>; 229 #address-cells = <1>; 252 #size-cells = <0>; 230 #size-cells = <0>; 253 reg = <7>; 231 reg = <7>; 254 /* 232 /* 255 * usb5744 (DNP) - U5 233 * usb5744 (DNP) - U5 256 * 100kHz - this is de 234 * 100kHz - this is default freq for us 257 */ 235 */ 258 }; 236 }; 259 }; 237 }; 260 }; 238 }; 261 239 262 &pinctrl0 { << 263 status = "okay"; << 264 pinctrl_i2c1_default: i2c1-default { << 265 mux { << 266 groups = "i2c1_1_grp"; << 267 function = "i2c1"; << 268 }; << 269 << 270 conf { << 271 groups = "i2c1_1_grp"; << 272 bias-pull-up; << 273 slew-rate = <SLEW_RATE << 274 power-source = <IO_STA << 275 }; << 276 }; << 277 << 278 pinctrl_i2c1_gpio: i2c1-gpio-grp { << 279 mux { << 280 groups = "gpio0_4_grp" << 281 function = "gpio0"; << 282 }; << 283 << 284 conf { << 285 groups = "gpio0_4_grp" << 286 slew-rate = <SLEW_RATE << 287 power-source = <IO_STA << 288 }; << 289 }; << 290 << 291 pinctrl_sdhci0_default: sdhci0-default << 292 mux { << 293 groups = "sdio0_3_grp" << 294 function = "sdio0"; << 295 }; << 296 << 297 conf { << 298 groups = "sdio0_3_grp" << 299 slew-rate = <SLEW_RATE << 300 power-source = <IO_STA << 301 bias-disable; << 302 }; << 303 << 304 mux-cd { << 305 groups = "sdio0_cd_0_g << 306 function = "sdio0_cd"; << 307 }; << 308 << 309 conf-cd { << 310 groups = "sdio0_cd_0_g << 311 bias-high-impedance; << 312 bias-pull-up; << 313 slew-rate = <SLEW_RATE << 314 power-source = <IO_STA << 315 }; << 316 }; << 317 << 318 pinctrl_sdhci1_default: sdhci1-default << 319 mux { << 320 groups = "sdio1_2_grp" << 321 function = "sdio1"; << 322 }; << 323 << 324 conf { << 325 groups = "sdio1_2_grp" << 326 slew-rate = <SLEW_RATE << 327 power-source = <IO_STA << 328 bias-disable; << 329 }; << 330 }; << 331 << 332 pinctrl_spi0_default: spi0-default { << 333 mux { << 334 groups = "spi0_3_grp"; << 335 function = "spi0"; << 336 }; << 337 << 338 conf { << 339 groups = "spi0_3_grp"; << 340 bias-disable; << 341 slew-rate = <SLEW_RATE << 342 power-source = <IO_STA << 343 }; << 344 << 345 mux-cs { << 346 groups = "spi0_ss_9_gr << 347 function = "spi0_ss"; << 348 }; << 349 << 350 conf-cs { << 351 groups = "spi0_ss_9_gr << 352 bias-disable; << 353 }; << 354 << 355 }; << 356 << 357 pinctrl_spi1_default: spi1-default { << 358 mux { << 359 groups = "spi1_0_grp"; << 360 function = "spi1"; << 361 }; << 362 << 363 conf { << 364 groups = "spi1_0_grp"; << 365 bias-disable; << 366 slew-rate = <SLEW_RATE << 367 power-source = <IO_STA << 368 }; << 369 << 370 mux-cs { << 371 groups = "spi1_ss_0_gr << 372 function = "spi1_ss"; << 373 }; << 374 << 375 conf-cs { << 376 groups = "spi1_ss_0_gr << 377 bias-disable; << 378 }; << 379 << 380 }; << 381 << 382 pinctrl_uart0_default: uart0-default { << 383 mux { << 384 groups = "uart0_0_grp" << 385 function = "uart0"; << 386 }; << 387 << 388 conf { << 389 groups = "uart0_0_grp" << 390 slew-rate = <SLEW_RATE << 391 power-source = <IO_STA << 392 }; << 393 << 394 conf-rx { << 395 pins = "MIO3"; << 396 bias-high-impedance; << 397 }; << 398 << 399 conf-tx { << 400 pins = "MIO2"; << 401 bias-disable; << 402 }; << 403 }; << 404 << 405 pinctrl_uart1_default: uart1-default { << 406 mux { << 407 groups = "uart1_0_grp" << 408 function = "uart1"; << 409 }; << 410 << 411 conf { << 412 groups = "uart1_0_grp" << 413 slew-rate = <SLEW_RATE << 414 power-source = <IO_STA << 415 }; << 416 << 417 conf-rx { << 418 pins = "MIO1"; << 419 bias-high-impedance; << 420 }; << 421 << 422 conf-tx { << 423 pins = "MIO0"; << 424 bias-disable; << 425 }; << 426 }; << 427 << 428 pinctrl_usb0_default: usb0-default { << 429 mux { << 430 groups = "usb0_0_grp"; << 431 function = "usb0"; << 432 }; << 433 << 434 conf { << 435 groups = "usb0_0_grp"; << 436 power-source = <IO_STA << 437 }; << 438 << 439 conf-rx { << 440 pins = "MIO52", "MIO53 << 441 bias-high-impedance; << 442 drive-strength = <12>; << 443 slew-rate = <SLEW_RATE << 444 }; << 445 << 446 conf-tx { << 447 pins = "MIO54", "MIO56 << 448 "MIO60", "MIO61 << 449 bias-disable; << 450 drive-strength = <4>; << 451 slew-rate = <SLEW_RATE << 452 }; << 453 }; << 454 << 455 pinctrl_usb1_default: usb1-default { << 456 mux { << 457 groups = "usb1_0_grp"; << 458 function = "usb1"; << 459 }; << 460 << 461 conf { << 462 groups = "usb1_0_grp"; << 463 power-source = <IO_STA << 464 }; << 465 << 466 conf-rx { << 467 pins = "MIO64", "MIO65 << 468 bias-high-impedance; << 469 drive-strength = <12>; << 470 slew-rate = <SLEW_RATE << 471 }; << 472 << 473 conf-tx { << 474 pins = "MIO66", "MIO68 << 475 "MIO72", "MIO73 << 476 bias-disable; << 477 drive-strength = <4>; << 478 slew-rate = <SLEW_RATE << 479 }; << 480 }; << 481 }; << 482 << 483 &psgtr { 240 &psgtr { 484 status = "okay"; 241 status = "okay"; 485 /* usb3, dp */ !! 242 /* usb3, dps */ 486 clocks = <&si5335_0>, <&si5335_1>; !! 243 clocks = <&si5335a_0>, <&si5335a_1>; 487 clock-names = "ref0", "ref1"; 244 clock-names = "ref0", "ref1"; 488 }; 245 }; 489 246 490 &rtc { 247 &rtc { 491 status = "okay"; 248 status = "okay"; 492 }; 249 }; 493 250 494 /* SD0 only supports 3.3V, no level shifter */ 251 /* SD0 only supports 3.3V, no level shifter */ 495 &sdhci0 { 252 &sdhci0 { 496 status = "okay"; 253 status = "okay"; 497 no-1-8-v; 254 no-1-8-v; 498 disable-wp; 255 disable-wp; 499 pinctrl-names = "default"; << 500 pinctrl-0 = <&pinctrl_sdhci0_default>; << 501 xlnx,mio-bank = <0>; 256 xlnx,mio-bank = <0>; 502 }; 257 }; 503 258 504 &sdhci1 { 259 &sdhci1 { 505 status = "okay"; 260 status = "okay"; 506 bus-width = <0x4>; 261 bus-width = <0x4>; 507 pinctrl-names = "default"; << 508 pinctrl-0 = <&pinctrl_sdhci1_default>; << 509 xlnx,mio-bank = <0>; 262 xlnx,mio-bank = <0>; 510 non-removable; 263 non-removable; 511 disable-wp; 264 disable-wp; 512 cap-power-off-card; 265 cap-power-off-card; 513 mmc-pwrseq = <&sdio_pwrseq>; 266 mmc-pwrseq = <&sdio_pwrseq>; 514 vqmmc-supply = <&wmmcsdio_fixed>; 267 vqmmc-supply = <&wmmcsdio_fixed>; 515 #address-cells = <1>; 268 #address-cells = <1>; 516 #size-cells = <0>; 269 #size-cells = <0>; 517 wlcore: wifi@2 { 270 wlcore: wifi@2 { 518 compatible = "ti,wl1831"; 271 compatible = "ti,wl1831"; 519 reg = <2>; 272 reg = <2>; 520 interrupt-parent = <&gpio>; 273 interrupt-parent = <&gpio>; 521 interrupts = <76 IRQ_TYPE_EDGE 274 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */ 522 }; 275 }; 523 }; 276 }; 524 277 525 &spi0 { /* Low Speed connector */ 278 &spi0 { /* Low Speed connector */ 526 status = "okay"; 279 status = "okay"; 527 label = "LS-SPI0"; 280 label = "LS-SPI0"; 528 num-cs = <1>; 281 num-cs = <1>; 529 pinctrl-names = "default"; << 530 pinctrl-0 = <&pinctrl_spi0_default>; << 531 }; 282 }; 532 283 533 &spi1 { /* High Speed connector */ 284 &spi1 { /* High Speed connector */ 534 status = "okay"; 285 status = "okay"; 535 label = "HS-SPI1"; 286 label = "HS-SPI1"; 536 num-cs = <1>; 287 num-cs = <1>; 537 pinctrl-names = "default"; << 538 pinctrl-0 = <&pinctrl_spi1_default>; << 539 }; 288 }; 540 289 541 &uart0 { 290 &uart0 { 542 status = "okay"; 291 status = "okay"; 543 pinctrl-names = "default"; << 544 pinctrl-0 = <&pinctrl_uart0_default>; << 545 bluetooth { 292 bluetooth { 546 compatible = "ti,wl1831-st"; 293 compatible = "ti,wl1831-st"; 547 enable-gpios = <&gpio 8 GPIO_A 294 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; 548 }; 295 }; 549 }; 296 }; 550 297 551 &uart1 { 298 &uart1 { 552 status = "okay"; 299 status = "okay"; 553 pinctrl-names = "default"; !! 300 554 pinctrl-0 = <&pinctrl_uart1_default>; << 555 }; 301 }; 556 302 557 /* ULPI SMSC USB3320 */ 303 /* ULPI SMSC USB3320 */ 558 &usb0 { 304 &usb0 { 559 status = "okay"; 305 status = "okay"; 560 pinctrl-names = "default"; << 561 pinctrl-0 = <&pinctrl_usb0_default>; << 562 phy-names = "usb3-phy"; << 563 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>; << 564 /delete-property/ reset-gpios; << 565 }; << 566 << 567 &dwc3_0 { << 568 status = "okay"; << 569 dr_mode = "peripheral"; 306 dr_mode = "peripheral"; 570 maximum-speed = "super-speed"; << 571 }; 307 }; 572 308 573 /* ULPI SMSC USB3320 */ 309 /* ULPI SMSC USB3320 */ 574 &usb1 { 310 &usb1 { 575 status = "okay"; 311 status = "okay"; 576 pinctrl-names = "default"; << 577 pinctrl-0 = <&pinctrl_usb1_default>; << 578 phy-names = "usb3-phy"; << 579 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>; << 580 reset-gpios = <&modepin_gpio 1 GPIO_AC << 581 }; << 582 << 583 &dwc3_1 { << 584 status = "okay"; << 585 dr_mode = "host"; 312 dr_mode = "host"; 586 maximum-speed = "super-speed"; << 587 }; 313 }; 588 314 589 &watchdog0 { 315 &watchdog0 { 590 status = "okay"; << 591 }; << 592 << 593 &xilinx_ams { << 594 status = "okay"; << 595 }; << 596 << 597 &ams_ps { << 598 status = "okay"; 316 status = "okay"; 599 }; 317 }; 600 318 601 &zynqmp_dpdma { 319 &zynqmp_dpdma { 602 status = "okay"; 320 status = "okay"; 603 }; 321 }; 604 322 605 &zynqmp_dpsub { 323 &zynqmp_dpsub { 606 status = "okay"; 324 status = "okay"; 607 phy-names = "dp-phy0", "dp-phy1"; 325 phy-names = "dp-phy0", "dp-phy1"; 608 phys = <&psgtr 1 PHY_TYPE_DP 0 1>, 326 phys = <&psgtr 1 PHY_TYPE_DP 0 1>, 609 <&psgtr 0 PHY_TYPE_DP 1 1>; 327 <&psgtr 0 PHY_TYPE_DP 1 1>; 610 }; 328 };
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