1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /* 2 /*
3 * dts file for Xilinx ZynqMP ZCU100 revC 3 * dts file for Xilinx ZynqMP ZCU100 revC
4 * 4 *
5 * (C) Copyright 2016 - 2022, Xilinx, Inc. !! 5 * (C) Copyright 2016 - 2021, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro D <<
7 * 6 *
8 * Michal Simek <michal.simek@amd.com> !! 7 * Michal Simek <michal.simek@xilinx.com>
9 * Nathalie Chan King Choy 8 * Nathalie Chan King Choy
10 */ 9 */
11 10
12 /dts-v1/; 11 /dts-v1/;
13 12
14 #include "zynqmp.dtsi" 13 #include "zynqmp.dtsi"
15 #include "zynqmp-clk-ccf.dtsi" 14 #include "zynqmp-clk-ccf.dtsi"
16 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq 16 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/gpio/gpio.h>
19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h 18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 #include <dt-bindings/phy/phy.h> 19 #include <dt-bindings/phy/phy.h>
21 20
22 / { 21 / {
23 model = "ZynqMP ZCU100 RevC"; 22 model = "ZynqMP ZCU100 RevC";
24 compatible = "xlnx,zynqmp-zcu100-revC" 23 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
25 24
26 aliases { 25 aliases {
27 i2c0 = &i2c1; 26 i2c0 = &i2c1;
28 rtc0 = &rtc; 27 rtc0 = &rtc;
29 serial0 = &uart1; 28 serial0 = &uart1;
30 serial1 = &uart0; 29 serial1 = &uart0;
31 serial2 = &dcc; 30 serial2 = &dcc;
32 spi0 = &spi0; 31 spi0 = &spi0;
33 spi1 = &spi1; 32 spi1 = &spi1;
34 usb0 = &usb0; 33 usb0 = &usb0;
35 usb1 = &usb1; 34 usb1 = &usb1;
36 mmc0 = &sdhci0; 35 mmc0 = &sdhci0;
37 mmc1 = &sdhci1; 36 mmc1 = &sdhci1;
38 }; 37 };
39 38
40 chosen { 39 chosen {
41 bootargs = "earlycon"; 40 bootargs = "earlycon";
42 stdout-path = "serial0:115200n 41 stdout-path = "serial0:115200n8";
43 }; 42 };
44 43
45 memory@0 { 44 memory@0 {
46 device_type = "memory"; 45 device_type = "memory";
47 reg = <0x0 0x0 0x0 0x80000000> 46 reg = <0x0 0x0 0x0 0x80000000>;
48 }; 47 };
49 48
50 gpio-keys { 49 gpio-keys {
51 compatible = "gpio-keys"; 50 compatible = "gpio-keys";
52 autorepeat; 51 autorepeat;
53 switch-4 { 52 switch-4 {
54 label = "sw4"; 53 label = "sw4";
55 gpios = <&gpio 23 GPIO 54 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
56 linux,code = <KEY_POWE 55 linux,code = <KEY_POWER>;
57 wakeup-source; 56 wakeup-source;
58 autorepeat; 57 autorepeat;
59 }; 58 };
60 }; 59 };
61 60
62 iio-hwmon { <<
63 compatible = "iio-hwmon"; <<
64 io-channels = <&xilinx_ams 0>, <<
65 <&xilinx_ams 3>, <<
66 <&xilinx_ams 6>, <<
67 <&xilinx_ams 9>, <<
68 <&xilinx_ams 11> <<
69 }; <<
70 <<
71 leds { 61 leds {
72 compatible = "gpio-leds"; 62 compatible = "gpio-leds";
73 led-ds2 { 63 led-ds2 {
74 label = "ds2"; 64 label = "ds2";
75 gpios = <&gpio 20 GPIO 65 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
76 linux,default-trigger 66 linux,default-trigger = "heartbeat";
77 }; 67 };
78 68
79 led-ds3 { 69 led-ds3 {
80 label = "ds3"; 70 label = "ds3";
81 gpios = <&gpio 19 GPIO 71 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
82 linux,default-trigger 72 linux,default-trigger = "phy0tx"; /* WLAN tx */
83 default-state = "off"; 73 default-state = "off";
84 }; 74 };
85 75
86 led-ds4 { 76 led-ds4 {
87 label = "ds4"; 77 label = "ds4";
88 gpios = <&gpio 18 GPIO 78 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
89 linux,default-trigger 79 linux,default-trigger = "phy0rx"; /* WLAN rx */
90 default-state = "off"; 80 default-state = "off";
91 }; 81 };
92 82
93 led-ds5 { 83 led-ds5 {
94 label = "ds5"; 84 label = "ds5";
95 gpios = <&gpio 17 GPIO 85 gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
96 linux,default-trigger 86 linux,default-trigger = "bluetooth-power";
97 }; 87 };
98 88
99 led-vbus-det { /* U5 USB5744 V 89 led-vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
100 label = "vbus_det"; 90 label = "vbus_det";
101 gpios = <&gpio 25 GPIO 91 gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
102 default-state = "on"; 92 default-state = "on";
103 }; 93 };
104 }; 94 };
105 95
106 wmmcsdio_fixed: fixedregulator-mmcsdio 96 wmmcsdio_fixed: fixedregulator-mmcsdio {
107 compatible = "regulator-fixed" 97 compatible = "regulator-fixed";
108 regulator-name = "wmmcsdio_fix 98 regulator-name = "wmmcsdio_fixed";
109 regulator-min-microvolt = <330 99 regulator-min-microvolt = <3300000>;
110 regulator-max-microvolt = <330 100 regulator-max-microvolt = <3300000>;
111 regulator-always-on; 101 regulator-always-on;
112 regulator-boot-on; 102 regulator-boot-on;
113 }; 103 };
114 104
115 sdio_pwrseq: sdio-pwrseq { 105 sdio_pwrseq: sdio-pwrseq {
116 compatible = "mmc-pwrseq-simpl 106 compatible = "mmc-pwrseq-simple";
117 reset-gpios = <&gpio 7 GPIO_AC 107 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
118 post-power-on-delay-ms = <10>; 108 post-power-on-delay-ms = <10>;
119 }; 109 };
120 110
121 ina226 { 111 ina226 {
122 compatible = "iio-hwmon"; 112 compatible = "iio-hwmon";
123 io-channels = <&u35 0>, <&u35 113 io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
124 }; 114 };
125 115
126 si5335_0: si5335-0 { /* clk0_usb - u23 !! 116 si5335_0: si5335_0 { /* clk0_usb - u23 */
127 compatible = "fixed-clock"; 117 compatible = "fixed-clock";
128 #clock-cells = <0>; 118 #clock-cells = <0>;
129 clock-frequency = <26000000>; 119 clock-frequency = <26000000>;
130 }; 120 };
131 121
132 si5335_1: si5335-1 { /* clk1_dp - u23 !! 122 si5335_1: si5335_1 { /* clk1_dp - u23 */
133 compatible = "fixed-clock"; 123 compatible = "fixed-clock";
134 #clock-cells = <0>; 124 #clock-cells = <0>;
135 clock-frequency = <27000000>; 125 clock-frequency = <27000000>;
136 }; 126 };
137 }; 127 };
138 128
139 &dcc { 129 &dcc {
140 status = "okay"; 130 status = "okay";
141 }; 131 };
142 132
143 &gpio { 133 &gpio {
144 status = "okay"; 134 status = "okay";
145 gpio-line-names = "UART1_TX", "UART1_R 135 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
146 "I2C1_SDA", "SPI1_SC 136 "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
147 "SPI1_MISO", "SPI1_M 137 "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
148 "SD0_DAT2", "SD0_DAT 138 "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
149 "PS_LED0", "SD0_CMD" 139 "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
150 "VBUS_DET", "POWER_I 140 "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
151 "DP_AUX_IN", "INA226 141 "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
152 "", "GPIO-A", "GPIO- 142 "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
153 "GPIO-D", "SPI0_CS", 143 "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
154 "GPIO-F", "SD1_D0", 144 "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
155 "SD1_CMD", "SD1_CLK" 145 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
156 "USB0_NXT", "USB0_DA 146 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
157 "USB0_DATA4", "USB0_ 147 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
158 "USB1_DIR", "USB1_DA 148 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
159 "USB1_STP", "USB1_DA 149 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
160 "USB_DATA7", "WLAN_I 150 "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
161 "", "", 151 "", "",
162 "", "", "", "", "", 152 "", "", "", "", "", "", "", "", "", "",
163 "", "", "", "", "", 153 "", "", "", "", "", "", "", "", "", "",
164 "", "", "", "", "", 154 "", "", "", "", "", "", "", "", "", "",
165 "", "", "", "", "", 155 "", "", "", "", "", "", "", "", "", "",
166 "", "", "", "", "", 156 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", 157 "", "", "", "", "", "", "", "", "", "",
168 "", "", "", "", "", 158 "", "", "", "", "", "", "", "", "", "",
169 "", "", "", "", "", 159 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", 160 "", "", "", "", "", "", "", "", "", "",
171 "", "", "", ""; 161 "", "", "", "";
172 }; 162 };
173 163
174 &gpu { <<
175 status = "okay"; <<
176 }; <<
177 <<
178 &i2c1 { 164 &i2c1 {
179 status = "okay"; 165 status = "okay";
180 pinctrl-names = "default", "gpio"; 166 pinctrl-names = "default", "gpio";
181 pinctrl-0 = <&pinctrl_i2c1_default>; 167 pinctrl-0 = <&pinctrl_i2c1_default>;
182 pinctrl-1 = <&pinctrl_i2c1_gpio>; 168 pinctrl-1 = <&pinctrl_i2c1_gpio>;
183 scl-gpios = <&gpio 4 (GPIO_ACTIVE_HIGH !! 169 scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
184 sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH !! 170 sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
185 clock-frequency = <100000>; 171 clock-frequency = <100000>;
186 i2c-mux@75 { /* u11 */ 172 i2c-mux@75 { /* u11 */
187 compatible = "nxp,pca9548"; 173 compatible = "nxp,pca9548";
188 #address-cells = <1>; 174 #address-cells = <1>;
189 #size-cells = <0>; 175 #size-cells = <0>;
190 reg = <0x75>; 176 reg = <0x75>;
191 i2csw_0: i2c@0 { 177 i2csw_0: i2c@0 {
192 #address-cells = <1>; 178 #address-cells = <1>;
193 #size-cells = <0>; 179 #size-cells = <0>;
194 reg = <0>; 180 reg = <0>;
195 label = "LS-I2C0"; 181 label = "LS-I2C0";
196 }; 182 };
197 i2csw_1: i2c@1 { 183 i2csw_1: i2c@1 {
198 #address-cells = <1>; 184 #address-cells = <1>;
199 #size-cells = <0>; 185 #size-cells = <0>;
200 reg = <1>; 186 reg = <1>;
201 label = "LS-I2C1"; 187 label = "LS-I2C1";
202 }; 188 };
203 i2csw_2: i2c@2 { 189 i2csw_2: i2c@2 {
204 #address-cells = <1>; 190 #address-cells = <1>;
205 #size-cells = <0>; 191 #size-cells = <0>;
206 reg = <2>; 192 reg = <2>;
207 label = "HS-I2C2"; 193 label = "HS-I2C2";
208 }; 194 };
209 i2csw_3: i2c@3 { 195 i2csw_3: i2c@3 {
210 #address-cells = <1>; 196 #address-cells = <1>;
211 #size-cells = <0>; 197 #size-cells = <0>;
212 reg = <3>; 198 reg = <3>;
213 label = "HS-I2C3"; 199 label = "HS-I2C3";
214 }; 200 };
215 i2csw_4: i2c@4 { 201 i2csw_4: i2c@4 {
216 #address-cells = <1>; 202 #address-cells = <1>;
217 #size-cells = <0>; 203 #size-cells = <0>;
218 reg = <0x4>; 204 reg = <0x4>;
219 205
220 pmic: pmic@5e { /* Cus 206 pmic: pmic@5e { /* Custom TI PMIC u33 */
221 compatible = " 207 compatible = "ti,tps65086";
222 reg = <0x5e>; 208 reg = <0x5e>;
223 interrupt-pare 209 interrupt-parent = <&gpio>;
224 interrupts = < 210 interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
225 #gpio-cells = 211 #gpio-cells = <2>;
226 gpio-controlle 212 gpio-controller;
227 }; 213 };
228 }; 214 };
229 i2csw_5: i2c@5 { 215 i2csw_5: i2c@5 {
230 #address-cells = <1>; 216 #address-cells = <1>;
231 #size-cells = <0>; 217 #size-cells = <0>;
232 reg = <5>; 218 reg = <5>;
233 /* PS_PMBUS */ 219 /* PS_PMBUS */
234 u35: ina226@40 { /* u3 220 u35: ina226@40 { /* u35 */
235 compatible = " 221 compatible = "ti,ina226";
236 #io-channel-ce 222 #io-channel-cells = <1>;
237 reg = <0x40>; 223 reg = <0x40>;
238 shunt-resistor 224 shunt-resistor = <10000>;
239 /* MIO31 is al 225 /* MIO31 is alert which should be routed to PMUFW */
240 }; 226 };
241 }; 227 };
242 i2csw_6: i2c@6 { 228 i2csw_6: i2c@6 {
243 #address-cells = <1>; 229 #address-cells = <1>;
244 #size-cells = <0>; 230 #size-cells = <0>;
245 reg = <6>; 231 reg = <6>;
246 /* 232 /*
247 * Not Connected 233 * Not Connected
248 */ 234 */
249 }; 235 };
250 i2csw_7: i2c@7 { 236 i2csw_7: i2c@7 {
251 #address-cells = <1>; 237 #address-cells = <1>;
252 #size-cells = <0>; 238 #size-cells = <0>;
253 reg = <7>; 239 reg = <7>;
254 /* 240 /*
255 * usb5744 (DNP) - U5 241 * usb5744 (DNP) - U5
256 * 100kHz - this is de 242 * 100kHz - this is default freq for us
257 */ 243 */
258 }; 244 };
259 }; 245 };
260 }; 246 };
261 247
262 &pinctrl0 { 248 &pinctrl0 {
263 status = "okay"; 249 status = "okay";
264 pinctrl_i2c1_default: i2c1-default { 250 pinctrl_i2c1_default: i2c1-default {
265 mux { 251 mux {
266 groups = "i2c1_1_grp"; 252 groups = "i2c1_1_grp";
267 function = "i2c1"; 253 function = "i2c1";
268 }; 254 };
269 255
270 conf { 256 conf {
271 groups = "i2c1_1_grp"; 257 groups = "i2c1_1_grp";
272 bias-pull-up; 258 bias-pull-up;
273 slew-rate = <SLEW_RATE 259 slew-rate = <SLEW_RATE_SLOW>;
274 power-source = <IO_STA 260 power-source = <IO_STANDARD_LVCMOS18>;
275 }; 261 };
276 }; 262 };
277 263
278 pinctrl_i2c1_gpio: i2c1-gpio-grp { !! 264 pinctrl_i2c1_gpio: i2c1-gpio {
279 mux { 265 mux {
280 groups = "gpio0_4_grp" 266 groups = "gpio0_4_grp", "gpio0_5_grp";
281 function = "gpio0"; 267 function = "gpio0";
282 }; 268 };
283 269
284 conf { 270 conf {
285 groups = "gpio0_4_grp" 271 groups = "gpio0_4_grp", "gpio0_5_grp";
286 slew-rate = <SLEW_RATE 272 slew-rate = <SLEW_RATE_SLOW>;
287 power-source = <IO_STA 273 power-source = <IO_STANDARD_LVCMOS18>;
288 }; 274 };
289 }; 275 };
290 276
291 pinctrl_sdhci0_default: sdhci0-default 277 pinctrl_sdhci0_default: sdhci0-default {
292 mux { 278 mux {
293 groups = "sdio0_3_grp" 279 groups = "sdio0_3_grp";
294 function = "sdio0"; 280 function = "sdio0";
295 }; 281 };
296 282
297 conf { 283 conf {
298 groups = "sdio0_3_grp" 284 groups = "sdio0_3_grp";
299 slew-rate = <SLEW_RATE 285 slew-rate = <SLEW_RATE_SLOW>;
300 power-source = <IO_STA 286 power-source = <IO_STANDARD_LVCMOS18>;
301 bias-disable; 287 bias-disable;
302 }; 288 };
303 289
304 mux-cd { 290 mux-cd {
305 groups = "sdio0_cd_0_g 291 groups = "sdio0_cd_0_grp";
306 function = "sdio0_cd"; 292 function = "sdio0_cd";
307 }; 293 };
308 294
309 conf-cd { 295 conf-cd {
310 groups = "sdio0_cd_0_g 296 groups = "sdio0_cd_0_grp";
311 bias-high-impedance; 297 bias-high-impedance;
312 bias-pull-up; 298 bias-pull-up;
313 slew-rate = <SLEW_RATE 299 slew-rate = <SLEW_RATE_SLOW>;
314 power-source = <IO_STA 300 power-source = <IO_STANDARD_LVCMOS18>;
315 }; 301 };
316 }; 302 };
317 303
318 pinctrl_sdhci1_default: sdhci1-default 304 pinctrl_sdhci1_default: sdhci1-default {
319 mux { 305 mux {
320 groups = "sdio1_2_grp" 306 groups = "sdio1_2_grp";
321 function = "sdio1"; 307 function = "sdio1";
322 }; 308 };
323 309
324 conf { 310 conf {
325 groups = "sdio1_2_grp" 311 groups = "sdio1_2_grp";
326 slew-rate = <SLEW_RATE 312 slew-rate = <SLEW_RATE_SLOW>;
327 power-source = <IO_STA 313 power-source = <IO_STANDARD_LVCMOS18>;
328 bias-disable; 314 bias-disable;
329 }; 315 };
330 }; 316 };
331 317
332 pinctrl_spi0_default: spi0-default { 318 pinctrl_spi0_default: spi0-default {
333 mux { 319 mux {
334 groups = "spi0_3_grp"; 320 groups = "spi0_3_grp";
335 function = "spi0"; 321 function = "spi0";
336 }; 322 };
337 323
338 conf { 324 conf {
339 groups = "spi0_3_grp"; 325 groups = "spi0_3_grp";
340 bias-disable; 326 bias-disable;
341 slew-rate = <SLEW_RATE 327 slew-rate = <SLEW_RATE_SLOW>;
342 power-source = <IO_STA 328 power-source = <IO_STANDARD_LVCMOS18>;
343 }; 329 };
344 330
345 mux-cs { 331 mux-cs {
346 groups = "spi0_ss_9_gr 332 groups = "spi0_ss_9_grp";
347 function = "spi0_ss"; 333 function = "spi0_ss";
348 }; 334 };
349 335
350 conf-cs { 336 conf-cs {
351 groups = "spi0_ss_9_gr 337 groups = "spi0_ss_9_grp";
352 bias-disable; 338 bias-disable;
353 }; 339 };
354 340
355 }; 341 };
356 342
357 pinctrl_spi1_default: spi1-default { 343 pinctrl_spi1_default: spi1-default {
358 mux { 344 mux {
359 groups = "spi1_0_grp"; 345 groups = "spi1_0_grp";
360 function = "spi1"; 346 function = "spi1";
361 }; 347 };
362 348
363 conf { 349 conf {
364 groups = "spi1_0_grp"; 350 groups = "spi1_0_grp";
365 bias-disable; 351 bias-disable;
366 slew-rate = <SLEW_RATE 352 slew-rate = <SLEW_RATE_SLOW>;
367 power-source = <IO_STA 353 power-source = <IO_STANDARD_LVCMOS18>;
368 }; 354 };
369 355
370 mux-cs { 356 mux-cs {
371 groups = "spi1_ss_0_gr 357 groups = "spi1_ss_0_grp";
372 function = "spi1_ss"; 358 function = "spi1_ss";
373 }; 359 };
374 360
375 conf-cs { 361 conf-cs {
376 groups = "spi1_ss_0_gr 362 groups = "spi1_ss_0_grp";
377 bias-disable; 363 bias-disable;
378 }; 364 };
379 365
380 }; 366 };
381 367
382 pinctrl_uart0_default: uart0-default { 368 pinctrl_uart0_default: uart0-default {
383 mux { 369 mux {
384 groups = "uart0_0_grp" 370 groups = "uart0_0_grp";
385 function = "uart0"; 371 function = "uart0";
386 }; 372 };
387 373
388 conf { 374 conf {
389 groups = "uart0_0_grp" 375 groups = "uart0_0_grp";
390 slew-rate = <SLEW_RATE 376 slew-rate = <SLEW_RATE_SLOW>;
391 power-source = <IO_STA 377 power-source = <IO_STANDARD_LVCMOS18>;
392 }; 378 };
393 379
394 conf-rx { 380 conf-rx {
395 pins = "MIO3"; 381 pins = "MIO3";
396 bias-high-impedance; 382 bias-high-impedance;
397 }; 383 };
398 384
399 conf-tx { 385 conf-tx {
400 pins = "MIO2"; 386 pins = "MIO2";
401 bias-disable; 387 bias-disable;
402 }; 388 };
403 }; 389 };
404 390
405 pinctrl_uart1_default: uart1-default { 391 pinctrl_uart1_default: uart1-default {
406 mux { 392 mux {
407 groups = "uart1_0_grp" 393 groups = "uart1_0_grp";
408 function = "uart1"; 394 function = "uart1";
409 }; 395 };
410 396
411 conf { 397 conf {
412 groups = "uart1_0_grp" 398 groups = "uart1_0_grp";
413 slew-rate = <SLEW_RATE 399 slew-rate = <SLEW_RATE_SLOW>;
414 power-source = <IO_STA 400 power-source = <IO_STANDARD_LVCMOS18>;
415 }; 401 };
416 402
417 conf-rx { 403 conf-rx {
418 pins = "MIO1"; 404 pins = "MIO1";
419 bias-high-impedance; 405 bias-high-impedance;
420 }; 406 };
421 407
422 conf-tx { 408 conf-tx {
423 pins = "MIO0"; 409 pins = "MIO0";
424 bias-disable; 410 bias-disable;
425 }; 411 };
426 }; 412 };
427 413
428 pinctrl_usb0_default: usb0-default { 414 pinctrl_usb0_default: usb0-default {
429 mux { 415 mux {
430 groups = "usb0_0_grp"; 416 groups = "usb0_0_grp";
431 function = "usb0"; 417 function = "usb0";
432 }; 418 };
433 419
434 conf { 420 conf {
435 groups = "usb0_0_grp"; 421 groups = "usb0_0_grp";
>> 422 slew-rate = <SLEW_RATE_SLOW>;
436 power-source = <IO_STA 423 power-source = <IO_STANDARD_LVCMOS18>;
437 }; 424 };
438 425
439 conf-rx { 426 conf-rx {
440 pins = "MIO52", "MIO53 427 pins = "MIO52", "MIO53", "MIO55";
441 bias-high-impedance; 428 bias-high-impedance;
442 drive-strength = <12>; <<
443 slew-rate = <SLEW_RATE <<
444 }; 429 };
445 430
446 conf-tx { 431 conf-tx {
447 pins = "MIO54", "MIO56 432 pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
448 "MIO60", "MIO61 433 "MIO60", "MIO61", "MIO62", "MIO63";
449 bias-disable; 434 bias-disable;
450 drive-strength = <4>; <<
451 slew-rate = <SLEW_RATE <<
452 }; 435 };
453 }; 436 };
454 437
455 pinctrl_usb1_default: usb1-default { 438 pinctrl_usb1_default: usb1-default {
456 mux { 439 mux {
457 groups = "usb1_0_grp"; 440 groups = "usb1_0_grp";
458 function = "usb1"; 441 function = "usb1";
459 }; 442 };
460 443
461 conf { 444 conf {
462 groups = "usb1_0_grp"; 445 groups = "usb1_0_grp";
>> 446 slew-rate = <SLEW_RATE_SLOW>;
463 power-source = <IO_STA 447 power-source = <IO_STANDARD_LVCMOS18>;
464 }; 448 };
465 449
466 conf-rx { 450 conf-rx {
467 pins = "MIO64", "MIO65 451 pins = "MIO64", "MIO65", "MIO67";
468 bias-high-impedance; 452 bias-high-impedance;
469 drive-strength = <12>; <<
470 slew-rate = <SLEW_RATE <<
471 }; 453 };
472 454
473 conf-tx { 455 conf-tx {
474 pins = "MIO66", "MIO68 456 pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
475 "MIO72", "MIO73 457 "MIO72", "MIO73", "MIO74", "MIO75";
476 bias-disable; 458 bias-disable;
477 drive-strength = <4>; <<
478 slew-rate = <SLEW_RATE <<
479 }; 459 };
480 }; 460 };
481 }; 461 };
482 462
483 &psgtr { 463 &psgtr {
484 status = "okay"; 464 status = "okay";
485 /* usb3, dp */ 465 /* usb3, dp */
486 clocks = <&si5335_0>, <&si5335_1>; 466 clocks = <&si5335_0>, <&si5335_1>;
487 clock-names = "ref0", "ref1"; 467 clock-names = "ref0", "ref1";
488 }; 468 };
489 469
490 &rtc { 470 &rtc {
491 status = "okay"; 471 status = "okay";
492 }; 472 };
493 473
494 /* SD0 only supports 3.3V, no level shifter */ 474 /* SD0 only supports 3.3V, no level shifter */
495 &sdhci0 { 475 &sdhci0 {
496 status = "okay"; 476 status = "okay";
497 no-1-8-v; 477 no-1-8-v;
498 disable-wp; 478 disable-wp;
499 pinctrl-names = "default"; 479 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_sdhci0_default>; 480 pinctrl-0 = <&pinctrl_sdhci0_default>;
501 xlnx,mio-bank = <0>; 481 xlnx,mio-bank = <0>;
502 }; 482 };
503 483
504 &sdhci1 { 484 &sdhci1 {
505 status = "okay"; 485 status = "okay";
506 bus-width = <0x4>; 486 bus-width = <0x4>;
507 pinctrl-names = "default"; 487 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_sdhci1_default>; 488 pinctrl-0 = <&pinctrl_sdhci1_default>;
509 xlnx,mio-bank = <0>; 489 xlnx,mio-bank = <0>;
510 non-removable; 490 non-removable;
511 disable-wp; 491 disable-wp;
512 cap-power-off-card; 492 cap-power-off-card;
513 mmc-pwrseq = <&sdio_pwrseq>; 493 mmc-pwrseq = <&sdio_pwrseq>;
514 vqmmc-supply = <&wmmcsdio_fixed>; 494 vqmmc-supply = <&wmmcsdio_fixed>;
515 #address-cells = <1>; 495 #address-cells = <1>;
516 #size-cells = <0>; 496 #size-cells = <0>;
517 wlcore: wifi@2 { 497 wlcore: wifi@2 {
518 compatible = "ti,wl1831"; 498 compatible = "ti,wl1831";
519 reg = <2>; 499 reg = <2>;
520 interrupt-parent = <&gpio>; 500 interrupt-parent = <&gpio>;
521 interrupts = <76 IRQ_TYPE_EDGE 501 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
522 }; 502 };
523 }; 503 };
524 504
525 &spi0 { /* Low Speed connector */ 505 &spi0 { /* Low Speed connector */
526 status = "okay"; 506 status = "okay";
527 label = "LS-SPI0"; 507 label = "LS-SPI0";
528 num-cs = <1>; 508 num-cs = <1>;
529 pinctrl-names = "default"; 509 pinctrl-names = "default";
530 pinctrl-0 = <&pinctrl_spi0_default>; 510 pinctrl-0 = <&pinctrl_spi0_default>;
531 }; 511 };
532 512
533 &spi1 { /* High Speed connector */ 513 &spi1 { /* High Speed connector */
534 status = "okay"; 514 status = "okay";
535 label = "HS-SPI1"; 515 label = "HS-SPI1";
536 num-cs = <1>; 516 num-cs = <1>;
537 pinctrl-names = "default"; 517 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_spi1_default>; 518 pinctrl-0 = <&pinctrl_spi1_default>;
539 }; 519 };
540 520
541 &uart0 { 521 &uart0 {
542 status = "okay"; 522 status = "okay";
543 pinctrl-names = "default"; 523 pinctrl-names = "default";
544 pinctrl-0 = <&pinctrl_uart0_default>; 524 pinctrl-0 = <&pinctrl_uart0_default>;
545 bluetooth { 525 bluetooth {
546 compatible = "ti,wl1831-st"; 526 compatible = "ti,wl1831-st";
547 enable-gpios = <&gpio 8 GPIO_A 527 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
548 }; 528 };
549 }; 529 };
550 530
551 &uart1 { 531 &uart1 {
552 status = "okay"; 532 status = "okay";
553 pinctrl-names = "default"; 533 pinctrl-names = "default";
554 pinctrl-0 = <&pinctrl_uart1_default>; 534 pinctrl-0 = <&pinctrl_uart1_default>;
555 }; 535 };
556 536
557 /* ULPI SMSC USB3320 */ 537 /* ULPI SMSC USB3320 */
558 &usb0 { 538 &usb0 {
559 status = "okay"; 539 status = "okay";
560 pinctrl-names = "default"; 540 pinctrl-names = "default";
561 pinctrl-0 = <&pinctrl_usb0_default>; 541 pinctrl-0 = <&pinctrl_usb0_default>;
562 phy-names = "usb3-phy"; 542 phy-names = "usb3-phy";
563 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>; 543 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
564 /delete-property/ reset-gpios; <<
565 }; 544 };
566 545
567 &dwc3_0 { 546 &dwc3_0 {
568 status = "okay"; 547 status = "okay";
569 dr_mode = "peripheral"; 548 dr_mode = "peripheral";
570 maximum-speed = "super-speed"; 549 maximum-speed = "super-speed";
571 }; 550 };
572 551
573 /* ULPI SMSC USB3320 */ 552 /* ULPI SMSC USB3320 */
574 &usb1 { 553 &usb1 {
575 status = "okay"; 554 status = "okay";
576 pinctrl-names = "default"; 555 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_usb1_default>; 556 pinctrl-0 = <&pinctrl_usb1_default>;
578 phy-names = "usb3-phy"; 557 phy-names = "usb3-phy";
579 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>; 558 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
580 reset-gpios = <&modepin_gpio 1 GPIO_AC <<
581 }; 559 };
582 560
583 &dwc3_1 { 561 &dwc3_1 {
584 status = "okay"; 562 status = "okay";
585 dr_mode = "host"; 563 dr_mode = "host";
586 maximum-speed = "super-speed"; 564 maximum-speed = "super-speed";
587 }; 565 };
588 566
589 &watchdog0 { 567 &watchdog0 {
590 status = "okay"; <<
591 }; <<
592 <<
593 &xilinx_ams { <<
594 status = "okay"; <<
595 }; <<
596 <<
597 &ams_ps { <<
598 status = "okay"; 568 status = "okay";
599 }; 569 };
600 570
601 &zynqmp_dpdma { 571 &zynqmp_dpdma {
602 status = "okay"; 572 status = "okay";
603 }; 573 };
604 574
605 &zynqmp_dpsub { 575 &zynqmp_dpsub {
606 status = "okay"; 576 status = "okay";
607 phy-names = "dp-phy0", "dp-phy1"; 577 phy-names = "dp-phy0", "dp-phy1";
608 phys = <&psgtr 1 PHY_TYPE_DP 0 1>, 578 phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
609 <&psgtr 0 PHY_TYPE_DP 1 1>; 579 <&psgtr 0 PHY_TYPE_DP 1 1>;
610 }; 580 };
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