1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /* 2 /*
3 * dts file for Xilinx ZynqMP ZCU100 revC 3 * dts file for Xilinx ZynqMP ZCU100 revC
4 * 4 *
5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 5 * (C) Copyright 2016 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro D 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
7 * 7 *
8 * Michal Simek <michal.simek@amd.com> 8 * Michal Simek <michal.simek@amd.com>
9 * Nathalie Chan King Choy 9 * Nathalie Chan King Choy
10 */ 10 */
11 11
12 /dts-v1/; 12 /dts-v1/;
13 13
14 #include "zynqmp.dtsi" 14 #include "zynqmp.dtsi"
15 #include "zynqmp-clk-ccf.dtsi" 15 #include "zynqmp-clk-ccf.dtsi"
16 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq 17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/gpio/gpio.h> 18 #include <dt-bindings/gpio/gpio.h>
19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 #include <dt-bindings/phy/phy.h> 20 #include <dt-bindings/phy/phy.h>
21 21
22 / { 22 / {
23 model = "ZynqMP ZCU100 RevC"; 23 model = "ZynqMP ZCU100 RevC";
24 compatible = "xlnx,zynqmp-zcu100-revC" 24 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
25 25
26 aliases { 26 aliases {
27 i2c0 = &i2c1; 27 i2c0 = &i2c1;
28 rtc0 = &rtc; 28 rtc0 = &rtc;
29 serial0 = &uart1; 29 serial0 = &uart1;
30 serial1 = &uart0; 30 serial1 = &uart0;
31 serial2 = &dcc; 31 serial2 = &dcc;
32 spi0 = &spi0; 32 spi0 = &spi0;
33 spi1 = &spi1; 33 spi1 = &spi1;
34 usb0 = &usb0; 34 usb0 = &usb0;
35 usb1 = &usb1; 35 usb1 = &usb1;
36 mmc0 = &sdhci0; 36 mmc0 = &sdhci0;
37 mmc1 = &sdhci1; 37 mmc1 = &sdhci1;
38 }; 38 };
39 39
40 chosen { 40 chosen {
41 bootargs = "earlycon"; 41 bootargs = "earlycon";
42 stdout-path = "serial0:115200n 42 stdout-path = "serial0:115200n8";
43 }; 43 };
44 44
45 memory@0 { 45 memory@0 {
46 device_type = "memory"; 46 device_type = "memory";
47 reg = <0x0 0x0 0x0 0x80000000> 47 reg = <0x0 0x0 0x0 0x80000000>;
48 }; 48 };
49 49
50 gpio-keys { 50 gpio-keys {
51 compatible = "gpio-keys"; 51 compatible = "gpio-keys";
52 autorepeat; 52 autorepeat;
53 switch-4 { 53 switch-4 {
54 label = "sw4"; 54 label = "sw4";
55 gpios = <&gpio 23 GPIO 55 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
56 linux,code = <KEY_POWE 56 linux,code = <KEY_POWER>;
57 wakeup-source; 57 wakeup-source;
58 autorepeat; 58 autorepeat;
59 }; 59 };
60 }; 60 };
61 61
62 iio-hwmon { 62 iio-hwmon {
63 compatible = "iio-hwmon"; 63 compatible = "iio-hwmon";
64 io-channels = <&xilinx_ams 0>, 64 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
65 <&xilinx_ams 3>, 65 <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
66 <&xilinx_ams 6>, 66 <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
67 <&xilinx_ams 9>, 67 <&xilinx_ams 9>, <&xilinx_ams 10>,
68 <&xilinx_ams 11> 68 <&xilinx_ams 11>, <&xilinx_ams 12>;
69 }; 69 };
70 70
71 leds { 71 leds {
72 compatible = "gpio-leds"; 72 compatible = "gpio-leds";
73 led-ds2 { 73 led-ds2 {
74 label = "ds2"; 74 label = "ds2";
75 gpios = <&gpio 20 GPIO 75 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
76 linux,default-trigger 76 linux,default-trigger = "heartbeat";
77 }; 77 };
78 78
79 led-ds3 { 79 led-ds3 {
80 label = "ds3"; 80 label = "ds3";
81 gpios = <&gpio 19 GPIO 81 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
82 linux,default-trigger 82 linux,default-trigger = "phy0tx"; /* WLAN tx */
83 default-state = "off"; 83 default-state = "off";
84 }; 84 };
85 85
86 led-ds4 { 86 led-ds4 {
87 label = "ds4"; 87 label = "ds4";
88 gpios = <&gpio 18 GPIO 88 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
89 linux,default-trigger 89 linux,default-trigger = "phy0rx"; /* WLAN rx */
90 default-state = "off"; 90 default-state = "off";
91 }; 91 };
92 92
93 led-ds5 { 93 led-ds5 {
94 label = "ds5"; 94 label = "ds5";
95 gpios = <&gpio 17 GPIO 95 gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
96 linux,default-trigger 96 linux,default-trigger = "bluetooth-power";
97 }; 97 };
98 98
99 led-vbus-det { /* U5 USB5744 V 99 led-vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
100 label = "vbus_det"; 100 label = "vbus_det";
101 gpios = <&gpio 25 GPIO 101 gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
102 default-state = "on"; 102 default-state = "on";
103 }; 103 };
104 }; 104 };
105 105
106 wmmcsdio_fixed: fixedregulator-mmcsdio 106 wmmcsdio_fixed: fixedregulator-mmcsdio {
107 compatible = "regulator-fixed" 107 compatible = "regulator-fixed";
108 regulator-name = "wmmcsdio_fix 108 regulator-name = "wmmcsdio_fixed";
109 regulator-min-microvolt = <330 109 regulator-min-microvolt = <3300000>;
110 regulator-max-microvolt = <330 110 regulator-max-microvolt = <3300000>;
111 regulator-always-on; 111 regulator-always-on;
112 regulator-boot-on; 112 regulator-boot-on;
113 }; 113 };
114 114
115 sdio_pwrseq: sdio-pwrseq { 115 sdio_pwrseq: sdio-pwrseq {
116 compatible = "mmc-pwrseq-simpl 116 compatible = "mmc-pwrseq-simple";
117 reset-gpios = <&gpio 7 GPIO_AC 117 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
118 post-power-on-delay-ms = <10>; 118 post-power-on-delay-ms = <10>;
119 }; 119 };
120 120
121 ina226 { 121 ina226 {
122 compatible = "iio-hwmon"; 122 compatible = "iio-hwmon";
123 io-channels = <&u35 0>, <&u35 123 io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
124 }; 124 };
125 125
126 si5335_0: si5335-0 { /* clk0_usb - u23 126 si5335_0: si5335-0 { /* clk0_usb - u23 */
127 compatible = "fixed-clock"; 127 compatible = "fixed-clock";
128 #clock-cells = <0>; 128 #clock-cells = <0>;
129 clock-frequency = <26000000>; 129 clock-frequency = <26000000>;
130 }; 130 };
131 131
132 si5335_1: si5335-1 { /* clk1_dp - u23 132 si5335_1: si5335-1 { /* clk1_dp - u23 */
133 compatible = "fixed-clock"; 133 compatible = "fixed-clock";
134 #clock-cells = <0>; 134 #clock-cells = <0>;
135 clock-frequency = <27000000>; 135 clock-frequency = <27000000>;
136 }; 136 };
137 }; 137 };
138 138
139 &dcc { 139 &dcc {
140 status = "okay"; 140 status = "okay";
141 }; 141 };
142 142
143 &gpio { 143 &gpio {
144 status = "okay"; 144 status = "okay";
145 gpio-line-names = "UART1_TX", "UART1_R 145 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
146 "I2C1_SDA", "SPI1_SC 146 "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
147 "SPI1_MISO", "SPI1_M 147 "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
148 "SD0_DAT2", "SD0_DAT 148 "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
149 "PS_LED0", "SD0_CMD" 149 "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
150 "VBUS_DET", "POWER_I 150 "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
151 "DP_AUX_IN", "INA226 151 "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
152 "", "GPIO-A", "GPIO- 152 "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
153 "GPIO-D", "SPI0_CS", 153 "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
154 "GPIO-F", "SD1_D0", 154 "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
155 "SD1_CMD", "SD1_CLK" 155 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
156 "USB0_NXT", "USB0_DA 156 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
157 "USB0_DATA4", "USB0_ 157 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
158 "USB1_DIR", "USB1_DA 158 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
159 "USB1_STP", "USB1_DA 159 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
160 "USB_DATA7", "WLAN_I 160 "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
161 "", "", 161 "", "",
162 "", "", "", "", "", 162 "", "", "", "", "", "", "", "", "", "",
163 "", "", "", "", "", 163 "", "", "", "", "", "", "", "", "", "",
164 "", "", "", "", "", 164 "", "", "", "", "", "", "", "", "", "",
165 "", "", "", "", "", 165 "", "", "", "", "", "", "", "", "", "",
166 "", "", "", "", "", 166 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", 167 "", "", "", "", "", "", "", "", "", "",
168 "", "", "", "", "", 168 "", "", "", "", "", "", "", "", "", "",
169 "", "", "", "", "", 169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", 170 "", "", "", "", "", "", "", "", "", "",
171 "", "", "", ""; 171 "", "", "", "";
172 }; 172 };
173 173
174 &gpu { 174 &gpu {
175 status = "okay"; 175 status = "okay";
176 }; 176 };
177 177
178 &i2c1 { 178 &i2c1 {
179 status = "okay"; 179 status = "okay";
180 pinctrl-names = "default", "gpio"; 180 pinctrl-names = "default", "gpio";
181 pinctrl-0 = <&pinctrl_i2c1_default>; 181 pinctrl-0 = <&pinctrl_i2c1_default>;
182 pinctrl-1 = <&pinctrl_i2c1_gpio>; 182 pinctrl-1 = <&pinctrl_i2c1_gpio>;
183 scl-gpios = <&gpio 4 (GPIO_ACTIVE_HIGH 183 scl-gpios = <&gpio 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
184 sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH 184 sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
185 clock-frequency = <100000>; 185 clock-frequency = <100000>;
186 i2c-mux@75 { /* u11 */ 186 i2c-mux@75 { /* u11 */
187 compatible = "nxp,pca9548"; 187 compatible = "nxp,pca9548";
188 #address-cells = <1>; 188 #address-cells = <1>;
189 #size-cells = <0>; 189 #size-cells = <0>;
190 reg = <0x75>; 190 reg = <0x75>;
191 i2csw_0: i2c@0 { 191 i2csw_0: i2c@0 {
192 #address-cells = <1>; 192 #address-cells = <1>;
193 #size-cells = <0>; 193 #size-cells = <0>;
194 reg = <0>; 194 reg = <0>;
195 label = "LS-I2C0"; 195 label = "LS-I2C0";
196 }; 196 };
197 i2csw_1: i2c@1 { 197 i2csw_1: i2c@1 {
198 #address-cells = <1>; 198 #address-cells = <1>;
199 #size-cells = <0>; 199 #size-cells = <0>;
200 reg = <1>; 200 reg = <1>;
201 label = "LS-I2C1"; 201 label = "LS-I2C1";
202 }; 202 };
203 i2csw_2: i2c@2 { 203 i2csw_2: i2c@2 {
204 #address-cells = <1>; 204 #address-cells = <1>;
205 #size-cells = <0>; 205 #size-cells = <0>;
206 reg = <2>; 206 reg = <2>;
207 label = "HS-I2C2"; 207 label = "HS-I2C2";
208 }; 208 };
209 i2csw_3: i2c@3 { 209 i2csw_3: i2c@3 {
210 #address-cells = <1>; 210 #address-cells = <1>;
211 #size-cells = <0>; 211 #size-cells = <0>;
212 reg = <3>; 212 reg = <3>;
213 label = "HS-I2C3"; 213 label = "HS-I2C3";
214 }; 214 };
215 i2csw_4: i2c@4 { 215 i2csw_4: i2c@4 {
216 #address-cells = <1>; 216 #address-cells = <1>;
217 #size-cells = <0>; 217 #size-cells = <0>;
218 reg = <0x4>; 218 reg = <0x4>;
219 219
220 pmic: pmic@5e { /* Cus 220 pmic: pmic@5e { /* Custom TI PMIC u33 */
221 compatible = " 221 compatible = "ti,tps65086";
222 reg = <0x5e>; 222 reg = <0x5e>;
223 interrupt-pare 223 interrupt-parent = <&gpio>;
224 interrupts = < 224 interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
225 #gpio-cells = 225 #gpio-cells = <2>;
226 gpio-controlle 226 gpio-controller;
227 }; 227 };
228 }; 228 };
229 i2csw_5: i2c@5 { 229 i2csw_5: i2c@5 {
230 #address-cells = <1>; 230 #address-cells = <1>;
231 #size-cells = <0>; 231 #size-cells = <0>;
232 reg = <5>; 232 reg = <5>;
233 /* PS_PMBUS */ 233 /* PS_PMBUS */
234 u35: ina226@40 { /* u3 234 u35: ina226@40 { /* u35 */
235 compatible = " 235 compatible = "ti,ina226";
236 #io-channel-ce 236 #io-channel-cells = <1>;
237 reg = <0x40>; 237 reg = <0x40>;
238 shunt-resistor 238 shunt-resistor = <10000>;
239 /* MIO31 is al 239 /* MIO31 is alert which should be routed to PMUFW */
240 }; 240 };
241 }; 241 };
242 i2csw_6: i2c@6 { 242 i2csw_6: i2c@6 {
243 #address-cells = <1>; 243 #address-cells = <1>;
244 #size-cells = <0>; 244 #size-cells = <0>;
245 reg = <6>; 245 reg = <6>;
246 /* 246 /*
247 * Not Connected 247 * Not Connected
248 */ 248 */
249 }; 249 };
250 i2csw_7: i2c@7 { 250 i2csw_7: i2c@7 {
251 #address-cells = <1>; 251 #address-cells = <1>;
252 #size-cells = <0>; 252 #size-cells = <0>;
253 reg = <7>; 253 reg = <7>;
254 /* 254 /*
255 * usb5744 (DNP) - U5 255 * usb5744 (DNP) - U5
256 * 100kHz - this is de 256 * 100kHz - this is default freq for us
257 */ 257 */
258 }; 258 };
259 }; 259 };
260 }; 260 };
261 261
262 &pinctrl0 { 262 &pinctrl0 {
263 status = "okay"; 263 status = "okay";
264 pinctrl_i2c1_default: i2c1-default { 264 pinctrl_i2c1_default: i2c1-default {
265 mux { 265 mux {
266 groups = "i2c1_1_grp"; 266 groups = "i2c1_1_grp";
267 function = "i2c1"; 267 function = "i2c1";
268 }; 268 };
269 269
270 conf { 270 conf {
271 groups = "i2c1_1_grp"; 271 groups = "i2c1_1_grp";
272 bias-pull-up; 272 bias-pull-up;
273 slew-rate = <SLEW_RATE 273 slew-rate = <SLEW_RATE_SLOW>;
274 power-source = <IO_STA 274 power-source = <IO_STANDARD_LVCMOS18>;
275 }; 275 };
276 }; 276 };
277 277
278 pinctrl_i2c1_gpio: i2c1-gpio-grp { !! 278 pinctrl_i2c1_gpio: i2c1-gpio {
279 mux { 279 mux {
280 groups = "gpio0_4_grp" 280 groups = "gpio0_4_grp", "gpio0_5_grp";
281 function = "gpio0"; 281 function = "gpio0";
282 }; 282 };
283 283
284 conf { 284 conf {
285 groups = "gpio0_4_grp" 285 groups = "gpio0_4_grp", "gpio0_5_grp";
286 slew-rate = <SLEW_RATE 286 slew-rate = <SLEW_RATE_SLOW>;
287 power-source = <IO_STA 287 power-source = <IO_STANDARD_LVCMOS18>;
288 }; 288 };
289 }; 289 };
290 290
291 pinctrl_sdhci0_default: sdhci0-default 291 pinctrl_sdhci0_default: sdhci0-default {
292 mux { 292 mux {
293 groups = "sdio0_3_grp" 293 groups = "sdio0_3_grp";
294 function = "sdio0"; 294 function = "sdio0";
295 }; 295 };
296 296
297 conf { 297 conf {
298 groups = "sdio0_3_grp" 298 groups = "sdio0_3_grp";
299 slew-rate = <SLEW_RATE 299 slew-rate = <SLEW_RATE_SLOW>;
300 power-source = <IO_STA 300 power-source = <IO_STANDARD_LVCMOS18>;
301 bias-disable; 301 bias-disable;
302 }; 302 };
303 303
304 mux-cd { 304 mux-cd {
305 groups = "sdio0_cd_0_g 305 groups = "sdio0_cd_0_grp";
306 function = "sdio0_cd"; 306 function = "sdio0_cd";
307 }; 307 };
308 308
309 conf-cd { 309 conf-cd {
310 groups = "sdio0_cd_0_g 310 groups = "sdio0_cd_0_grp";
311 bias-high-impedance; 311 bias-high-impedance;
312 bias-pull-up; 312 bias-pull-up;
313 slew-rate = <SLEW_RATE 313 slew-rate = <SLEW_RATE_SLOW>;
314 power-source = <IO_STA 314 power-source = <IO_STANDARD_LVCMOS18>;
315 }; 315 };
316 }; 316 };
317 317
318 pinctrl_sdhci1_default: sdhci1-default 318 pinctrl_sdhci1_default: sdhci1-default {
319 mux { 319 mux {
320 groups = "sdio1_2_grp" 320 groups = "sdio1_2_grp";
321 function = "sdio1"; 321 function = "sdio1";
322 }; 322 };
323 323
324 conf { 324 conf {
325 groups = "sdio1_2_grp" 325 groups = "sdio1_2_grp";
326 slew-rate = <SLEW_RATE 326 slew-rate = <SLEW_RATE_SLOW>;
327 power-source = <IO_STA 327 power-source = <IO_STANDARD_LVCMOS18>;
328 bias-disable; 328 bias-disable;
329 }; 329 };
330 }; 330 };
331 331
332 pinctrl_spi0_default: spi0-default { 332 pinctrl_spi0_default: spi0-default {
333 mux { 333 mux {
334 groups = "spi0_3_grp"; 334 groups = "spi0_3_grp";
335 function = "spi0"; 335 function = "spi0";
336 }; 336 };
337 337
338 conf { 338 conf {
339 groups = "spi0_3_grp"; 339 groups = "spi0_3_grp";
340 bias-disable; 340 bias-disable;
341 slew-rate = <SLEW_RATE 341 slew-rate = <SLEW_RATE_SLOW>;
342 power-source = <IO_STA 342 power-source = <IO_STANDARD_LVCMOS18>;
343 }; 343 };
344 344
345 mux-cs { 345 mux-cs {
346 groups = "spi0_ss_9_gr 346 groups = "spi0_ss_9_grp";
347 function = "spi0_ss"; 347 function = "spi0_ss";
348 }; 348 };
349 349
350 conf-cs { 350 conf-cs {
351 groups = "spi0_ss_9_gr 351 groups = "spi0_ss_9_grp";
352 bias-disable; 352 bias-disable;
353 }; 353 };
354 354
355 }; 355 };
356 356
357 pinctrl_spi1_default: spi1-default { 357 pinctrl_spi1_default: spi1-default {
358 mux { 358 mux {
359 groups = "spi1_0_grp"; 359 groups = "spi1_0_grp";
360 function = "spi1"; 360 function = "spi1";
361 }; 361 };
362 362
363 conf { 363 conf {
364 groups = "spi1_0_grp"; 364 groups = "spi1_0_grp";
365 bias-disable; 365 bias-disable;
366 slew-rate = <SLEW_RATE 366 slew-rate = <SLEW_RATE_SLOW>;
367 power-source = <IO_STA 367 power-source = <IO_STANDARD_LVCMOS18>;
368 }; 368 };
369 369
370 mux-cs { 370 mux-cs {
371 groups = "spi1_ss_0_gr 371 groups = "spi1_ss_0_grp";
372 function = "spi1_ss"; 372 function = "spi1_ss";
373 }; 373 };
374 374
375 conf-cs { 375 conf-cs {
376 groups = "spi1_ss_0_gr 376 groups = "spi1_ss_0_grp";
377 bias-disable; 377 bias-disable;
378 }; 378 };
379 379
380 }; 380 };
381 381
382 pinctrl_uart0_default: uart0-default { 382 pinctrl_uart0_default: uart0-default {
383 mux { 383 mux {
384 groups = "uart0_0_grp" 384 groups = "uart0_0_grp";
385 function = "uart0"; 385 function = "uart0";
386 }; 386 };
387 387
388 conf { 388 conf {
389 groups = "uart0_0_grp" 389 groups = "uart0_0_grp";
390 slew-rate = <SLEW_RATE 390 slew-rate = <SLEW_RATE_SLOW>;
391 power-source = <IO_STA 391 power-source = <IO_STANDARD_LVCMOS18>;
392 }; 392 };
393 393
394 conf-rx { 394 conf-rx {
395 pins = "MIO3"; 395 pins = "MIO3";
396 bias-high-impedance; 396 bias-high-impedance;
397 }; 397 };
398 398
399 conf-tx { 399 conf-tx {
400 pins = "MIO2"; 400 pins = "MIO2";
401 bias-disable; 401 bias-disable;
402 }; 402 };
403 }; 403 };
404 404
405 pinctrl_uart1_default: uart1-default { 405 pinctrl_uart1_default: uart1-default {
406 mux { 406 mux {
407 groups = "uart1_0_grp" 407 groups = "uart1_0_grp";
408 function = "uart1"; 408 function = "uart1";
409 }; 409 };
410 410
411 conf { 411 conf {
412 groups = "uart1_0_grp" 412 groups = "uart1_0_grp";
413 slew-rate = <SLEW_RATE 413 slew-rate = <SLEW_RATE_SLOW>;
414 power-source = <IO_STA 414 power-source = <IO_STANDARD_LVCMOS18>;
415 }; 415 };
416 416
417 conf-rx { 417 conf-rx {
418 pins = "MIO1"; 418 pins = "MIO1";
419 bias-high-impedance; 419 bias-high-impedance;
420 }; 420 };
421 421
422 conf-tx { 422 conf-tx {
423 pins = "MIO0"; 423 pins = "MIO0";
424 bias-disable; 424 bias-disable;
425 }; 425 };
426 }; 426 };
427 427
428 pinctrl_usb0_default: usb0-default { 428 pinctrl_usb0_default: usb0-default {
429 mux { 429 mux {
430 groups = "usb0_0_grp"; 430 groups = "usb0_0_grp";
431 function = "usb0"; 431 function = "usb0";
432 }; 432 };
433 433
434 conf { 434 conf {
435 groups = "usb0_0_grp"; 435 groups = "usb0_0_grp";
436 power-source = <IO_STA 436 power-source = <IO_STANDARD_LVCMOS18>;
437 }; 437 };
438 438
439 conf-rx { 439 conf-rx {
440 pins = "MIO52", "MIO53 440 pins = "MIO52", "MIO53", "MIO55";
441 bias-high-impedance; 441 bias-high-impedance;
442 drive-strength = <12>; 442 drive-strength = <12>;
443 slew-rate = <SLEW_RATE 443 slew-rate = <SLEW_RATE_FAST>;
444 }; 444 };
445 445
446 conf-tx { 446 conf-tx {
447 pins = "MIO54", "MIO56 447 pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
448 "MIO60", "MIO61 448 "MIO60", "MIO61", "MIO62", "MIO63";
449 bias-disable; 449 bias-disable;
450 drive-strength = <4>; 450 drive-strength = <4>;
451 slew-rate = <SLEW_RATE 451 slew-rate = <SLEW_RATE_SLOW>;
452 }; 452 };
453 }; 453 };
454 454
455 pinctrl_usb1_default: usb1-default { 455 pinctrl_usb1_default: usb1-default {
456 mux { 456 mux {
457 groups = "usb1_0_grp"; 457 groups = "usb1_0_grp";
458 function = "usb1"; 458 function = "usb1";
459 }; 459 };
460 460
461 conf { 461 conf {
462 groups = "usb1_0_grp"; 462 groups = "usb1_0_grp";
463 power-source = <IO_STA 463 power-source = <IO_STANDARD_LVCMOS18>;
464 }; 464 };
465 465
466 conf-rx { 466 conf-rx {
467 pins = "MIO64", "MIO65 467 pins = "MIO64", "MIO65", "MIO67";
468 bias-high-impedance; 468 bias-high-impedance;
469 drive-strength = <12>; 469 drive-strength = <12>;
470 slew-rate = <SLEW_RATE 470 slew-rate = <SLEW_RATE_FAST>;
471 }; 471 };
472 472
473 conf-tx { 473 conf-tx {
474 pins = "MIO66", "MIO68 474 pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
475 "MIO72", "MIO73 475 "MIO72", "MIO73", "MIO74", "MIO75";
476 bias-disable; 476 bias-disable;
477 drive-strength = <4>; 477 drive-strength = <4>;
478 slew-rate = <SLEW_RATE 478 slew-rate = <SLEW_RATE_SLOW>;
479 }; 479 };
480 }; 480 };
481 }; 481 };
482 482
483 &psgtr { 483 &psgtr {
484 status = "okay"; 484 status = "okay";
485 /* usb3, dp */ 485 /* usb3, dp */
486 clocks = <&si5335_0>, <&si5335_1>; 486 clocks = <&si5335_0>, <&si5335_1>;
487 clock-names = "ref0", "ref1"; 487 clock-names = "ref0", "ref1";
488 }; 488 };
489 489
490 &rtc { 490 &rtc {
491 status = "okay"; 491 status = "okay";
492 }; 492 };
493 493
494 /* SD0 only supports 3.3V, no level shifter */ 494 /* SD0 only supports 3.3V, no level shifter */
495 &sdhci0 { 495 &sdhci0 {
496 status = "okay"; 496 status = "okay";
497 no-1-8-v; 497 no-1-8-v;
498 disable-wp; 498 disable-wp;
499 pinctrl-names = "default"; 499 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_sdhci0_default>; 500 pinctrl-0 = <&pinctrl_sdhci0_default>;
501 xlnx,mio-bank = <0>; 501 xlnx,mio-bank = <0>;
502 }; 502 };
503 503
504 &sdhci1 { 504 &sdhci1 {
505 status = "okay"; 505 status = "okay";
506 bus-width = <0x4>; 506 bus-width = <0x4>;
507 pinctrl-names = "default"; 507 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_sdhci1_default>; 508 pinctrl-0 = <&pinctrl_sdhci1_default>;
509 xlnx,mio-bank = <0>; 509 xlnx,mio-bank = <0>;
510 non-removable; 510 non-removable;
511 disable-wp; 511 disable-wp;
512 cap-power-off-card; 512 cap-power-off-card;
513 mmc-pwrseq = <&sdio_pwrseq>; 513 mmc-pwrseq = <&sdio_pwrseq>;
514 vqmmc-supply = <&wmmcsdio_fixed>; 514 vqmmc-supply = <&wmmcsdio_fixed>;
515 #address-cells = <1>; 515 #address-cells = <1>;
516 #size-cells = <0>; 516 #size-cells = <0>;
517 wlcore: wifi@2 { 517 wlcore: wifi@2 {
518 compatible = "ti,wl1831"; 518 compatible = "ti,wl1831";
519 reg = <2>; 519 reg = <2>;
520 interrupt-parent = <&gpio>; 520 interrupt-parent = <&gpio>;
521 interrupts = <76 IRQ_TYPE_EDGE 521 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
522 }; 522 };
523 }; 523 };
524 524
525 &spi0 { /* Low Speed connector */ 525 &spi0 { /* Low Speed connector */
526 status = "okay"; 526 status = "okay";
527 label = "LS-SPI0"; 527 label = "LS-SPI0";
528 num-cs = <1>; 528 num-cs = <1>;
529 pinctrl-names = "default"; 529 pinctrl-names = "default";
530 pinctrl-0 = <&pinctrl_spi0_default>; 530 pinctrl-0 = <&pinctrl_spi0_default>;
531 }; 531 };
532 532
533 &spi1 { /* High Speed connector */ 533 &spi1 { /* High Speed connector */
534 status = "okay"; 534 status = "okay";
535 label = "HS-SPI1"; 535 label = "HS-SPI1";
536 num-cs = <1>; 536 num-cs = <1>;
537 pinctrl-names = "default"; 537 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_spi1_default>; 538 pinctrl-0 = <&pinctrl_spi1_default>;
539 }; 539 };
540 540
541 &uart0 { 541 &uart0 {
542 status = "okay"; 542 status = "okay";
543 pinctrl-names = "default"; 543 pinctrl-names = "default";
544 pinctrl-0 = <&pinctrl_uart0_default>; 544 pinctrl-0 = <&pinctrl_uart0_default>;
545 bluetooth { 545 bluetooth {
546 compatible = "ti,wl1831-st"; 546 compatible = "ti,wl1831-st";
547 enable-gpios = <&gpio 8 GPIO_A 547 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
548 }; 548 };
549 }; 549 };
550 550
551 &uart1 { 551 &uart1 {
552 status = "okay"; 552 status = "okay";
553 pinctrl-names = "default"; 553 pinctrl-names = "default";
554 pinctrl-0 = <&pinctrl_uart1_default>; 554 pinctrl-0 = <&pinctrl_uart1_default>;
555 }; 555 };
556 556
557 /* ULPI SMSC USB3320 */ 557 /* ULPI SMSC USB3320 */
558 &usb0 { 558 &usb0 {
559 status = "okay"; 559 status = "okay";
560 pinctrl-names = "default"; 560 pinctrl-names = "default";
561 pinctrl-0 = <&pinctrl_usb0_default>; 561 pinctrl-0 = <&pinctrl_usb0_default>;
562 phy-names = "usb3-phy"; 562 phy-names = "usb3-phy";
563 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>; 563 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
564 /delete-property/ reset-gpios; 564 /delete-property/ reset-gpios;
565 }; 565 };
566 566
567 &dwc3_0 { 567 &dwc3_0 {
568 status = "okay"; 568 status = "okay";
569 dr_mode = "peripheral"; 569 dr_mode = "peripheral";
570 maximum-speed = "super-speed"; 570 maximum-speed = "super-speed";
571 }; 571 };
572 572
573 /* ULPI SMSC USB3320 */ 573 /* ULPI SMSC USB3320 */
574 &usb1 { 574 &usb1 {
575 status = "okay"; 575 status = "okay";
576 pinctrl-names = "default"; 576 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_usb1_default>; 577 pinctrl-0 = <&pinctrl_usb1_default>;
578 phy-names = "usb3-phy"; 578 phy-names = "usb3-phy";
579 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>; 579 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
580 reset-gpios = <&modepin_gpio 1 GPIO_AC 580 reset-gpios = <&modepin_gpio 1 GPIO_ACTIVE_LOW>;
581 }; 581 };
582 582
583 &dwc3_1 { 583 &dwc3_1 {
584 status = "okay"; 584 status = "okay";
585 dr_mode = "host"; 585 dr_mode = "host";
586 maximum-speed = "super-speed"; 586 maximum-speed = "super-speed";
587 }; 587 };
588 588
589 &watchdog0 { 589 &watchdog0 {
590 status = "okay"; 590 status = "okay";
591 }; 591 };
592 592
593 &xilinx_ams { 593 &xilinx_ams {
594 status = "okay"; 594 status = "okay";
595 }; 595 };
596 596
597 &ams_ps { 597 &ams_ps {
598 status = "okay"; 598 status = "okay";
599 }; 599 };
600 600
601 &zynqmp_dpdma { 601 &zynqmp_dpdma {
602 status = "okay"; 602 status = "okay";
603 }; 603 };
604 604
605 &zynqmp_dpsub { 605 &zynqmp_dpsub {
606 status = "okay"; 606 status = "okay";
607 phy-names = "dp-phy0", "dp-phy1"; 607 phy-names = "dp-phy0", "dp-phy1";
608 phys = <&psgtr 1 PHY_TYPE_DP 0 1>, 608 phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
609 <&psgtr 0 PHY_TYPE_DP 1 1>; 609 <&psgtr 0 PHY_TYPE_DP 1 1>;
610 }; 610 };
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