1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 2 /* 3 * Copyright (c) 2017-2020, The Linux Foundati 3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. 4 */ 4 */ 5 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H 6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H 7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H 7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8250_H 8 8 9 /* GPU_CC clock registers */ 9 /* GPU_CC clock registers */ 10 #define GPU_CC_AHB_CLK 10 #define GPU_CC_AHB_CLK 0 11 #define GPU_CC_CRC_AHB_CLK 11 #define GPU_CC_CRC_AHB_CLK 1 12 #define GPU_CC_CX_APB_CLK 12 #define GPU_CC_CX_APB_CLK 2 13 #define GPU_CC_CX_GMU_CLK 13 #define GPU_CC_CX_GMU_CLK 3 14 #define GPU_CC_CX_SNOC_DVM_CLK 14 #define GPU_CC_CX_SNOC_DVM_CLK 4 15 #define GPU_CC_CXO_AON_CLK 15 #define GPU_CC_CXO_AON_CLK 5 16 #define GPU_CC_CXO_CLK 16 #define GPU_CC_CXO_CLK 6 17 #define GPU_CC_GMU_CLK_SRC 17 #define GPU_CC_GMU_CLK_SRC 7 18 #define GPU_CC_GX_GMU_CLK 18 #define GPU_CC_GX_GMU_CLK 8 19 #define GPU_CC_PLL1 19 #define GPU_CC_PLL1 9 20 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 20 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 10 21 21 22 /* GPU_CC Resets */ 22 /* GPU_CC Resets */ 23 #define GPUCC_GPU_CC_ACD_BCR 23 #define GPUCC_GPU_CC_ACD_BCR 0 24 #define GPUCC_GPU_CC_CX_BCR 24 #define GPUCC_GPU_CC_CX_BCR 1 25 #define GPUCC_GPU_CC_GFX3D_AON_BCR 25 #define GPUCC_GPU_CC_GFX3D_AON_BCR 2 26 #define GPUCC_GPU_CC_GMU_BCR 26 #define GPUCC_GPU_CC_GMU_BCR 3 27 #define GPUCC_GPU_CC_GX_BCR 27 #define GPUCC_GPU_CC_GX_BCR 4 28 #define GPUCC_GPU_CC_XO_BCR 28 #define GPUCC_GPU_CC_XO_BCR 5 29 29 30 /* GPU_CC GDSCRs */ 30 /* GPU_CC GDSCRs */ 31 #define GPU_CX_GDSC 31 #define GPU_CX_GDSC 0 32 #define GPU_GX_GDSC 32 #define GPU_GX_GDSC 1 33 33 34 #endif 34 #endif 35 35
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