1 /* SPDX-License-Identifier: GPL-2.0-or-later * <<
2 /* 1 /*
3 * Copyright 2014 Ulrich Hecht 2 * Copyright 2014 Ulrich Hecht
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or modify
>> 5 * it under the terms of the GNU General Public License as published by
>> 6 * the Free Software Foundation; either version 2 of the License, or
>> 7 * (at your option) any later version.
4 */ 8 */
5 9
6 #ifndef __DT_BINDINGS_CLOCK_R8A73A4_H__ 10 #ifndef __DT_BINDINGS_CLOCK_R8A73A4_H__
7 #define __DT_BINDINGS_CLOCK_R8A73A4_H__ 11 #define __DT_BINDINGS_CLOCK_R8A73A4_H__
8 12
9 /* CPG */ 13 /* CPG */
10 #define R8A73A4_CLK_MAIN 0 14 #define R8A73A4_CLK_MAIN 0
11 #define R8A73A4_CLK_PLL0 1 15 #define R8A73A4_CLK_PLL0 1
12 #define R8A73A4_CLK_PLL1 2 16 #define R8A73A4_CLK_PLL1 2
13 #define R8A73A4_CLK_PLL2 3 17 #define R8A73A4_CLK_PLL2 3
14 #define R8A73A4_CLK_PLL2S 4 18 #define R8A73A4_CLK_PLL2S 4
15 #define R8A73A4_CLK_PLL2H 5 19 #define R8A73A4_CLK_PLL2H 5
16 #define R8A73A4_CLK_Z 6 20 #define R8A73A4_CLK_Z 6
17 #define R8A73A4_CLK_Z2 7 21 #define R8A73A4_CLK_Z2 7
18 #define R8A73A4_CLK_I 8 22 #define R8A73A4_CLK_I 8
19 #define R8A73A4_CLK_M3 9 23 #define R8A73A4_CLK_M3 9
20 #define R8A73A4_CLK_B 10 24 #define R8A73A4_CLK_B 10
21 #define R8A73A4_CLK_M1 11 25 #define R8A73A4_CLK_M1 11
22 #define R8A73A4_CLK_M2 12 26 #define R8A73A4_CLK_M2 12
23 #define R8A73A4_CLK_ZX 13 27 #define R8A73A4_CLK_ZX 13
24 #define R8A73A4_CLK_ZS 14 28 #define R8A73A4_CLK_ZS 14
25 #define R8A73A4_CLK_HP 15 29 #define R8A73A4_CLK_HP 15
26 <<
27 /* MSTP1 */ <<
28 #define R8A73A4_CLK_TMU0 25 <<
29 #define R8A73A4_CLK_TMU3 21 <<
30 30
31 /* MSTP2 */ 31 /* MSTP2 */
32 #define R8A73A4_CLK_DMAC 18 32 #define R8A73A4_CLK_DMAC 18
33 #define R8A73A4_CLK_SCIFB3 17 33 #define R8A73A4_CLK_SCIFB3 17
34 #define R8A73A4_CLK_SCIFB2 16 34 #define R8A73A4_CLK_SCIFB2 16
35 #define R8A73A4_CLK_SCIFB1 7 35 #define R8A73A4_CLK_SCIFB1 7
36 #define R8A73A4_CLK_SCIFB0 6 36 #define R8A73A4_CLK_SCIFB0 6
37 #define R8A73A4_CLK_SCIFA0 4 37 #define R8A73A4_CLK_SCIFA0 4
38 #define R8A73A4_CLK_SCIFA1 3 38 #define R8A73A4_CLK_SCIFA1 3
39 39
40 /* MSTP3 */ 40 /* MSTP3 */
41 #define R8A73A4_CLK_CMT1 29 41 #define R8A73A4_CLK_CMT1 29
42 #define R8A73A4_CLK_IIC1 23 42 #define R8A73A4_CLK_IIC1 23
43 #define R8A73A4_CLK_IIC0 18 43 #define R8A73A4_CLK_IIC0 18
44 #define R8A73A4_CLK_IIC7 17 44 #define R8A73A4_CLK_IIC7 17
45 #define R8A73A4_CLK_IIC6 16 45 #define R8A73A4_CLK_IIC6 16
46 #define R8A73A4_CLK_MMCIF0 15 46 #define R8A73A4_CLK_MMCIF0 15
47 #define R8A73A4_CLK_SDHI0 14 47 #define R8A73A4_CLK_SDHI0 14
48 #define R8A73A4_CLK_SDHI1 13 48 #define R8A73A4_CLK_SDHI1 13
49 #define R8A73A4_CLK_SDHI2 12 49 #define R8A73A4_CLK_SDHI2 12
50 #define R8A73A4_CLK_MMCIF1 5 50 #define R8A73A4_CLK_MMCIF1 5
51 #define R8A73A4_CLK_IIC2 0 51 #define R8A73A4_CLK_IIC2 0
52 52
53 /* MSTP4 */ 53 /* MSTP4 */
54 #define R8A73A4_CLK_IIC3 11 54 #define R8A73A4_CLK_IIC3 11
55 #define R8A73A4_CLK_IIC4 10 55 #define R8A73A4_CLK_IIC4 10
56 #define R8A73A4_CLK_IIC5 9 56 #define R8A73A4_CLK_IIC5 9
57 #define R8A73A4_CLK_INTC_SYS 8 57 #define R8A73A4_CLK_INTC_SYS 8
58 #define R8A73A4_CLK_IRQC 7 58 #define R8A73A4_CLK_IRQC 7
59 59
60 /* MSTP5 */ 60 /* MSTP5 */
61 #define R8A73A4_CLK_THERMAL 22 61 #define R8A73A4_CLK_THERMAL 22
62 #define R8A73A4_CLK_IIC8 15 62 #define R8A73A4_CLK_IIC8 15
63 63
64 #endif /* __DT_BINDINGS_CLOCK_R8A73A4_H__ */ 64 #endif /* __DT_BINDINGS_CLOCK_R8A73A4_H__ */
65 65
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