1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 2 /* 3 * Copyright (C) 2017, Intel Corporation 3 * Copyright (C) 2017, Intel Corporation 4 */ 4 */ 5 5 6 #ifndef __STRATIX10_CLOCK_H 6 #ifndef __STRATIX10_CLOCK_H 7 #define __STRATIX10_CLOCK_H 7 #define __STRATIX10_CLOCK_H 8 8 9 /* fixed rate clocks */ 9 /* fixed rate clocks */ 10 #define STRATIX10_OSC1 0 10 #define STRATIX10_OSC1 0 11 #define STRATIX10_CB_INTOSC_HS_DIV2_CLK 1 11 #define STRATIX10_CB_INTOSC_HS_DIV2_CLK 1 12 #define STRATIX10_CB_INTOSC_LS_CLK 2 12 #define STRATIX10_CB_INTOSC_LS_CLK 2 13 #define STRATIX10_F2S_FREE_CLK 3 13 #define STRATIX10_F2S_FREE_CLK 3 14 14 15 /* fixed factor clocks */ 15 /* fixed factor clocks */ 16 #define STRATIX10_L4_SYS_FREE_CLK 4 16 #define STRATIX10_L4_SYS_FREE_CLK 4 17 #define STRATIX10_MPU_PERIPH_CLK 5 17 #define STRATIX10_MPU_PERIPH_CLK 5 18 #define STRATIX10_MPU_L2RAM_CLK 6 18 #define STRATIX10_MPU_L2RAM_CLK 6 19 #define STRATIX10_SDMMC_CIU_CLK 7 19 #define STRATIX10_SDMMC_CIU_CLK 7 20 20 21 /* PLL clocks */ 21 /* PLL clocks */ 22 #define STRATIX10_MAIN_PLL_CLK 8 22 #define STRATIX10_MAIN_PLL_CLK 8 23 #define STRATIX10_PERIPH_PLL_CLK 9 23 #define STRATIX10_PERIPH_PLL_CLK 9 24 #define STRATIX10_BOOT_CLK 10 24 #define STRATIX10_BOOT_CLK 10 25 25 26 /* Periph clocks */ 26 /* Periph clocks */ 27 #define STRATIX10_MAIN_MPU_BASE_CLK 11 27 #define STRATIX10_MAIN_MPU_BASE_CLK 11 28 #define STRATIX10_MAIN_NOC_BASE_CLK 12 28 #define STRATIX10_MAIN_NOC_BASE_CLK 12 29 #define STRATIX10_MAIN_EMACA_CLK 13 29 #define STRATIX10_MAIN_EMACA_CLK 13 30 #define STRATIX10_MAIN_EMACB_CLK 14 30 #define STRATIX10_MAIN_EMACB_CLK 14 31 #define STRATIX10_MAIN_EMAC_PTP_CLK 15 31 #define STRATIX10_MAIN_EMAC_PTP_CLK 15 32 #define STRATIX10_MAIN_GPIO_DB_CLK 16 32 #define STRATIX10_MAIN_GPIO_DB_CLK 16 33 #define STRATIX10_MAIN_SDMMC_CLK 17 33 #define STRATIX10_MAIN_SDMMC_CLK 17 34 #define STRATIX10_MAIN_S2F_USR0_CLK 18 34 #define STRATIX10_MAIN_S2F_USR0_CLK 18 35 #define STRATIX10_MAIN_S2F_USR1_CLK 19 35 #define STRATIX10_MAIN_S2F_USR1_CLK 19 36 #define STRATIX10_MAIN_PSI_REF_CLK 20 36 #define STRATIX10_MAIN_PSI_REF_CLK 20 37 37 38 #define STRATIX10_PERI_MPU_BASE_CLK 21 38 #define STRATIX10_PERI_MPU_BASE_CLK 21 39 #define STRATIX10_PERI_NOC_BASE_CLK 22 39 #define STRATIX10_PERI_NOC_BASE_CLK 22 40 #define STRATIX10_PERI_EMACA_CLK 23 40 #define STRATIX10_PERI_EMACA_CLK 23 41 #define STRATIX10_PERI_EMACB_CLK 24 41 #define STRATIX10_PERI_EMACB_CLK 24 42 #define STRATIX10_PERI_EMAC_PTP_CLK 25 42 #define STRATIX10_PERI_EMAC_PTP_CLK 25 43 #define STRATIX10_PERI_GPIO_DB_CLK 26 43 #define STRATIX10_PERI_GPIO_DB_CLK 26 44 #define STRATIX10_PERI_SDMMC_CLK 27 44 #define STRATIX10_PERI_SDMMC_CLK 27 45 #define STRATIX10_PERI_S2F_USR0_CLK 28 45 #define STRATIX10_PERI_S2F_USR0_CLK 28 46 #define STRATIX10_PERI_S2F_USR1_CLK 29 46 #define STRATIX10_PERI_S2F_USR1_CLK 29 47 #define STRATIX10_PERI_PSI_REF_CLK 30 47 #define STRATIX10_PERI_PSI_REF_CLK 30 48 48 49 #define STRATIX10_MPU_FREE_CLK 31 49 #define STRATIX10_MPU_FREE_CLK 31 50 #define STRATIX10_NOC_FREE_CLK 32 50 #define STRATIX10_NOC_FREE_CLK 32 51 #define STRATIX10_S2F_USR0_CLK 33 51 #define STRATIX10_S2F_USR0_CLK 33 52 #define STRATIX10_NOC_CLK 34 52 #define STRATIX10_NOC_CLK 34 53 #define STRATIX10_EMAC_A_FREE_CLK 35 53 #define STRATIX10_EMAC_A_FREE_CLK 35 54 #define STRATIX10_EMAC_B_FREE_CLK 36 54 #define STRATIX10_EMAC_B_FREE_CLK 36 55 #define STRATIX10_EMAC_PTP_FREE_CLK 37 55 #define STRATIX10_EMAC_PTP_FREE_CLK 37 56 #define STRATIX10_GPIO_DB_FREE_CLK 38 56 #define STRATIX10_GPIO_DB_FREE_CLK 38 57 #define STRATIX10_SDMMC_FREE_CLK 39 57 #define STRATIX10_SDMMC_FREE_CLK 39 58 #define STRATIX10_S2F_USER1_FREE_CLK 40 58 #define STRATIX10_S2F_USER1_FREE_CLK 40 59 #define STRATIX10_PSI_REF_FREE_CLK 41 59 #define STRATIX10_PSI_REF_FREE_CLK 41 60 60 61 /* Gate clocks */ 61 /* Gate clocks */ 62 #define STRATIX10_MPU_CLK 42 62 #define STRATIX10_MPU_CLK 42 63 #define STRATIX10_L4_MAIN_CLK 43 63 #define STRATIX10_L4_MAIN_CLK 43 64 #define STRATIX10_L4_MP_CLK 44 64 #define STRATIX10_L4_MP_CLK 44 65 #define STRATIX10_L4_SP_CLK 45 65 #define STRATIX10_L4_SP_CLK 45 66 #define STRATIX10_CS_AT_CLK 46 66 #define STRATIX10_CS_AT_CLK 46 67 #define STRATIX10_CS_TRACE_CLK 47 67 #define STRATIX10_CS_TRACE_CLK 47 68 #define STRATIX10_CS_PDBG_CLK 48 68 #define STRATIX10_CS_PDBG_CLK 48 69 #define STRATIX10_CS_TIMER_CLK 49 69 #define STRATIX10_CS_TIMER_CLK 49 70 #define STRATIX10_S2F_USER0_CLK 50 70 #define STRATIX10_S2F_USER0_CLK 50 71 #define STRATIX10_S2F_USER1_CLK 51 71 #define STRATIX10_S2F_USER1_CLK 51 72 #define STRATIX10_EMAC0_CLK 52 72 #define STRATIX10_EMAC0_CLK 52 73 #define STRATIX10_EMAC1_CLK 53 73 #define STRATIX10_EMAC1_CLK 53 74 #define STRATIX10_EMAC2_CLK 54 74 #define STRATIX10_EMAC2_CLK 54 75 #define STRATIX10_EMAC_PTP_CLK 55 75 #define STRATIX10_EMAC_PTP_CLK 55 76 #define STRATIX10_GPIO_DB_CLK 56 76 #define STRATIX10_GPIO_DB_CLK 56 77 #define STRATIX10_SDMMC_CLK 57 77 #define STRATIX10_SDMMC_CLK 57 78 #define STRATIX10_PSI_REF_CLK 58 78 #define STRATIX10_PSI_REF_CLK 58 79 #define STRATIX10_USB_CLK 59 79 #define STRATIX10_USB_CLK 59 80 #define STRATIX10_SPI_M_CLK 60 80 #define STRATIX10_SPI_M_CLK 60 81 #define STRATIX10_NAND_CLK 61 81 #define STRATIX10_NAND_CLK 61 82 #define STRATIX10_NAND_X_CLK 62 82 #define STRATIX10_NAND_X_CLK 62 83 #define STRATIX10_NAND_ECC_CLK 63 83 #define STRATIX10_NAND_ECC_CLK 63 84 #define STRATIX10_NUM_CLKS 64 84 #define STRATIX10_NUM_CLKS 64 85 85 86 #endif /* __STRATIX10_CLOCK_H */ 86 #endif /* __STRATIX10_CLOCK_H */ 87 87
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