1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 <<
3 #include "dt-bindings/clock/bcm6362-clock.h" <<
4 #include "dt-bindings/reset/bcm6362-reset.h" <<
5 #include "dt-bindings/soc/bcm6362-pm.h" <<
6 <<
7 / { 2 / {
8 #address-cells = <1>; 3 #address-cells = <1>;
9 #size-cells = <1>; 4 #size-cells = <1>;
10 compatible = "brcm,bcm6362"; 5 compatible = "brcm,bcm6362";
11 6
12 cpus { 7 cpus {
13 #address-cells = <1>; 8 #address-cells = <1>;
14 #size-cells = <0>; 9 #size-cells = <0>;
15 10
16 mips-hpt-frequency = <20000000 11 mips-hpt-frequency = <200000000>;
17 12
18 cpu@0 { 13 cpu@0 {
19 compatible = "brcm,bmi 14 compatible = "brcm,bmips4350";
20 device_type = "cpu"; 15 device_type = "cpu";
21 reg = <0>; 16 reg = <0>;
22 }; 17 };
23 18
24 cpu@1 { 19 cpu@1 {
25 compatible = "brcm,bmi 20 compatible = "brcm,bmips4350";
26 device_type = "cpu"; 21 device_type = "cpu";
27 reg = <1>; 22 reg = <1>;
28 }; 23 };
29 }; 24 };
30 25
31 clocks { 26 clocks {
32 periph_osc: periph-osc { !! 27 periph_clk: periph-clk {
33 compatible = "fixed-cl 28 compatible = "fixed-clock";
34 #clock-cells = <0>; 29 #clock-cells = <0>;
35 clock-frequency = <500 30 clock-frequency = <50000000>;
36 clock-output-names = " <<
37 }; <<
38 <<
39 hsspi_osc: hsspi-osc { <<
40 compatible = "fixed-cl <<
41 <<
42 #clock-cells = <0>; <<
43 <<
44 clock-frequency = <400 <<
45 clock-output-names = " <<
46 }; 31 };
47 }; 32 };
48 33
49 aliases { 34 aliases {
50 nflash = &nflash; <<
51 serial0 = &uart0; 35 serial0 = &uart0;
52 serial1 = &uart1; 36 serial1 = &uart1;
53 spi0 = &lsspi; <<
54 spi1 = &hsspi; <<
55 }; 37 };
56 38
57 cpu_intc: interrupt-controller { 39 cpu_intc: interrupt-controller {
58 #address-cells = <0>; 40 #address-cells = <0>;
59 compatible = "mti,cpu-interrup 41 compatible = "mti,cpu-interrupt-controller";
60 42
61 interrupt-controller; 43 interrupt-controller;
62 #interrupt-cells = <1>; 44 #interrupt-cells = <1>;
63 }; 45 };
64 46
65 ubus { 47 ubus {
66 #address-cells = <1>; 48 #address-cells = <1>;
67 #size-cells = <1>; 49 #size-cells = <1>;
68 50
69 compatible = "simple-bus"; 51 compatible = "simple-bus";
70 ranges; 52 ranges;
71 53
72 periph_clk: clock-controller@1 !! 54 clkctl: clock-controller@10000004 {
73 compatible = "brcm,bcm 55 compatible = "brcm,bcm6362-clocks";
74 reg = <0x10000004 0x4> 56 reg = <0x10000004 0x4>;
75 #clock-cells = <1>; 57 #clock-cells = <1>;
76 }; 58 };
77 59
78 pll_cntl: syscon@10000008 { !! 60 periph_cntl: syscon@10000008 {
79 compatible = "syscon"; 61 compatible = "syscon";
80 reg = <0x10000008 0x4> 62 reg = <0x10000008 0x4>;
81 native-endian; 63 native-endian;
82 <<
83 reboot { <<
84 compatible = " <<
85 offset = <0x0> <<
86 mask = <0x1>; <<
87 }; <<
88 }; 64 };
89 65
90 periph_rst: reset-controller@1 !! 66 reboot: syscon-reboot@10000008 {
91 compatible = "brcm,bcm !! 67 compatible = "syscon-reboot";
92 reg = <0x10000010 0x4> !! 68 regmap = <&periph_cntl>;
93 #reset-cells = <1>; !! 69 offset = <0x0>;
>> 70 mask = <0x1>;
94 }; 71 };
95 72
96 periph_intc: interrupt-control 73 periph_intc: interrupt-controller@10000020 {
97 compatible = "brcm,bcm 74 compatible = "brcm,bcm6345-l1-intc";
98 reg = <0x10000020 0x10 75 reg = <0x10000020 0x10>,
99 <0x10000030 0x10 76 <0x10000030 0x10>;
100 77
101 interrupt-controller; 78 interrupt-controller;
102 #interrupt-cells = <1> 79 #interrupt-cells = <1>;
103 80
104 interrupt-parent = <&c 81 interrupt-parent = <&cpu_intc>;
105 interrupts = <2>, <3>; 82 interrupts = <2>, <3>;
106 }; 83 };
107 84
108 wdt: watchdog@1000005c { <<
109 compatible = "brcm,bcm <<
110 reg = <0x1000005c 0xc> <<
111 <<
112 clocks = <&periph_osc> <<
113 clock-names = "refclk" <<
114 <<
115 timeout-sec = <30>; <<
116 }; <<
117 <<
118 uart0: serial@10000100 { 85 uart0: serial@10000100 {
119 compatible = "brcm,bcm 86 compatible = "brcm,bcm6345-uart";
120 reg = <0x10000100 0x18 87 reg = <0x10000100 0x18>;
121 88
122 interrupt-parent = <&p 89 interrupt-parent = <&periph_intc>;
123 interrupts = <3>; 90 interrupts = <3>;
124 91
125 clocks = <&periph_osc> !! 92 clocks = <&periph_clk>;
126 clock-names = "refclk" 93 clock-names = "refclk";
127 94
128 status = "disabled"; 95 status = "disabled";
129 }; 96 };
130 97
131 uart1: serial@10000120 { 98 uart1: serial@10000120 {
132 compatible = "brcm,bcm 99 compatible = "brcm,bcm6345-uart";
133 reg = <0x10000120 0x18 100 reg = <0x10000120 0x18>;
134 101
135 interrupt-parent = <&p 102 interrupt-parent = <&periph_intc>;
136 interrupts = <4>; 103 interrupts = <4>;
137 104
138 clocks = <&periph_osc> !! 105 clocks = <&periph_clk>;
139 clock-names = "refclk" 106 clock-names = "refclk";
140 107
141 status = "disabled"; 108 status = "disabled";
142 }; 109 };
143 110
144 nflash: nand@10000200 { <<
145 #address-cells = <1>; <<
146 #size-cells = <0>; <<
147 compatible = "brcm,nan <<
148 "brcm,brc <<
149 "brcm,brc <<
150 reg = <0x10000200 0x18 <<
151 <0x10000600 0x20 <<
152 <0x10000070 0x10 <<
153 reg-names = "nand", <<
154 "nand-cach <<
155 "nand-int- <<
156 <<
157 interrupt-parent = <&p <<
158 interrupts = <12>; <<
159 <<
160 clocks = <&periph_clk <<
161 clock-names = "nand"; <<
162 <<
163 status = "disabled"; <<
164 }; <<
165 <<
166 lsspi: spi@10000800 { <<
167 #address-cells = <1>; <<
168 #size-cells = <0>; <<
169 compatible = "brcm,bcm <<
170 reg = <0x10000800 0x70 <<
171 <<
172 interrupt-parent = <&p <<
173 interrupts = <2>; <<
174 <<
175 clocks = <&periph_clk <<
176 clock-names = "spi"; <<
177 <<
178 resets = <&periph_rst <<
179 reset-names = "spi"; <<
180 <<
181 status = "disabled"; <<
182 }; <<
183 <<
184 hsspi: spi@10001000 { <<
185 #address-cells = <1>; <<
186 #size-cells = <0>; <<
187 compatible = "brcm,bcm <<
188 reg = <0x10001000 0x60 <<
189 <<
190 interrupt-parent = <&p <<
191 interrupts = <5>; <<
192 <<
193 clocks = <&periph_clk <<
194 <&hsspi_osc>; <<
195 clock-names = "hsspi", <<
196 "pll"; <<
197 <<
198 resets = <&periph_rst <<
199 reset-names = "hsspi"; <<
200 <<
201 status = "disabled"; <<
202 }; <<
203 <<
204 periph_pwr: power-controller@1 <<
205 compatible = "brcm,bcm <<
206 reg = <0x10001848 0x4> <<
207 #power-domain-cells = <<
208 }; <<
209 <<
210 leds0: led-controller@10001900 111 leds0: led-controller@10001900 {
211 #address-cells = <1>; 112 #address-cells = <1>;
212 #size-cells = <0>; 113 #size-cells = <0>;
213 compatible = "brcm,bcm 114 compatible = "brcm,bcm6328-leds";
214 reg = <0x10001900 0x24 115 reg = <0x10001900 0x24>;
215 116
216 status = "disabled"; 117 status = "disabled";
217 }; 118 };
218 119
219 ehci: usb@10002500 { 120 ehci: usb@10002500 {
220 compatible = "brcm,bcm 121 compatible = "brcm,bcm6362-ehci", "generic-ehci";
221 reg = <0x10002500 0x10 122 reg = <0x10002500 0x100>;
222 big-endian; 123 big-endian;
223 124
224 interrupt-parent = <&p 125 interrupt-parent = <&periph_intc>;
225 interrupts = <10>; 126 interrupts = <10>;
226 127
227 phys = <&usbh 0>; <<
228 phy-names = "usb"; <<
229 <<
230 status = "disabled"; 128 status = "disabled";
231 }; 129 };
232 130
233 ohci: usb@10002600 { 131 ohci: usb@10002600 {
234 compatible = "brcm,bcm 132 compatible = "brcm,bcm6362-ohci", "generic-ohci";
235 reg = <0x10002600 0x10 133 reg = <0x10002600 0x100>;
236 big-endian; 134 big-endian;
237 no-big-frame-no; 135 no-big-frame-no;
238 136
239 interrupt-parent = <&p 137 interrupt-parent = <&periph_intc>;
240 interrupts = <9>; 138 interrupts = <9>;
241 <<
242 phys = <&usbh 0>; <<
243 phy-names = "usb"; <<
244 <<
245 status = "disabled"; <<
246 }; <<
247 <<
248 usbh: usb-phy@10002700 { <<
249 compatible = "brcm,bcm <<
250 reg = <0x10002700 0x38 <<
251 <<
252 #phy-cells = <1>; <<
253 <<
254 clocks = <&periph_clk <<
255 clock-names = "usbh"; <<
256 <<
257 power-domains = <&peri <<
258 <<
259 resets = <&periph_rst <<
260 reset-names = "usbh"; <<
261 139
262 status = "disabled"; 140 status = "disabled";
263 }; 141 };
264 }; 142 };
265 }; 143 };
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