1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 <<
3 #include "dt-bindings/clock/bcm6368-clock.h" <<
4 #include "dt-bindings/reset/bcm6368-reset.h" <<
5 <<
6 / { 2 / {
7 #address-cells = <1>; 3 #address-cells = <1>;
8 #size-cells = <1>; 4 #size-cells = <1>;
9 compatible = "brcm,bcm6368"; 5 compatible = "brcm,bcm6368";
10 6
11 cpus { 7 cpus {
12 #address-cells = <1>; 8 #address-cells = <1>;
13 #size-cells = <0>; 9 #size-cells = <0>;
14 10
15 mips-hpt-frequency = <20000000 11 mips-hpt-frequency = <200000000>;
16 12
17 cpu@0 { 13 cpu@0 {
18 compatible = "brcm,bmi 14 compatible = "brcm,bmips4350";
19 device_type = "cpu"; 15 device_type = "cpu";
20 reg = <0>; 16 reg = <0>;
21 }; 17 };
22 18
23 cpu@1 { 19 cpu@1 {
24 compatible = "brcm,bmi 20 compatible = "brcm,bmips4350";
25 device_type = "cpu"; 21 device_type = "cpu";
26 reg = <1>; 22 reg = <1>;
27 }; 23 };
28 }; 24 };
29 25
30 clocks { 26 clocks {
31 periph_osc: periph-osc { !! 27 periph_clk: periph-clk {
32 compatible = "fixed-cl 28 compatible = "fixed-clock";
33 #clock-cells = <0>; 29 #clock-cells = <0>;
34 clock-frequency = <500 30 clock-frequency = <50000000>;
35 clock-output-names = " <<
36 }; 31 };
37 }; 32 };
38 33
39 aliases { 34 aliases {
40 nflash = &nflash; <<
41 pflash = &pflash; <<
42 serial0 = &uart0; 35 serial0 = &uart0;
43 serial1 = &uart1; 36 serial1 = &uart1;
44 spi0 = &lsspi; <<
45 }; 37 };
46 38
47 cpu_intc: interrupt-controller { 39 cpu_intc: interrupt-controller {
48 #address-cells = <0>; 40 #address-cells = <0>;
49 compatible = "mti,cpu-interrup 41 compatible = "mti,cpu-interrupt-controller";
50 42
51 interrupt-controller; 43 interrupt-controller;
52 #interrupt-cells = <1>; 44 #interrupt-cells = <1>;
53 }; 45 };
54 46
55 ubus { 47 ubus {
56 #address-cells = <1>; 48 #address-cells = <1>;
57 #size-cells = <1>; 49 #size-cells = <1>;
58 50
59 compatible = "simple-bus"; 51 compatible = "simple-bus";
60 ranges; 52 ranges;
61 53
62 periph_clk: clock-controller@1 !! 54 clkctl: clock-controller@10000004 {
63 compatible = "brcm,bcm 55 compatible = "brcm,bcm6368-clocks";
64 reg = <0x10000004 0x4> 56 reg = <0x10000004 0x4>;
65 #clock-cells = <1>; 57 #clock-cells = <1>;
66 }; 58 };
67 59
68 pll_cntl: syscon@100000008 { !! 60 periph_cntl: syscon@100000008 {
69 compatible = "syscon"; 61 compatible = "syscon";
70 reg = <0x10000008 0x4> 62 reg = <0x10000008 0x4>;
71 native-endian; 63 native-endian;
>> 64 };
72 65
73 reboot { !! 66 reboot: syscon-reboot@10000008 {
74 compatible = " !! 67 compatible = "syscon-reboot";
75 offset = <0x0> !! 68 regmap = <&periph_cntl>;
76 mask = <0x1>; !! 69 offset = <0x0>;
77 }; !! 70 mask = <0x1>;
78 }; 71 };
79 72
80 periph_rst: reset-controller@1 73 periph_rst: reset-controller@10000010 {
81 compatible = "brcm,bcm 74 compatible = "brcm,bcm6345-reset";
82 reg = <0x10000010 0x4> 75 reg = <0x10000010 0x4>;
83 #reset-cells = <1>; 76 #reset-cells = <1>;
84 }; 77 };
85 78
86 periph_intc: interrupt-control 79 periph_intc: interrupt-controller@10000020 {
87 compatible = "brcm,bcm 80 compatible = "brcm,bcm6345-l1-intc";
88 reg = <0x10000020 0x10 81 reg = <0x10000020 0x10>,
89 <0x10000030 0x10 82 <0x10000030 0x10>;
90 83
91 interrupt-controller; 84 interrupt-controller;
92 #interrupt-cells = <1> 85 #interrupt-cells = <1>;
93 86
94 interrupt-parent = <&c 87 interrupt-parent = <&cpu_intc>;
95 interrupts = <2>, <3>; 88 interrupts = <2>, <3>;
96 }; 89 };
97 90
98 wdt: watchdog@1000005c { <<
99 compatible = "brcm,bcm <<
100 reg = <0x1000005c 0xc> <<
101 <<
102 clocks = <&periph_osc> <<
103 clock-names = "refclk" <<
104 <<
105 timeout-sec = <30>; <<
106 }; <<
107 <<
108 leds0: led-controller@100000d0 91 leds0: led-controller@100000d0 {
109 #address-cells = <1>; 92 #address-cells = <1>;
110 #size-cells = <0>; 93 #size-cells = <0>;
111 compatible = "brcm,bcm 94 compatible = "brcm,bcm6358-leds";
112 reg = <0x100000d0 0x8> 95 reg = <0x100000d0 0x8>;
113 <<
114 status = "disabled"; 96 status = "disabled";
115 }; 97 };
116 98
117 uart0: serial@10000100 { 99 uart0: serial@10000100 {
118 compatible = "brcm,bcm 100 compatible = "brcm,bcm6345-uart";
119 reg = <0x10000100 0x18 101 reg = <0x10000100 0x18>;
120 <<
121 interrupt-parent = <&p 102 interrupt-parent = <&periph_intc>;
122 interrupts = <2>; 103 interrupts = <2>;
123 !! 104 clocks = <&periph_clk>;
124 clocks = <&periph_osc> <<
125 clock-names = "refclk" 105 clock-names = "refclk";
126 <<
127 status = "disabled"; 106 status = "disabled";
128 }; 107 };
129 108
130 uart1: serial@10000120 { 109 uart1: serial@10000120 {
131 compatible = "brcm,bcm 110 compatible = "brcm,bcm6345-uart";
132 reg = <0x10000120 0x18 111 reg = <0x10000120 0x18>;
133 <<
134 interrupt-parent = <&p 112 interrupt-parent = <&periph_intc>;
135 interrupts = <3>; 113 interrupts = <3>;
136 !! 114 clocks = <&periph_clk>;
137 clocks = <&periph_osc> <<
138 clock-names = "refclk" 115 clock-names = "refclk";
139 <<
140 status = "disabled"; <<
141 }; <<
142 <<
143 nflash: nand@10000200 { <<
144 #address-cells = <1>; <<
145 #size-cells = <0>; <<
146 compatible = "brcm,nan <<
147 "brcm,brc <<
148 "brcm,brc <<
149 reg = <0x10000200 0x18 <<
150 <0x10000600 0x20 <<
151 <0x10000070 0x10 <<
152 reg-names = "nand", <<
153 "nand-cach <<
154 "nand-int- <<
155 <<
156 interrupt-parent = <&p <<
157 interrupts = <10>; <<
158 <<
159 clocks = <&periph_clk <<
160 clock-names = "nand"; <<
161 <<
162 status = "disabled"; <<
163 }; <<
164 <<
165 lsspi: spi@10000800 { <<
166 #address-cells = <1>; <<
167 #size-cells = <0>; <<
168 compatible = "brcm,bcm <<
169 reg = <0x10000800 0x70 <<
170 <<
171 interrupt-parent = <&p <<
172 interrupts = <1>; <<
173 <<
174 clocks = <&periph_clk <<
175 clock-names = "spi"; <<
176 <<
177 resets = <&periph_rst <<
178 reset-names = "spi"; <<
179 <<
180 status = "disabled"; 116 status = "disabled";
181 }; 117 };
182 118
183 ehci: usb@10001500 { 119 ehci: usb@10001500 {
184 compatible = "brcm,bcm 120 compatible = "brcm,bcm6368-ehci", "generic-ehci";
185 reg = <0x10001500 0x10 121 reg = <0x10001500 0x100>;
186 big-endian; 122 big-endian;
187 <<
188 interrupt-parent = <&p 123 interrupt-parent = <&periph_intc>;
189 interrupts = <7>; 124 interrupts = <7>;
190 <<
191 phys = <&usbh 0>; <<
192 phy-names = "usb"; <<
193 <<
194 status = "disabled"; 125 status = "disabled";
195 }; 126 };
196 127
197 ohci: usb@10001600 { 128 ohci: usb@10001600 {
198 compatible = "brcm,bcm 129 compatible = "brcm,bcm6368-ohci", "generic-ohci";
199 reg = <0x10001600 0x10 130 reg = <0x10001600 0x100>;
200 big-endian; 131 big-endian;
201 no-big-frame-no; 132 no-big-frame-no;
202 <<
203 interrupt-parent = <&p 133 interrupt-parent = <&periph_intc>;
204 interrupts = <5>; 134 interrupts = <5>;
205 <<
206 phys = <&usbh 0>; <<
207 phy-names = "usb"; <<
208 <<
209 status = "disabled"; 135 status = "disabled";
210 }; 136 };
211 <<
212 usbh: usb-phy@10001700 { <<
213 compatible = "brcm,bcm <<
214 reg = <0x10001700 0x38 <<
215 #phy-cells = <1>; <<
216 <<
217 clocks = <&periph_clk <<
218 clock-names = "usbh"; <<
219 <<
220 resets = <&periph_rst <<
221 reset-names = "usbh"; <<
222 <<
223 status = "disabled"; <<
224 }; <<
225 <<
226 random: rng@10004180 { <<
227 compatible = "brcm,bcm <<
228 reg = <0x10004180 0x14 <<
229 <<
230 clocks = <&periph_clk <<
231 clock-names = "ipsec"; <<
232 <<
233 resets = <&periph_rst <<
234 reset-names = "ipsec"; <<
235 }; <<
236 }; <<
237 <<
238 pflash: nor@18000000 { <<
239 #address-cells = <1>; <<
240 #size-cells = <1>; <<
241 compatible = "cfi-flash"; <<
242 reg = <0x18000000 0x2000000>; <<
243 bank-width = <2>; <<
244 <<
245 status = "disabled"; <<
246 }; 137 };
247 }; 138 };
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