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Linux/scripts/dtc/include-prefixes/mips/brcm/bcm7125.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/mips/brcm/bcm7125.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/mips/brcm/bcm7125.dtsi (Architecture sparc64)


  1 // SPDX-License-Identifier: GPL-2.0                 1 // SPDX-License-Identifier: GPL-2.0
  2 / {                                                 2 / {
  3         #address-cells = <1>;                       3         #address-cells = <1>;
  4         #size-cells = <1>;                          4         #size-cells = <1>;
  5         compatible = "brcm,bcm7125";                5         compatible = "brcm,bcm7125";
  6                                                     6 
  7         cpus {                                      7         cpus {
  8                 #address-cells = <1>;               8                 #address-cells = <1>;
  9                 #size-cells = <0>;                  9                 #size-cells = <0>;
 10                                                    10 
 11                 mips-hpt-frequency = <20250000     11                 mips-hpt-frequency = <202500000>;
 12                                                    12 
 13                 cpu@0 {                            13                 cpu@0 {
 14                         compatible = "brcm,bmi     14                         compatible = "brcm,bmips4380";
 15                         device_type = "cpu";       15                         device_type = "cpu";
 16                         reg = <0>;                 16                         reg = <0>;
 17                 };                                 17                 };
 18                                                    18 
 19                 cpu@1 {                            19                 cpu@1 {
 20                         compatible = "brcm,bmi     20                         compatible = "brcm,bmips4380";
 21                         device_type = "cpu";       21                         device_type = "cpu";
 22                         reg = <1>;                 22                         reg = <1>;
 23                 };                                 23                 };
 24         };                                         24         };
 25                                                    25 
 26         aliases {                                  26         aliases {
 27                 uart0 = &uart0;                    27                 uart0 = &uart0;
 28         };                                         28         };
 29                                                    29 
 30         cpu_intc: interrupt-controller {           30         cpu_intc: interrupt-controller {
 31                 #address-cells = <0>;              31                 #address-cells = <0>;
 32                 compatible = "mti,cpu-interrup     32                 compatible = "mti,cpu-interrupt-controller";
 33                                                    33 
 34                 interrupt-controller;              34                 interrupt-controller;
 35                 #interrupt-cells = <1>;            35                 #interrupt-cells = <1>;
 36         };                                         36         };
 37                                                    37 
 38         clocks {                                   38         clocks {
 39                 uart_clk: uart_clk {               39                 uart_clk: uart_clk {
 40                         compatible = "fixed-cl     40                         compatible = "fixed-clock";
 41                         #clock-cells = <0>;        41                         #clock-cells = <0>;
 42                         clock-frequency = <810     42                         clock-frequency = <81000000>;
 43                 };                                 43                 };
 44                                                    44 
 45                 upg_clk: upg_clk {                 45                 upg_clk: upg_clk {
 46                         compatible = "fixed-cl     46                         compatible = "fixed-clock";
 47                         #clock-cells = <0>;        47                         #clock-cells = <0>;
 48                         clock-frequency = <270     48                         clock-frequency = <27000000>;
 49                 };                                 49                 };
 50         };                                         50         };
 51                                                    51 
 52         rdb {                                      52         rdb {
 53                 #address-cells = <1>;              53                 #address-cells = <1>;
 54                 #size-cells = <1>;                 54                 #size-cells = <1>;
 55                                                    55 
 56                 compatible = "simple-bus";         56                 compatible = "simple-bus";
 57                 ranges = <0 0x10000000 0x01000     57                 ranges = <0 0x10000000 0x01000000>;
 58                                                    58 
 59                 periph_intc: interrupt-control     59                 periph_intc: interrupt-controller@441400 {
 60                         compatible = "brcm,bcm     60                         compatible = "brcm,bcm7038-l1-intc";
 61                         reg = <0x441400 0x30>,     61                         reg = <0x441400 0x30>, <0x441600 0x30>;
 62                                                    62 
 63                         interrupt-controller;      63                         interrupt-controller;
 64                         #interrupt-cells = <1>     64                         #interrupt-cells = <1>;
 65                                                    65 
 66                         interrupt-parent = <&c     66                         interrupt-parent = <&cpu_intc>;
 67                         interrupts = <2>, <3>;     67                         interrupts = <2>, <3>;
 68                 };                                 68                 };
 69                                                    69 
 70                 sun_l2_intc: interrupt-control     70                 sun_l2_intc: interrupt-controller@401800 {
 71                         compatible = "brcm,l2-     71                         compatible = "brcm,l2-intc";
 72                         reg = <0x401800 0x30>;     72                         reg = <0x401800 0x30>;
 73                         interrupt-controller;      73                         interrupt-controller;
 74                         #interrupt-cells = <1>     74                         #interrupt-cells = <1>;
 75                         interrupt-parent = <&p     75                         interrupt-parent = <&periph_intc>;
 76                         interrupts = <23>;         76                         interrupts = <23>;
 77                 };                                 77                 };
 78                                                    78 
 79                 gisb-arb@400000 {                  79                 gisb-arb@400000 {
 80                         compatible = "brcm,bcm     80                         compatible = "brcm,bcm7400-gisb-arb";
 81                         reg = <0x400000 0xdc>;     81                         reg = <0x400000 0xdc>;
 82                         native-endian;             82                         native-endian;
 83                         interrupt-parent = <&s     83                         interrupt-parent = <&sun_l2_intc>;
 84                         interrupts = <0>, <2>;     84                         interrupts = <0>, <2>;
 85                         brcm,gisb-arb-master-m     85                         brcm,gisb-arb-master-mask = <0x2f7>;
 86                         brcm,gisb-arb-master-n     86                         brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
 87                                                    87                                                      "bsp_0", "rdc_0", "rptd_0",
 88                                                    88                                                      "avd_0", "jtag_0";
 89                 };                                 89                 };
 90                                                    90 
 91                 upg_irq0_intc: interrupt-contr     91                 upg_irq0_intc: interrupt-controller@406780 {
 92                         compatible = "brcm,bcm     92                         compatible = "brcm,bcm7120-l2-intc";
 93                         reg = <0x406780 0x8>;      93                         reg = <0x406780 0x8>;
 94                                                    94 
 95                         brcm,int-map-mask = <0     95                         brcm,int-map-mask = <0x44>, <0xf000000>, <0x100000>;
 96                         brcm,int-fwd-mask = <0     96                         brcm,int-fwd-mask = <0x70000>;
 97                                                    97 
 98                         interrupt-controller;      98                         interrupt-controller;
 99                         #interrupt-cells = <1>     99                         #interrupt-cells = <1>;
100                                                   100 
101                         interrupt-parent = <&p    101                         interrupt-parent = <&periph_intc>;
102                         interrupts = <18>, <19    102                         interrupts = <18>, <19>, <20>;
103                         interrupt-names = "upg    103                         interrupt-names = "upg_main", "upg_bsc", "upg_spi";
104                 };                                104                 };
105                                                   105 
106                 sun_top_ctrl: syscon@404000 {     106                 sun_top_ctrl: syscon@404000 {
107                         compatible = "brcm,bcm    107                         compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
108                         reg = <0x404000 0x60c>    108                         reg = <0x404000 0x60c>;
109                         native-endian;            109                         native-endian;
110                 };                                110                 };
111                                                   111 
112                 reboot {                          112                 reboot {
113                         compatible = "brcm,bcm    113                         compatible = "brcm,bcm7038-reboot";
114                         syscon = <&sun_top_ctr    114                         syscon = <&sun_top_ctrl 0x8 0x14>;
115                 };                                115                 };
116                                                   116 
117                 uart0: serial@406b00 {            117                 uart0: serial@406b00 {
118                         compatible = "ns16550a    118                         compatible = "ns16550a";
119                         reg = <0x406b00 0x20>;    119                         reg = <0x406b00 0x20>;
120                         reg-io-width = <0x4>;     120                         reg-io-width = <0x4>;
121                         reg-shift = <0x2>;        121                         reg-shift = <0x2>;
122                         native-endian;            122                         native-endian;
123                         interrupt-parent = <&p    123                         interrupt-parent = <&periph_intc>;
124                         interrupts = <21>;        124                         interrupts = <21>;
125                         clocks = <&uart_clk>;     125                         clocks = <&uart_clk>;
126                         status = "disabled";      126                         status = "disabled";
127                 };                                127                 };
128                                                   128 
129                 uart1: serial@406b40 {            129                 uart1: serial@406b40 {
130                         compatible = "ns16550a    130                         compatible = "ns16550a";
131                         reg = <0x406b40 0x20>;    131                         reg = <0x406b40 0x20>;
132                         reg-io-width = <0x4>;     132                         reg-io-width = <0x4>;
133                         reg-shift = <0x2>;        133                         reg-shift = <0x2>;
134                         native-endian;            134                         native-endian;
135                         interrupt-parent = <&p    135                         interrupt-parent = <&periph_intc>;
136                         interrupts = <64>;        136                         interrupts = <64>;
137                         clocks = <&uart_clk>;     137                         clocks = <&uart_clk>;
138                         status = "disabled";      138                         status = "disabled";
139                 };                                139                 };
140                                                   140 
141                 uart2: serial@406b80 {            141                 uart2: serial@406b80 {
142                         compatible = "ns16550a    142                         compatible = "ns16550a";
143                         reg = <0x406b80 0x20>;    143                         reg = <0x406b80 0x20>;
144                         reg-io-width = <0x4>;     144                         reg-io-width = <0x4>;
145                         reg-shift = <0x2>;        145                         reg-shift = <0x2>;
146                         native-endian;            146                         native-endian;
147                         interrupt-parent = <&p    147                         interrupt-parent = <&periph_intc>;
148                         interrupts = <65>;        148                         interrupts = <65>;
149                         clocks = <&uart_clk>;     149                         clocks = <&uart_clk>;
150                         status = "disabled";      150                         status = "disabled";
151                 };                                151                 };
152                                                   152 
153                 bsca: i2c@406200 {                153                 bsca: i2c@406200 {
154                       clock-frequency = <39000    154                       clock-frequency = <390000>;
155                       compatible = "brcm,brcms    155                       compatible = "brcm,brcmstb-i2c";
156                       interrupt-parent = <&upg    156                       interrupt-parent = <&upg_irq0_intc>;
157                       reg = <0x406200 0x58>;      157                       reg = <0x406200 0x58>;
158                       interrupts = <24>;          158                       interrupts = <24>;
159                       interrupt-names = "upg_b    159                       interrupt-names = "upg_bsca";
160                       status = "disabled";        160                       status = "disabled";
161                 };                                161                 };
162                                                   162 
163                 bscb: i2c@406280 {                163                 bscb: i2c@406280 {
164                       clock-frequency = <39000    164                       clock-frequency = <390000>;
165                       compatible = "brcm,brcms    165                       compatible = "brcm,brcmstb-i2c";
166                       interrupt-parent = <&upg    166                       interrupt-parent = <&upg_irq0_intc>;
167                       reg = <0x406280 0x58>;      167                       reg = <0x406280 0x58>;
168                       interrupts = <25>;          168                       interrupts = <25>;
169                       interrupt-names = "upg_b    169                       interrupt-names = "upg_bscb";
170                       status = "disabled";        170                       status = "disabled";
171                 };                                171                 };
172                                                   172 
173                 bscc: i2c@406300 {                173                 bscc: i2c@406300 {
174                       clock-frequency = <39000    174                       clock-frequency = <390000>;
175                       compatible = "brcm,brcms    175                       compatible = "brcm,brcmstb-i2c";
176                       interrupt-parent = <&upg    176                       interrupt-parent = <&upg_irq0_intc>;
177                       reg = <0x406300 0x58>;      177                       reg = <0x406300 0x58>;
178                       interrupts = <26>;          178                       interrupts = <26>;
179                       interrupt-names = "upg_b    179                       interrupt-names = "upg_bscc";
180                       status = "disabled";        180                       status = "disabled";
181                 };                                181                 };
182                                                   182 
183                 bscd: i2c@406380 {                183                 bscd: i2c@406380 {
184                       clock-frequency = <39000    184                       clock-frequency = <390000>;
185                       compatible = "brcm,brcms    185                       compatible = "brcm,brcmstb-i2c";
186                       interrupt-parent = <&upg    186                       interrupt-parent = <&upg_irq0_intc>;
187                       reg = <0x406380 0x58>;      187                       reg = <0x406380 0x58>;
188                       interrupts = <27>;          188                       interrupts = <27>;
189                       interrupt-names = "upg_b    189                       interrupt-names = "upg_bscd";
190                       status = "disabled";        190                       status = "disabled";
191                 };                                191                 };
192                                                   192 
193                 pwma: pwm@406580 {                193                 pwma: pwm@406580 {
194                         compatible = "brcm,bcm    194                         compatible = "brcm,bcm7038-pwm";
195                         reg = <0x406580 0x28>;    195                         reg = <0x406580 0x28>;
196                         #pwm-cells = <2>;         196                         #pwm-cells = <2>;
197                         clocks = <&upg_clk>;      197                         clocks = <&upg_clk>;
198                         status = "disabled";      198                         status = "disabled";
199                 };                                199                 };
200                                                   200 
201                 watchdog: watchdog@4067e8 {       201                 watchdog: watchdog@4067e8 {
202                         clocks = <&upg_clk>;      202                         clocks = <&upg_clk>;
203                         compatible = "brcm,bcm    203                         compatible = "brcm,bcm7038-wdt";
204                         reg = <0x4067e8 0x14>;    204                         reg = <0x4067e8 0x14>;
205                         status = "disabled";      205                         status = "disabled";
206                 };                                206                 };
207                                                   207 
208                 upg_gio: gpio@406700 {            208                 upg_gio: gpio@406700 {
209                         compatible = "brcm,brc    209                         compatible = "brcm,brcmstb-gpio";
210                         reg = <0x406700 0x80>;    210                         reg = <0x406700 0x80>;
211                         #gpio-cells = <2>;        211                         #gpio-cells = <2>;
212                         #interrupt-cells = <2>    212                         #interrupt-cells = <2>;
213                         gpio-controller;          213                         gpio-controller;
214                         interrupt-controller;     214                         interrupt-controller;
215                         interrupt-parent = <&u    215                         interrupt-parent = <&upg_irq0_intc>;
216                         interrupts = <6>;         216                         interrupts = <6>;
217                         brcm,gpio-bank-widths     217                         brcm,gpio-bank-widths = <32 32 32 18>;
218                 };                                218                 };
219                                                   219 
220                 ehci0: usb@488300 {               220                 ehci0: usb@488300 {
221                         compatible = "brcm,bcm    221                         compatible = "brcm,bcm7125-ehci", "generic-ehci";
222                         reg = <0x488300 0x100>    222                         reg = <0x488300 0x100>;
223                         native-endian;            223                         native-endian;
224                         interrupt-parent = <&p    224                         interrupt-parent = <&periph_intc>;
225                         interrupts = <60>;        225                         interrupts = <60>;
226                         status = "disabled";      226                         status = "disabled";
227                 };                                227                 };
228                                                   228 
229                 ohci0: usb@488400 {               229                 ohci0: usb@488400 {
230                         compatible = "brcm,bcm    230                         compatible = "brcm,bcm7125-ohci", "generic-ohci";
231                         reg = <0x488400 0x100>    231                         reg = <0x488400 0x100>;
232                         native-endian;            232                         native-endian;
233                         interrupt-parent = <&p    233                         interrupt-parent = <&periph_intc>;
234                         interrupts = <61>;        234                         interrupts = <61>;
235                         status = "disabled";      235                         status = "disabled";
236                 };                                236                 };
237                                                   237 
238                 spi_l2_intc: interrupt-control    238                 spi_l2_intc: interrupt-controller@411d00 {
239                         compatible = "brcm,l2-    239                         compatible = "brcm,l2-intc";
240                         reg = <0x411d00 0x30>;    240                         reg = <0x411d00 0x30>;
241                         interrupt-controller;     241                         interrupt-controller;
242                         #interrupt-cells = <1>    242                         #interrupt-cells = <1>;
243                         interrupt-parent = <&p    243                         interrupt-parent = <&periph_intc>;
244                         interrupts = <79>;        244                         interrupts = <79>;
245                 };                                245                 };
246                                                   246 
247                 qspi: spi@443000 {                247                 qspi: spi@443000 {
248                         #address-cells = <0x1>    248                         #address-cells = <0x1>;
249                         #size-cells = <0x0>;      249                         #size-cells = <0x0>;
250                         compatible = "brcm,spi    250                         compatible = "brcm,spi-bcm-qspi",
251                                      "brcm,spi    251                                      "brcm,spi-brcmstb-qspi";
252                         clocks = <&upg_clk>;      252                         clocks = <&upg_clk>;
253                         reg = <0x440920 0x4 0x    253                         reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
254                         reg-names = "cs_reg",     254                         reg-names = "cs_reg", "hif_mspi", "bspi";
255                         interrupts = <0x0 0x1     255                         interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
256                         interrupt-parent = <&s    256                         interrupt-parent = <&spi_l2_intc>;
257                         interrupt-names = "spi    257                         interrupt-names = "spi_lr_fullness_reached",
258                                           "spi    258                                           "spi_lr_session_aborted",
259                                           "spi    259                                           "spi_lr_impatient",
260                                           "spi    260                                           "spi_lr_session_done",
261                                           "spi    261                                           "spi_lr_overread",
262                                           "msp    262                                           "mspi_done",
263                                           "msp    263                                           "mspi_halted";
264                         status = "disabled";      264                         status = "disabled";
265                 };                                265                 };
266                                                   266 
267                 mspi: spi@406400 {                267                 mspi: spi@406400 {
268                         #address-cells = <1>;     268                         #address-cells = <1>;
269                         #size-cells = <0>;        269                         #size-cells = <0>;
270                         compatible = "brcm,spi    270                         compatible = "brcm,spi-bcm-qspi",
271                                      "brcm,spi    271                                      "brcm,spi-brcmstb-mspi";
272                         clocks = <&upg_clk>;      272                         clocks = <&upg_clk>;
273                         reg = <0x406400 0x180>    273                         reg = <0x406400 0x180>;
274                         reg-names = "mspi";       274                         reg-names = "mspi";
275                         interrupts = <0x14>;      275                         interrupts = <0x14>;
276                         interrupt-parent = <&u    276                         interrupt-parent = <&upg_irq0_intc>;
277                         interrupt-names = "msp    277                         interrupt-names = "mspi_done";
278                         status = "disabled";      278                         status = "disabled";
279                 };                                279                 };
280         };                                        280         };
281 };                                                281 };
                                                      

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