1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 2
3 / { 3 / {
4 pch: bus@10000000 { 4 pch: bus@10000000 {
5 compatible = "simple-bus"; 5 compatible = "simple-bus";
6 #address-cells = <2>; 6 #address-cells = <2>;
7 #size-cells = <2>; 7 #size-cells = <2>;
8 ranges = <0 0x10000000 0 0x100 8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x000000 11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
12 12
13 pic: interrupt-controller@1000 13 pic: interrupt-controller@10000000 {
14 compatible = "loongson 14 compatible = "loongson,pch-pic-1.0";
15 reg = <0 0x10000000 0 15 reg = <0 0x10000000 0 0x400>;
16 interrupt-controller; 16 interrupt-controller;
17 interrupt-parent = <&h 17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec 18 loongson,pic-base-vec = <0>;
19 #interrupt-cells = <2> 19 #interrupt-cells = <2>;
20 }; 20 };
21 21
22 rtc0: rtc@100d0100 { <<
23 compatible = "loongson <<
24 reg = <0 0x100d0100 0 <<
25 interrupt-parent = <&p <<
26 interrupts = <52 IRQ_T <<
27 }; <<
28 <<
29 ls7a_uart0: serial@10080000 { <<
30 compatible = "ns16550a <<
31 reg = <0 0x10080000 0 <<
32 clock-frequency = <500 <<
33 interrupt-parent = <&p <<
34 interrupts = <8 IRQ_TY <<
35 no-loopback-test; <<
36 }; <<
37 <<
38 ls7a_uart1: serial@10080100 { <<
39 status = "disabled"; <<
40 compatible = "ns16550a <<
41 reg = <0 0x10080100 0 <<
42 clock-frequency = <500 <<
43 interrupt-parent = <&p <<
44 interrupts = <8 IRQ_TY <<
45 no-loopback-test; <<
46 }; <<
47 <<
48 ls7a_uart2: serial@10080200 { <<
49 status = "disabled"; <<
50 compatible = "ns16550a <<
51 reg = <0 0x10080200 0 <<
52 clock-frequency = <500 <<
53 interrupt-parent = <&p <<
54 interrupts = <8 IRQ_TY <<
55 no-loopback-test; <<
56 }; <<
57 <<
58 ls7a_uart3: serial@10080300 { <<
59 status = "disabled"; <<
60 compatible = "ns16550a <<
61 reg = <0 0x10080300 0 <<
62 clock-frequency = <500 <<
63 interrupt-parent = <&p <<
64 interrupts = <8 IRQ_TY <<
65 no-loopback-test; <<
66 }; <<
67 <<
68 pci@1a000000 { 22 pci@1a000000 {
69 compatible = "loongson 23 compatible = "loongson,ls7a-pci";
70 device_type = "pci"; 24 device_type = "pci";
71 #address-cells = <3>; 25 #address-cells = <3>;
72 #size-cells = <2>; 26 #size-cells = <2>;
73 #interrupt-cells = <2> 27 #interrupt-cells = <2>;
74 msi-parent = <&msi>; 28 msi-parent = <&msi>;
75 29
76 reg = <0 0x1a000000 0 30 reg = <0 0x1a000000 0 0x02000000>,
77 <0xefe 0x00000 31 <0xefe 0x00000000 0 0x20000000>;
78 32
79 ranges = <0x01000000 0 33 ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
80 <0x02000000 0 34 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
81 35
82 ohci@4,0 { 36 ohci@4,0 {
83 compatible = " 37 compatible = "pci0014,7a24.0",
84 38 "pci0014,7a24",
85 39 "pciclass0c0310",
86 40 "pciclass0c03";
87 41
88 reg = <0x2000 42 reg = <0x2000 0x0 0x0 0x0 0x0>;
89 interrupts = < 43 interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
90 interrupt-pare 44 interrupt-parent = <&pic>;
91 }; 45 };
92 46
93 ehci@4,1 { 47 ehci@4,1 {
94 compatible = " 48 compatible = "pci0014,7a14.0",
95 49 "pci0014,7a14",
96 50 "pciclass0c0320",
97 51 "pciclass0c03";
98 52
99 reg = <0x2100 53 reg = <0x2100 0x0 0x0 0x0 0x0>;
100 interrupts = < 54 interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
101 interrupt-pare 55 interrupt-parent = <&pic>;
102 }; 56 };
103 57
104 ohci@5,0 { 58 ohci@5,0 {
105 compatible = " 59 compatible = "pci0014,7a24.0",
106 60 "pci0014,7a24",
107 61 "pciclass0c0310",
108 62 "pciclass0c03";
109 63
110 reg = <0x2800 64 reg = <0x2800 0x0 0x0 0x0 0x0>;
111 interrupts = < 65 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
112 interrupt-pare 66 interrupt-parent = <&pic>;
113 }; 67 };
114 68
115 ehci@5,1 { 69 ehci@5,1 {
116 compatible = " 70 compatible = "pci0014,7a14.0",
117 71 "pci0014,7a14",
118 72 "pciclass0c0320",
119 73 "pciclass0c03";
120 74
121 reg = <0x2900 75 reg = <0x2900 0x0 0x0 0x0 0x0>;
122 interrupts = < 76 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
123 interrupt-pare 77 interrupt-parent = <&pic>;
124 }; 78 };
125 79
126 sata@8,0 { 80 sata@8,0 {
127 compatible = " 81 compatible = "pci0014,7a08.0",
128 82 "pci0014,7a08",
129 83 "pciclass010601",
130 84 "pciclass0106";
131 85
132 reg = <0x4000 86 reg = <0x4000 0x0 0x0 0x0 0x0>;
133 interrupts = < 87 interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-pare 88 interrupt-parent = <&pic>;
135 }; 89 };
136 90
137 sata@8,1 { 91 sata@8,1 {
138 compatible = " 92 compatible = "pci0014,7a08.0",
139 93 "pci0014,7a08",
140 94 "pciclass010601",
141 95 "pciclass0106";
142 96
143 reg = <0x4100 97 reg = <0x4100 0x0 0x0 0x0 0x0>;
144 interrupts = < 98 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
145 interrupt-pare 99 interrupt-parent = <&pic>;
146 }; 100 };
147 101
148 sata@8,2 { 102 sata@8,2 {
149 compatible = " 103 compatible = "pci0014,7a08.0",
150 104 "pci0014,7a08",
151 105 "pciclass010601",
152 106 "pciclass0106";
153 107
154 reg = <0x4200 108 reg = <0x4200 0x0 0x0 0x0 0x0>;
155 interrupts = < 109 interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
156 interrupt-pare 110 interrupt-parent = <&pic>;
157 }; 111 };
158 112
159 gpu@6,0 { 113 gpu@6,0 {
160 compatible = " 114 compatible = "pci0014,7a15.0",
161 115 "pci0014,7a15",
162 116 "pciclass030200",
163 117 "pciclass0302";
164 118
165 reg = <0x3000 119 reg = <0x3000 0x0 0x0 0x0 0x0>;
166 interrupts = < 120 interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
167 interrupt-pare 121 interrupt-parent = <&pic>;
168 }; 122 };
169 123
170 dc@6,1 { 124 dc@6,1 {
171 compatible = " 125 compatible = "pci0014,7a06.0",
172 126 "pci0014,7a06",
173 127 "pciclass030000",
174 128 "pciclass0300";
175 129
176 reg = <0x3100 130 reg = <0x3100 0x0 0x0 0x0 0x0>;
177 interrupts = < 131 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
178 interrupt-pare 132 interrupt-parent = <&pic>;
179 }; 133 };
180 134
181 hda@7,0 { 135 hda@7,0 {
182 compatible = " 136 compatible = "pci0014,7a07.0",
183 137 "pci0014,7a07",
184 138 "pciclass040300",
185 139 "pciclass0403";
186 140
187 reg = <0x3800 141 reg = <0x3800 0x0 0x0 0x0 0x0>;
188 interrupts = < 142 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
189 interrupt-pare 143 interrupt-parent = <&pic>;
190 }; 144 };
191 145
192 gmac@3,0 { 146 gmac@3,0 {
193 compatible = " 147 compatible = "pci0014,7a03.0",
194 148 "pci0014,7a03",
195 149 "pciclass020000",
196 150 "pciclass0200";
197 151
198 reg = <0x1800 152 reg = <0x1800 0x0 0x0 0x0 0x0>;
199 interrupts = < 153 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
200 < 154 <13 IRQ_TYPE_LEVEL_HIGH>;
201 interrupt-name 155 interrupt-names = "macirq", "eth_lpi";
202 interrupt-pare 156 interrupt-parent = <&pic>;
203 phy-mode = "rg 157 phy-mode = "rgmii";
204 mdio { 158 mdio {
205 #addre 159 #address-cells = <1>;
206 #size- 160 #size-cells = <0>;
207 compat 161 compatible = "snps,dwmac-mdio";
208 phy0: 162 phy0: ethernet-phy@0 {
209 163 reg = <0>;
210 }; 164 };
211 }; 165 };
212 }; 166 };
213 167
214 gmac@3,1 { 168 gmac@3,1 {
215 compatible = " 169 compatible = "pci0014,7a03.0",
216 170 "pci0014,7a03",
217 171 "pciclass020000",
218 !! 172 "pciclass0200";
219 <<
220 173
221 reg = <0x1900 174 reg = <0x1900 0x0 0x0 0x0 0x0>;
222 interrupts = < 175 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
223 < 176 <15 IRQ_TYPE_LEVEL_HIGH>;
224 interrupt-name 177 interrupt-names = "macirq", "eth_lpi";
225 interrupt-pare 178 interrupt-parent = <&pic>;
226 phy-mode = "rg 179 phy-mode = "rgmii";
227 mdio { 180 mdio {
228 #addre 181 #address-cells = <1>;
229 #size- 182 #size-cells = <0>;
230 compat 183 compatible = "snps,dwmac-mdio";
231 phy1: 184 phy1: ethernet-phy@1 {
232 185 reg = <0>;
233 }; 186 };
234 }; 187 };
235 }; 188 };
236 189
237 pci_bridge@9,0 { 190 pci_bridge@9,0 {
238 compatible = " 191 compatible = "pci0014,7a19.1",
239 192 "pci0014,7a19",
240 193 "pciclass060400",
241 194 "pciclass0604";
242 195
243 reg = <0x4800 196 reg = <0x4800 0x0 0x0 0x0 0x0>;
244 interrupts = < 197 interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
245 interrupt-pare 198 interrupt-parent = <&pic>;
246 199
247 #interrupt-cel 200 #interrupt-cells = <1>;
248 interrupt-map- 201 interrupt-map-mask = <0 0 0 0>;
249 interrupt-map 202 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
250 }; 203 };
251 204
252 pci_bridge@a,0 { 205 pci_bridge@a,0 {
253 compatible = " 206 compatible = "pci0014,7a09.1",
254 207 "pci0014,7a09",
255 208 "pciclass060400",
256 209 "pciclass0604";
257 210
258 reg = <0x5000 211 reg = <0x5000 0x0 0x0 0x0 0x0>;
259 interrupts = < 212 interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
260 interrupt-pare 213 interrupt-parent = <&pic>;
261 214
262 #interrupt-cel 215 #interrupt-cells = <1>;
263 interrupt-map- 216 interrupt-map-mask = <0 0 0 0>;
264 interrupt-map 217 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
265 }; 218 };
266 219
267 pci_bridge@b,0 { 220 pci_bridge@b,0 {
268 compatible = " 221 compatible = "pci0014,7a09.1",
269 222 "pci0014,7a09",
270 223 "pciclass060400",
271 224 "pciclass0604";
272 225
273 reg = <0x5800 226 reg = <0x5800 0x0 0x0 0x0 0x0>;
274 interrupts = < 227 interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
275 interrupt-pare 228 interrupt-parent = <&pic>;
276 229
277 #interrupt-cel 230 #interrupt-cells = <1>;
278 interrupt-map- 231 interrupt-map-mask = <0 0 0 0>;
279 interrupt-map 232 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
280 }; 233 };
281 234
282 pci_bridge@c,0 { 235 pci_bridge@c,0 {
283 compatible = " 236 compatible = "pci0014,7a09.1",
284 237 "pci0014,7a09",
285 238 "pciclass060400",
286 239 "pciclass0604";
287 240
288 reg = <0x6000 241 reg = <0x6000 0x0 0x0 0x0 0x0>;
289 interrupts = < 242 interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
290 interrupt-pare 243 interrupt-parent = <&pic>;
291 244
292 #interrupt-cel 245 #interrupt-cells = <1>;
293 interrupt-map- 246 interrupt-map-mask = <0 0 0 0>;
294 interrupt-map 247 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
295 }; 248 };
296 249
297 pci_bridge@d,0 { 250 pci_bridge@d,0 {
298 compatible = " 251 compatible = "pci0014,7a19.1",
299 252 "pci0014,7a19",
300 253 "pciclass060400",
301 254 "pciclass0604";
302 255
303 reg = <0x6800 256 reg = <0x6800 0x0 0x0 0x0 0x0>;
304 interrupts = < 257 interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
305 interrupt-pare 258 interrupt-parent = <&pic>;
306 259
307 #interrupt-cel 260 #interrupt-cells = <1>;
308 interrupt-map- 261 interrupt-map-mask = <0 0 0 0>;
309 interrupt-map 262 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
310 }; 263 };
311 264
312 pci_bridge@e,0 { 265 pci_bridge@e,0 {
313 compatible = " 266 compatible = "pci0014,7a09.1",
314 267 "pci0014,7a09",
315 268 "pciclass060400",
316 269 "pciclass0604";
317 270
318 reg = <0x7000 271 reg = <0x7000 0x0 0x0 0x0 0x0>;
319 interrupts = < 272 interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
320 interrupt-pare 273 interrupt-parent = <&pic>;
321 274
322 #interrupt-cel 275 #interrupt-cells = <1>;
323 interrupt-map- 276 interrupt-map-mask = <0 0 0 0>;
324 interrupt-map 277 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
325 }; 278 };
326 279
327 pci_bridge@f,0 { 280 pci_bridge@f,0 {
328 compatible = " 281 compatible = "pci0014,7a29.1",
329 282 "pci0014,7a29",
330 283 "pciclass060400",
331 284 "pciclass0604";
332 285
333 reg = <0x7800 286 reg = <0x7800 0x0 0x0 0x0 0x0>;
334 interrupts = < 287 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
335 interrupt-pare 288 interrupt-parent = <&pic>;
336 289
337 #interrupt-cel 290 #interrupt-cells = <1>;
338 interrupt-map- 291 interrupt-map-mask = <0 0 0 0>;
339 interrupt-map 292 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
340 }; 293 };
341 294
342 pci_bridge@10,0 { 295 pci_bridge@10,0 {
343 compatible = " 296 compatible = "pci0014,7a19.1",
344 297 "pci0014,7a19",
345 298 "pciclass060400",
346 299 "pciclass0604";
347 300
348 reg = <0x8000 301 reg = <0x8000 0x0 0x0 0x0 0x0>;
349 interrupts = < 302 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
350 interrupt-pare 303 interrupt-parent = <&pic>;
351 304
352 #interrupt-cel 305 #interrupt-cells = <1>;
353 interrupt-map- 306 interrupt-map-mask = <0 0 0 0>;
354 interrupt-map 307 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
355 }; 308 };
356 309
357 pci_bridge@11,0 { 310 pci_bridge@11,0 {
358 compatible = " 311 compatible = "pci0014,7a29.1",
359 312 "pci0014,7a29",
360 313 "pciclass060400",
361 314 "pciclass0604";
362 315
363 reg = <0x8800 316 reg = <0x8800 0x0 0x0 0x0 0x0>;
364 interrupts = < 317 interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
365 interrupt-pare 318 interrupt-parent = <&pic>;
366 319
367 #interrupt-cel 320 #interrupt-cells = <1>;
368 interrupt-map- 321 interrupt-map-mask = <0 0 0 0>;
369 interrupt-map 322 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
370 }; 323 };
371 324
372 pci_bridge@12,0 { 325 pci_bridge@12,0 {
373 compatible = " 326 compatible = "pci0014,7a19.1",
374 327 "pci0014,7a19",
375 328 "pciclass060400",
376 329 "pciclass0604";
377 330
378 reg = <0x9000 331 reg = <0x9000 0x0 0x0 0x0 0x0>;
379 interrupts = < 332 interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
380 interrupt-pare 333 interrupt-parent = <&pic>;
381 334
382 #interrupt-cel 335 #interrupt-cells = <1>;
383 interrupt-map- 336 interrupt-map-mask = <0 0 0 0>;
384 interrupt-map 337 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
385 }; 338 };
386 339
387 pci_bridge@13,0 { 340 pci_bridge@13,0 {
388 compatible = " 341 compatible = "pci0014,7a29.1",
389 342 "pci0014,7a29",
390 343 "pciclass060400",
391 344 "pciclass0604";
392 345
393 reg = <0x9800 346 reg = <0x9800 0x0 0x0 0x0 0x0>;
394 interrupts = < 347 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
395 interrupt-pare 348 interrupt-parent = <&pic>;
396 349
397 #interrupt-cel 350 #interrupt-cells = <1>;
398 interrupt-map- 351 interrupt-map-mask = <0 0 0 0>;
399 interrupt-map 352 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
400 }; 353 };
401 354
402 pci_bridge@14,0 { 355 pci_bridge@14,0 {
403 compatible = " 356 compatible = "pci0014,7a19.1",
404 357 "pci0014,7a19",
405 358 "pciclass060400",
406 359 "pciclass0604";
407 360
408 reg = <0xa000 361 reg = <0xa000 0x0 0x0 0x0 0x0>;
409 interrupts = < 362 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
410 interrupt-pare 363 interrupt-parent = <&pic>;
411 364
412 #interrupt-cel 365 #interrupt-cells = <1>;
413 interrupt-map- 366 interrupt-map-mask = <0 0 0 0>;
414 interrupt-map 367 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
415 }; 368 };
416 }; 369 };
417 370
418 isa@18000000 { !! 371 isa {
419 compatible = "isa"; 372 compatible = "isa";
420 #address-cells = <2>; 373 #address-cells = <2>;
421 #size-cells = <1>; 374 #size-cells = <1>;
422 ranges = <1 0 0 0x1800 375 ranges = <1 0 0 0x18000000 0x20000>;
423 }; 376 };
424 }; 377 };
425 }; 378 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.