1 // SPDX-License-Identifier: GPL-2.0 <<
2 /dts-v1/; 1 /dts-v1/;
3 2
4 #include <dt-bindings/interrupt-controller/irq 3 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/mip 4 #include <dt-bindings/interrupt-controller/mips-gic.h>
6 5
7 /memreserve/ 0x00000000 0x00001000; /* YAM 6 /memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
8 /memreserve/ 0x00001000 0x000ef000; /* YAM 7 /memreserve/ 0x00001000 0x000ef000; /* YAMON */
9 /memreserve/ 0x000f0000 0x00010000; /* PII 8 /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
10 9
11 / { 10 / {
12 #address-cells = <1>; 11 #address-cells = <1>;
13 #size-cells = <1>; 12 #size-cells = <1>;
14 compatible = "mti,malta"; 13 compatible = "mti,malta";
15 14
16 cpu_intc: interrupt-controller { 15 cpu_intc: interrupt-controller {
17 compatible = "mti,cpu-interrup 16 compatible = "mti,cpu-interrupt-controller";
18 17
19 interrupt-controller; 18 interrupt-controller;
20 #interrupt-cells = <1>; 19 #interrupt-cells = <1>;
21 }; 20 };
22 21
23 gic: interrupt-controller@1bdc0000 { 22 gic: interrupt-controller@1bdc0000 {
24 compatible = "mti,gic"; 23 compatible = "mti,gic";
25 reg = <0x1bdc0000 0x20000>; 24 reg = <0x1bdc0000 0x20000>;
26 25
27 interrupt-controller; 26 interrupt-controller;
28 #interrupt-cells = <3>; 27 #interrupt-cells = <3>;
29 28
30 /* 29 /*
31 * Declare the interrupt-paren 30 * Declare the interrupt-parent even though the mti,gic
32 * binding doesn't require it, 31 * binding doesn't require it, such that the kernel can
33 * figure out that cpu_intc is 32 * figure out that cpu_intc is the root interrupt
34 * controller & should be prob 33 * controller & should be probed first.
35 */ 34 */
36 interrupt-parent = <&cpu_intc> 35 interrupt-parent = <&cpu_intc>;
37 36
38 timer { 37 timer {
39 compatible = "mti,gic- 38 compatible = "mti,gic-timer";
40 interrupts = <GIC_LOCA 39 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
41 }; 40 };
42 }; 41 };
43 42
44 i8259: interrupt-controller@20 { 43 i8259: interrupt-controller@20 {
45 compatible = "intel,i8259"; 44 compatible = "intel,i8259";
46 45
47 interrupt-controller; 46 interrupt-controller;
48 #interrupt-cells = <1>; 47 #interrupt-cells = <1>;
49 48
50 interrupt-parent = <&gic>; 49 interrupt-parent = <&gic>;
51 interrupts = <GIC_SHARED 3 IRQ 50 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
52 }; 51 };
53 52
54 flash@1e000000 { 53 flash@1e000000 {
55 compatible = "intel,dt28f160", 54 compatible = "intel,dt28f160", "cfi-flash";
56 reg = <0x1e000000 0x400000>; 55 reg = <0x1e000000 0x400000>;
57 bank-width = <4>; 56 bank-width = <4>;
58 #address-cells = <1>; 57 #address-cells = <1>;
59 #size-cells = <1>; 58 #size-cells = <1>;
60 59
61 partitions { 60 partitions {
62 compatible = "fixed-pa 61 compatible = "fixed-partitions";
63 #address-cells = <1>; 62 #address-cells = <1>;
64 #size-cells = <1>; 63 #size-cells = <1>;
65 64
66 yamon@0 { 65 yamon@0 {
67 label = "YAMON 66 label = "YAMON";
68 reg = <0x0 0x1 67 reg = <0x0 0x100000>;
69 read-only; 68 read-only;
70 }; 69 };
71 70
72 user-fs@100000 { 71 user-fs@100000 {
73 label = "User 72 label = "User FS";
74 reg = <0x10000 73 reg = <0x100000 0x2e0000>;
75 }; 74 };
76 75
77 board-config@3e0000 { 76 board-config@3e0000 {
78 label = "Board 77 label = "Board Config";
79 reg = <0x3e000 78 reg = <0x3e0000 0x20000>;
80 read-only; 79 read-only;
81 }; 80 };
82 }; 81 };
83 }; 82 };
84 83
85 fpga_regs: system-controller@1f000000 84 fpga_regs: system-controller@1f000000 {
86 compatible = "mti,malta-fpga", 85 compatible = "mti,malta-fpga", "syscon", "simple-mfd";
87 reg = <0x1f000000 0x1000>; 86 reg = <0x1f000000 0x1000>;
88 native-endian; 87 native-endian;
89 <<
90 lcd@410 { <<
91 compatible = "mti,malt <<
92 offset = <0x410>; <<
93 }; <<
94 88
95 reboot { 89 reboot {
96 compatible = "syscon-r 90 compatible = "syscon-reboot";
97 regmap = <&fpga_regs>; 91 regmap = <&fpga_regs>;
98 offset = <0x500>; 92 offset = <0x500>;
99 mask = <0x42>; 93 mask = <0x42>;
100 }; 94 };
101 }; 95 };
102 96
103 isa { 97 isa {
104 compatible = "isa"; 98 compatible = "isa";
105 #address-cells = <2>; 99 #address-cells = <2>;
106 #size-cells = <1>; 100 #size-cells = <1>;
107 ranges = <1 0 0 0x1000>; 101 ranges = <1 0 0 0x1000>;
108 102
109 rtc@70 { 103 rtc@70 {
110 compatible = "motorola 104 compatible = "motorola,mc146818";
111 reg = <1 0x70 0x8>; 105 reg = <1 0x70 0x8>;
112 106
113 interrupt-parent = <&i 107 interrupt-parent = <&i8259>;
114 interrupts = <8>; 108 interrupts = <8>;
115 }; 109 };
116 }; 110 };
117 }; 111 };
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