1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ath79-clk.h> 2 #include <dt-bindings/clock/ath79-clk.h> 3 3 4 / { 4 / { 5 compatible = "qca,ar9331"; 5 compatible = "qca,ar9331"; 6 6 7 #address-cells = <1>; 7 #address-cells = <1>; 8 #size-cells = <1>; 8 #size-cells = <1>; 9 9 10 cpus { 10 cpus { 11 #address-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 12 #size-cells = <0>; 13 13 14 cpu@0 { 14 cpu@0 { 15 device_type = "cpu"; 15 device_type = "cpu"; 16 compatible = "mips,mip 16 compatible = "mips,mips24Kc"; 17 clocks = <&pll ATH79_C 17 clocks = <&pll ATH79_CLK_CPU>; 18 reg = <0>; 18 reg = <0>; 19 }; 19 }; 20 }; 20 }; 21 21 22 cpuintc: interrupt-controller { 22 cpuintc: interrupt-controller { 23 compatible = "qca,ar7100-cpu-i 23 compatible = "qca,ar7100-cpu-intc"; 24 24 25 interrupt-controller; 25 interrupt-controller; 26 #interrupt-cells = <1>; 26 #interrupt-cells = <1>; 27 27 28 qca,ddr-wb-channel-interrupts 28 qca,ddr-wb-channel-interrupts = <2>, <3>; 29 qca,ddr-wb-channels = <&ddr_ct 29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>; 30 }; 30 }; 31 31 32 ref: ref { 32 ref: ref { 33 compatible = "fixed-clock"; 33 compatible = "fixed-clock"; 34 #clock-cells = <0>; 34 #clock-cells = <0>; 35 }; 35 }; 36 36 37 ahb { 37 ahb { 38 compatible = "simple-bus"; 38 compatible = "simple-bus"; 39 ranges; 39 ranges; 40 40 41 #address-cells = <1>; 41 #address-cells = <1>; 42 #size-cells = <1>; 42 #size-cells = <1>; 43 43 44 interrupt-parent = <&cpuintc>; 44 interrupt-parent = <&cpuintc>; 45 45 46 apb { 46 apb { 47 compatible = "simple-b 47 compatible = "simple-bus"; 48 ranges; 48 ranges; 49 49 50 #address-cells = <1>; 50 #address-cells = <1>; 51 #size-cells = <1>; 51 #size-cells = <1>; 52 52 53 interrupt-parent = <&m 53 interrupt-parent = <&miscintc>; 54 54 55 ddr_ctrl: memory-contr 55 ddr_ctrl: memory-controller@18000000 { 56 compatible = " 56 compatible = "qca,ar7240-ddr-controller"; 57 reg = <0x18000 57 reg = <0x18000000 0x100>; 58 58 59 #qca,ddr-wb-ch 59 #qca,ddr-wb-channel-cells = <1>; 60 }; 60 }; 61 61 62 uart: serial@18020000 !! 62 uart: uart@18020000 { 63 compatible = " 63 compatible = "qca,ar9330-uart"; 64 reg = <0x18020 64 reg = <0x18020000 0x14>; 65 65 66 interrupts = < 66 interrupts = <3>; 67 67 68 clocks = <&ref 68 clocks = <&ref>; 69 clock-names = 69 clock-names = "uart"; 70 70 71 status = "disa 71 status = "disabled"; 72 }; 72 }; 73 73 74 gpio: gpio@18040000 { 74 gpio: gpio@18040000 { 75 compatible = " 75 compatible = "qca,ar7100-gpio"; 76 reg = <0x18040 76 reg = <0x18040000 0x34>; 77 interrupts = < 77 interrupts = <2>; 78 78 79 ngpios = <30>; 79 ngpios = <30>; 80 80 81 gpio-controlle 81 gpio-controller; 82 #gpio-cells = 82 #gpio-cells = <2>; 83 83 84 interrupt-cont 84 interrupt-controller; 85 #interrupt-cel 85 #interrupt-cells = <2>; 86 86 87 status = "disa 87 status = "disabled"; 88 }; 88 }; 89 89 90 pll: pll-controller@18 90 pll: pll-controller@18050000 { 91 compatible = " 91 compatible = "qca,ar9330-pll"; 92 reg = <0x18050 92 reg = <0x18050000 0x100>; 93 93 94 clocks = <&ref 94 clocks = <&ref>; 95 clock-names = 95 clock-names = "ref"; 96 96 97 #clock-cells = 97 #clock-cells = <1>; 98 }; 98 }; 99 99 100 miscintc: interrupt-co 100 miscintc: interrupt-controller@18060010 { 101 compatible = " 101 compatible = "qca,ar7240-misc-intc"; 102 reg = <0x18060 102 reg = <0x18060010 0x8>; 103 103 104 interrupt-pare 104 interrupt-parent = <&cpuintc>; 105 interrupts = < 105 interrupts = <6>; 106 106 107 interrupt-cont 107 interrupt-controller; 108 #interrupt-cel 108 #interrupt-cells = <1>; 109 }; 109 }; 110 110 111 rst: reset-controller@ 111 rst: reset-controller@1806001c { 112 compatible = " 112 compatible = "qca,ar7100-reset"; 113 reg = <0x18060 113 reg = <0x1806001c 0x4>; 114 114 115 #reset-cells = 115 #reset-cells = <1>; 116 }; << 117 }; << 118 << 119 eth0: ethernet@19000000 { << 120 compatible = "qca,ar93 << 121 reg = <0x19000000 0x20 << 122 interrupts = <4>; << 123 << 124 resets = <&rst 9>, <&r << 125 reset-names = "mac", " << 126 clocks = <&pll ATH79_C << 127 clock-names = "eth", " << 128 << 129 phy-mode = "mii"; << 130 phy-handle = <&phy_por << 131 << 132 status = "disabled"; << 133 }; << 134 << 135 eth1: ethernet@1a000000 { << 136 compatible = "qca,ar93 << 137 reg = <0x1a000000 0x20 << 138 interrupts = <5>; << 139 resets = <&rst 13>, <& << 140 reset-names = "mac", " << 141 clocks = <&pll ATH79_C << 142 clock-names = "eth", " << 143 << 144 phy-mode = "gmii"; << 145 << 146 status = "disabled"; << 147 << 148 fixed-link { << 149 speed = <1000> << 150 full-duplex; << 151 pause; << 152 }; << 153 << 154 mdio { << 155 #address-cells << 156 #size-cells = << 157 << 158 switch10: swit << 159 #addre << 160 #size- << 161 << 162 compat << 163 reg = << 164 resets << 165 reset- << 166 << 167 interr << 168 interr << 169 << 170 interr << 171 #inter << 172 << 173 ports << 174 << 175 << 176 << 177 << 178 << 179 << 180 << 181 << 182 << 183 << 184 << 185 << 186 << 187 << 188 << 189 << 190 << 191 << 192 << 193 << 194 << 195 << 196 << 197 << 198 << 199 << 200 << 201 << 202 << 203 << 204 << 205 << 206 << 207 << 208 << 209 << 210 << 211 << 212 << 213 << 214 << 215 << 216 << 217 << 218 << 219 << 220 << 221 }; << 222 << 223 mdio { << 224 << 225 << 226 << 227 << 228 << 229 << 230 << 231 << 232 << 233 << 234 << 235 << 236 << 237 << 238 << 239 << 240 << 241 << 242 << 243 << 244 << 245 << 246 << 247 << 248 << 249 << 250 << 251 << 252 << 253 << 254 << 255 << 256 << 257 << 258 }; << 259 }; << 260 }; 116 }; 261 }; 117 }; 262 118 263 usb: usb@1b000100 { 119 usb: usb@1b000100 { 264 compatible = "chipidea 120 compatible = "chipidea,usb2"; 265 reg = <0x1b000000 0x20 121 reg = <0x1b000000 0x200>; 266 122 267 interrupts = <3>; 123 interrupts = <3>; 268 resets = <&rst 5>; 124 resets = <&rst 5>; 269 125 270 phy-names = "usb-phy"; 126 phy-names = "usb-phy"; 271 phys = <&usb_phy>; 127 phys = <&usb_phy>; 272 128 273 status = "disabled"; 129 status = "disabled"; 274 }; 130 }; 275 131 276 spi: spi@1f000000 { 132 spi: spi@1f000000 { 277 compatible = "qca,ar71 133 compatible = "qca,ar7100-spi"; 278 reg = <0x1f000000 0x10 134 reg = <0x1f000000 0x10>; 279 135 280 clocks = <&pll ATH79_C 136 clocks = <&pll ATH79_CLK_AHB>; 281 clock-names = "ahb"; 137 clock-names = "ahb"; 282 138 283 #address-cells = <1>; 139 #address-cells = <1>; 284 #size-cells = <0>; 140 #size-cells = <0>; 285 141 286 status = "disabled"; 142 status = "disabled"; 287 }; 143 }; 288 }; 144 }; 289 145 290 usb_phy: usb-phy { 146 usb_phy: usb-phy { 291 compatible = "qca,ar7100-usb-p 147 compatible = "qca,ar7100-usb-phy"; 292 148 293 reset-names = "phy", "suspend- 149 reset-names = "phy", "suspend-override"; 294 resets = <&rst 4>, <&rst 3>; 150 resets = <&rst 4>, <&rst 3>; 295 151 296 #phy-cells = <0>; 152 #phy-cells = <0>; 297 153 298 status = "disabled"; 154 status = "disabled"; 299 }; 155 }; 300 }; 156 };
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