1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
3
4 / {
5 compatible = "qca,ar9331";
6
7 #address-cells = <1>;
8 #size-cells = <1>;
9
10 cpus {
11 #address-cells = <1>;
12 #size-cells = <0>;
13
14 cpu@0 {
15 device_type = "cpu";
16 compatible = "mips,mip
17 clocks = <&pll ATH79_C
18 reg = <0>;
19 };
20 };
21
22 cpuintc: interrupt-controller {
23 compatible = "qca,ar7100-cpu-i
24
25 interrupt-controller;
26 #interrupt-cells = <1>;
27
28 qca,ddr-wb-channel-interrupts
29 qca,ddr-wb-channels = <&ddr_ct
30 };
31
32 ref: ref {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
35 };
36
37 ahb {
38 compatible = "simple-bus";
39 ranges;
40
41 #address-cells = <1>;
42 #size-cells = <1>;
43
44 interrupt-parent = <&cpuintc>;
45
46 apb {
47 compatible = "simple-b
48 ranges;
49
50 #address-cells = <1>;
51 #size-cells = <1>;
52
53 interrupt-parent = <&m
54
55 ddr_ctrl: memory-contr
56 compatible = "
57 reg = <0x18000
58
59 #qca,ddr-wb-ch
60 };
61
62 uart: serial@18020000
63 compatible = "
64 reg = <0x18020
65
66 interrupts = <
67
68 clocks = <&ref
69 clock-names =
70
71 status = "disa
72 };
73
74 gpio: gpio@18040000 {
75 compatible = "
76 reg = <0x18040
77 interrupts = <
78
79 ngpios = <30>;
80
81 gpio-controlle
82 #gpio-cells =
83
84 interrupt-cont
85 #interrupt-cel
86
87 status = "disa
88 };
89
90 pll: pll-controller@18
91 compatible = "
92 reg = <0x18050
93
94 clocks = <&ref
95 clock-names =
96
97 #clock-cells =
98 };
99
100 miscintc: interrupt-co
101 compatible = "
102 reg = <0x18060
103
104 interrupt-pare
105 interrupts = <
106
107 interrupt-cont
108 #interrupt-cel
109 };
110
111 rst: reset-controller@
112 compatible = "
113 reg = <0x18060
114
115 #reset-cells =
116 };
117 };
118
119 eth0: ethernet@19000000 {
120 compatible = "qca,ar93
121 reg = <0x19000000 0x20
122 interrupts = <4>;
123
124 resets = <&rst 9>, <&r
125 reset-names = "mac", "
126 clocks = <&pll ATH79_C
127 clock-names = "eth", "
128
129 phy-mode = "mii";
130 phy-handle = <&phy_por
131
132 status = "disabled";
133 };
134
135 eth1: ethernet@1a000000 {
136 compatible = "qca,ar93
137 reg = <0x1a000000 0x20
138 interrupts = <5>;
139 resets = <&rst 13>, <&
140 reset-names = "mac", "
141 clocks = <&pll ATH79_C
142 clock-names = "eth", "
143
144 phy-mode = "gmii";
145
146 status = "disabled";
147
148 fixed-link {
149 speed = <1000>
150 full-duplex;
151 pause;
152 };
153
154 mdio {
155 #address-cells
156 #size-cells =
157
158 switch10: swit
159 #addre
160 #size-
161
162 compat
163 reg =
164 resets
165 reset-
166
167 interr
168 interr
169
170 interr
171 #inter
172
173 ports
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221 };
222
223 mdio {
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258 };
259 };
260 };
261 };
262
263 usb: usb@1b000100 {
264 compatible = "chipidea
265 reg = <0x1b000000 0x20
266
267 interrupts = <3>;
268 resets = <&rst 5>;
269
270 phy-names = "usb-phy";
271 phys = <&usb_phy>;
272
273 status = "disabled";
274 };
275
276 spi: spi@1f000000 {
277 compatible = "qca,ar71
278 reg = <0x1f000000 0x10
279
280 clocks = <&pll ATH79_C
281 clock-names = "ahb";
282
283 #address-cells = <1>;
284 #size-cells = <0>;
285
286 status = "disabled";
287 };
288 };
289
290 usb_phy: usb-phy {
291 compatible = "qca,ar7100-usb-p
292
293 reset-names = "phy", "suspend-
294 resets = <&rst 4>, <&rst 3>;
295
296 #phy-cells = <0>;
297
298 status = "disabled";
299 };
300 };
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