1 // SPDX-License-Identifier: GPL-2.0 << 2 << 3 / { 1 / { 4 #address-cells = <1>; 2 #address-cells = <1>; 5 #size-cells = <1>; 3 #size-cells = <1>; 6 compatible = "ralink,mt7628a-soc"; 4 compatible = "ralink,mt7628a-soc"; 7 5 8 cpus { 6 cpus { 9 #address-cells = <1>; 7 #address-cells = <1>; 10 #size-cells = <0>; 8 #size-cells = <0>; 11 9 12 cpu@0 { 10 cpu@0 { 13 compatible = "mti,mips 11 compatible = "mti,mips24KEc"; 14 device_type = "cpu"; 12 device_type = "cpu"; 15 reg = <0>; 13 reg = <0>; 16 }; 14 }; 17 }; 15 }; 18 16 19 resetc: reset-controller { 17 resetc: reset-controller { 20 compatible = "ralink,rt2880-re 18 compatible = "ralink,rt2880-reset"; 21 #reset-cells = <1>; 19 #reset-cells = <1>; 22 }; 20 }; 23 21 24 cpuintc: interrupt-controller { 22 cpuintc: interrupt-controller { 25 #address-cells = <0>; 23 #address-cells = <0>; 26 #interrupt-cells = <1>; 24 #interrupt-cells = <1>; 27 interrupt-controller; 25 interrupt-controller; 28 compatible = "mti,cpu-interrup 26 compatible = "mti,cpu-interrupt-controller"; 29 }; 27 }; 30 28 31 palmbus@10000000 { 29 palmbus@10000000 { 32 compatible = "palmbus"; 30 compatible = "palmbus"; 33 reg = <0x10000000 0x200000>; 31 reg = <0x10000000 0x200000>; 34 ranges = <0x0 0x10000000 0x1FF 32 ranges = <0x0 0x10000000 0x1FFFFF>; 35 33 36 #address-cells = <1>; 34 #address-cells = <1>; 37 #size-cells = <1>; 35 #size-cells = <1>; 38 36 39 sysc: system-controller@0 { 37 sysc: system-controller@0 { 40 compatible = "ralink,m 38 compatible = "ralink,mt7620a-sysc", "syscon"; 41 reg = <0x0 0x60>; !! 39 reg = <0x0 0x100>; 42 }; << 43 << 44 pinmux: pinmux@60 { << 45 compatible = "pinctrl- << 46 reg = <0x60 0x8>; << 47 #address-cells = <1>; << 48 #size-cells = <0>; << 49 #pinctrl-cells = <2>; << 50 pinctrl-single,bit-per << 51 pinctrl-single,registe << 52 pinctrl-single,functio << 53 << 54 pinmux_gpio_gpio: gpio << 55 pinctrl-single << 56 }; << 57 << 58 pinmux_spi_cs1_cs: spi << 59 pinctrl-single << 60 }; << 61 << 62 pinmux_i2s_gpio: i2s-g << 63 pinctrl-single << 64 }; << 65 << 66 pinmux_uart0_uart: uar << 67 pinctrl-single << 68 }; << 69 << 70 pinmux_sdmode_sdxc: sd << 71 pinctrl-single << 72 }; << 73 << 74 pinmux_sdmode_gpio: sd << 75 pinctrl-single << 76 }; << 77 << 78 pinmux_spi_spi: spi-sp << 79 pinctrl-single << 80 }; << 81 << 82 pinmux_refclk_gpio: re << 83 pinctrl-single << 84 }; << 85 << 86 pinmux_i2c_i2c: i2c-i2 << 87 pinctrl-single << 88 }; << 89 << 90 pinmux_uart1_uart: uar << 91 pinctrl-single << 92 }; << 93 << 94 pinmux_uart2_uart: uar << 95 pinctrl-single << 96 }; << 97 << 98 pinmux_pwm0_pwm: pwm0- << 99 pinctrl-single << 100 }; << 101 << 102 pinmux_pwm0_gpio: pwm0 << 103 pinctrl-single << 104 << 105 }; << 106 << 107 pinmux_pwm1_pwm: pwm1- << 108 pinctrl-single << 109 }; << 110 << 111 pinmux_pwm1_gpio: pwm1 << 112 pinctrl-single << 113 << 114 }; << 115 << 116 pinmux_p0led_an_gpio: << 117 pinctrl-single << 118 }; << 119 << 120 pinmux_p1led_an_gpio: << 121 pinctrl-single << 122 }; << 123 << 124 pinmux_p2led_an_gpio: << 125 pinctrl-single << 126 }; << 127 << 128 pinmux_p3led_an_gpio: << 129 pinctrl-single << 130 }; << 131 << 132 pinmux_p4led_an_gpio: << 133 pinctrl-single << 134 }; << 135 }; << 136 << 137 watchdog: watchdog@100 { << 138 compatible = "mediatek << 139 reg = <0x100 0x30>; << 140 << 141 resets = <&resetc 8>; << 142 reset-names = "wdt"; << 143 << 144 interrupt-parent = <&i << 145 interrupts = <24>; << 146 << 147 status = "disabled"; << 148 }; 40 }; 149 41 150 intc: interrupt-controller@200 42 intc: interrupt-controller@200 { 151 compatible = "ralink,r 43 compatible = "ralink,rt2880-intc"; 152 reg = <0x200 0x100>; 44 reg = <0x200 0x100>; 153 45 154 interrupt-controller; 46 interrupt-controller; 155 #interrupt-cells = <1> 47 #interrupt-cells = <1>; 156 48 157 resets = <&resetc 9>; 49 resets = <&resetc 9>; 158 reset-names = "intc"; 50 reset-names = "intc"; 159 51 160 interrupt-parent = <&c 52 interrupt-parent = <&cpuintc>; 161 interrupts = <2>; 53 interrupts = <2>; 162 54 163 ralink,intc-registers 55 ralink,intc-registers = <0x9c 0xa0 164 56 0x6c 0xa4 165 57 0x80 0x78>; 166 }; 58 }; 167 59 168 memory-controller@300 { 60 memory-controller@300 { 169 compatible = "ralink,m 61 compatible = "ralink,mt7620a-memc"; 170 reg = <0x300 0x100>; 62 reg = <0x300 0x100>; 171 }; 63 }; 172 64 173 gpio: gpio@600 { << 174 compatible = "mediatek << 175 reg = <0x600 0x100>; << 176 << 177 gpio-controller; << 178 interrupt-controller; << 179 #gpio-cells = <2>; << 180 #interrupt-cells = <2> << 181 << 182 interrupt-parent = <&i << 183 interrupts = <6>; << 184 }; << 185 << 186 spi: spi@b00 { << 187 compatible = "ralink,m << 188 reg = <0xb00 0x100>; << 189 << 190 pinctrl-names = "defau << 191 pinctrl-0 = <&pinmux_s << 192 << 193 resets = <&resetc 18>; << 194 reset-names = "spi"; << 195 << 196 #address-cells = <1>; << 197 #size-cells = <0>; << 198 << 199 status = "disabled"; << 200 }; << 201 << 202 i2c: i2c@900 { << 203 compatible = "mediatek << 204 reg = <0x900 0x100>; << 205 << 206 pinctrl-names = "defau << 207 pinctrl-0 = <&pinmux_i << 208 << 209 resets = <&resetc 16>; << 210 reset-names = "i2c"; << 211 << 212 #address-cells = <1>; << 213 #size-cells = <0>; << 214 << 215 status = "disabled"; << 216 }; << 217 << 218 uart0: uartlite@c00 { 65 uart0: uartlite@c00 { 219 compatible = "ns16550a 66 compatible = "ns16550a"; 220 reg = <0xc00 0x100>; 67 reg = <0xc00 0x100>; 221 68 222 pinctrl-names = "defau << 223 pinctrl-0 = <&pinmux_u << 224 << 225 resets = <&resetc 12>; 69 resets = <&resetc 12>; 226 reset-names = "uart0"; 70 reset-names = "uart0"; 227 71 228 interrupt-parent = <&i 72 interrupt-parent = <&intc>; 229 interrupts = <20>; 73 interrupts = <20>; 230 74 231 reg-shift = <2>; 75 reg-shift = <2>; 232 }; 76 }; 233 77 234 uart1: uart1@d00 { 78 uart1: uart1@d00 { 235 compatible = "ns16550a 79 compatible = "ns16550a"; 236 reg = <0xd00 0x100>; 80 reg = <0xd00 0x100>; 237 81 238 pinctrl-names = "defau << 239 pinctrl-0 = <&pinmux_u << 240 << 241 resets = <&resetc 19>; 82 resets = <&resetc 19>; 242 reset-names = "uart1"; 83 reset-names = "uart1"; 243 84 244 interrupt-parent = <&i 85 interrupt-parent = <&intc>; 245 interrupts = <21>; 86 interrupts = <21>; 246 87 247 reg-shift = <2>; 88 reg-shift = <2>; 248 }; 89 }; 249 90 250 uart2: uart2@e00 { 91 uart2: uart2@e00 { 251 compatible = "ns16550a 92 compatible = "ns16550a"; 252 reg = <0xe00 0x100>; 93 reg = <0xe00 0x100>; 253 94 254 pinctrl-names = "defau << 255 pinctrl-0 = <&pinmux_u << 256 << 257 resets = <&resetc 20>; 95 resets = <&resetc 20>; 258 reset-names = "uart2"; 96 reset-names = "uart2"; 259 97 260 interrupt-parent = <&i 98 interrupt-parent = <&intc>; 261 interrupts = <22>; 99 interrupts = <22>; 262 100 263 reg-shift = <2>; 101 reg-shift = <2>; 264 }; 102 }; 265 }; 103 }; 266 104 267 usb_phy: usb-phy@10120000 { 105 usb_phy: usb-phy@10120000 { 268 compatible = "mediatek,mt7628- 106 compatible = "mediatek,mt7628-usbphy"; 269 reg = <0x10120000 0x1000>; 107 reg = <0x10120000 0x1000>; 270 108 271 #phy-cells = <0>; 109 #phy-cells = <0>; 272 110 273 ralink,sysctl = <&sysc>; 111 ralink,sysctl = <&sysc>; 274 resets = <&resetc 22 &resetc 2 112 resets = <&resetc 22 &resetc 25>; 275 reset-names = "host", "device" 113 reset-names = "host", "device"; 276 }; 114 }; 277 115 278 usb@101c0000 { !! 116 ehci@101c0000 { 279 compatible = "generic-ehci"; 117 compatible = "generic-ehci"; 280 reg = <0x101c0000 0x1000>; 118 reg = <0x101c0000 0x1000>; 281 119 282 phys = <&usb_phy>; 120 phys = <&usb_phy>; 283 phy-names = "usb"; 121 phy-names = "usb"; 284 122 285 interrupt-parent = <&intc>; 123 interrupt-parent = <&intc>; 286 interrupts = <18>; 124 interrupts = <18>; 287 }; << 288 << 289 wmac: wmac@10300000 { << 290 compatible = "mediatek,mt7628- << 291 reg = <0x10300000 0x100000>; << 292 << 293 interrupt-parent = <&cpuintc>; << 294 interrupts = <6>; << 295 << 296 status = "disabled"; << 297 }; 125 }; 298 }; 126 };
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