1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 / { 2 / {
3 #address-cells = <1>; 3 #address-cells = <1>;
4 #size-cells = <1>; 4 #size-cells = <1>;
5 compatible = "ralink,rt3883-soc"; 5 compatible = "ralink,rt3883-soc";
6 6
7 cpus { 7 cpus {
8 cpu@0 { 8 cpu@0 {
9 compatible = "mips,mip 9 compatible = "mips,mips74Kc";
10 }; 10 };
11 }; 11 };
12 12
13 cpuintc: cpuintc { 13 cpuintc: cpuintc {
14 #address-cells = <0>; 14 #address-cells = <0>;
15 #interrupt-cells = <1>; 15 #interrupt-cells = <1>;
16 interrupt-controller; 16 interrupt-controller;
17 compatible = "mti,cpu-interrup 17 compatible = "mti,cpu-interrupt-controller";
18 }; 18 };
19 19
20 palmbus@10000000 { 20 palmbus@10000000 {
21 compatible = "palmbus"; 21 compatible = "palmbus";
22 reg = <0x10000000 0x200000>; 22 reg = <0x10000000 0x200000>;
23 ranges = <0x0 0x10000000 0x1FF 23 ranges = <0x0 0x10000000 0x1FFFFF>;
24 24
25 #address-cells = <1>; 25 #address-cells = <1>;
26 #size-cells = <1>; 26 #size-cells = <1>;
27 27
28 sysc@0 { 28 sysc@0 {
29 compatible = "ralink,r 29 compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
30 reg = <0x0 0x100>; 30 reg = <0x0 0x100>;
31 }; 31 };
32 32
33 intc: intc@200 { 33 intc: intc@200 {
34 compatible = "ralink,r 34 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
35 reg = <0x200 0x100>; 35 reg = <0x200 0x100>;
36 36
37 interrupt-controller; 37 interrupt-controller;
38 #interrupt-cells = <1> 38 #interrupt-cells = <1>;
39 39
40 interrupt-parent = <&c 40 interrupt-parent = <&cpuintc>;
41 interrupts = <2>; 41 interrupts = <2>;
42 }; 42 };
43 43
44 memc@300 { 44 memc@300 {
45 compatible = "ralink,r 45 compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
46 reg = <0x300 0x100>; 46 reg = <0x300 0x100>;
47 }; 47 };
48 48
49 uartlite@c00 { 49 uartlite@c00 {
50 compatible = "ralink,r 50 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
51 reg = <0xc00 0x100>; 51 reg = <0xc00 0x100>;
52 52
53 interrupt-parent = <&i 53 interrupt-parent = <&intc>;
54 interrupts = <12>; 54 interrupts = <12>;
55 55
56 reg-shift = <2>; 56 reg-shift = <2>;
57 }; 57 };
58 }; 58 };
59 }; 59 };
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