1 /* 1 /*
2 * Device Tree Source for AMCC Bamboo 2 * Device Tree Source for AMCC Bamboo
3 * 3 *
4 * Copyright (c) 2006, 2007 IBM Corp. 4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com> 5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
6 * 6 *
7 * FIXME: Draft only! 7 * FIXME: Draft only!
8 * 8 *
9 * This file is licensed under the terms of th 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is license 10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express o 11 * any warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14 /dts-v1/; 14 /dts-v1/;
15 15
16 / { 16 / {
17 #address-cells = <2>; 17 #address-cells = <2>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 model = "amcc,bamboo"; 19 model = "amcc,bamboo";
20 compatible = "amcc,bamboo"; 20 compatible = "amcc,bamboo";
21 dcr-parent = <&{/cpus/cpu@0}>; 21 dcr-parent = <&{/cpus/cpu@0}>;
22 22
23 aliases { 23 aliases {
24 ethernet0 = &EMAC0; 24 ethernet0 = &EMAC0;
25 ethernet1 = &EMAC1; 25 ethernet1 = &EMAC1;
26 serial0 = &UART0; 26 serial0 = &UART0;
27 serial1 = &UART1; 27 serial1 = &UART1;
28 serial2 = &UART2; 28 serial2 = &UART2;
29 serial3 = &UART3; 29 serial3 = &UART3;
30 }; 30 };
31 31
32 cpus { 32 cpus {
33 #address-cells = <1>; 33 #address-cells = <1>;
34 #size-cells = <0>; 34 #size-cells = <0>;
35 35
36 cpu@0 { 36 cpu@0 {
37 device_type = "cpu"; 37 device_type = "cpu";
38 model = "PowerPC,440EP 38 model = "PowerPC,440EP";
39 reg = <0x00000000>; 39 reg = <0x00000000>;
40 clock-frequency = <0>; 40 clock-frequency = <0>; /* Filled in by zImage */
41 timebase-frequency = < 41 timebase-frequency = <0>; /* Filled in by zImage */
42 i-cache-line-size = <3 42 i-cache-line-size = <32>;
43 d-cache-line-size = <3 43 d-cache-line-size = <32>;
44 i-cache-size = <32768> 44 i-cache-size = <32768>;
45 d-cache-size = <32768> 45 d-cache-size = <32768>;
46 dcr-controller; 46 dcr-controller;
47 dcr-access-method = "n 47 dcr-access-method = "native";
48 }; 48 };
49 }; 49 };
50 50
51 memory { 51 memory {
52 device_type = "memory"; 52 device_type = "memory";
53 reg = <0x00000000 0x00000000 0 53 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
54 }; 54 };
55 55
56 UIC0: interrupt-controller0 { 56 UIC0: interrupt-controller0 {
57 compatible = "ibm,uic-440ep"," 57 compatible = "ibm,uic-440ep","ibm,uic";
58 interrupt-controller; 58 interrupt-controller;
59 cell-index = <0>; 59 cell-index = <0>;
60 dcr-reg = <0x0c0 0x009>; 60 dcr-reg = <0x0c0 0x009>;
61 #address-cells = <0>; 61 #address-cells = <0>;
62 #size-cells = <0>; 62 #size-cells = <0>;
63 #interrupt-cells = <2>; 63 #interrupt-cells = <2>;
64 }; 64 };
65 65
66 UIC1: interrupt-controller1 { 66 UIC1: interrupt-controller1 {
67 compatible = "ibm,uic-440ep"," 67 compatible = "ibm,uic-440ep","ibm,uic";
68 interrupt-controller; 68 interrupt-controller;
69 cell-index = <1>; 69 cell-index = <1>;
70 dcr-reg = <0x0d0 0x009>; 70 dcr-reg = <0x0d0 0x009>;
71 #address-cells = <0>; 71 #address-cells = <0>;
72 #size-cells = <0>; 72 #size-cells = <0>;
73 #interrupt-cells = <2>; 73 #interrupt-cells = <2>;
74 interrupts = <0x1e 0x4 0x1f 0x 74 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
75 interrupt-parent = <&UIC0>; 75 interrupt-parent = <&UIC0>;
76 }; 76 };
77 77
78 SDR0: sdr { 78 SDR0: sdr {
79 compatible = "ibm,sdr-440ep"; 79 compatible = "ibm,sdr-440ep";
80 dcr-reg = <0x00e 0x002>; 80 dcr-reg = <0x00e 0x002>;
81 }; 81 };
82 82
83 CPR0: cpr { 83 CPR0: cpr {
84 compatible = "ibm,cpr-440ep"; 84 compatible = "ibm,cpr-440ep";
85 dcr-reg = <0x00c 0x002>; 85 dcr-reg = <0x00c 0x002>;
86 }; 86 };
87 87
88 plb { 88 plb {
89 compatible = "ibm,plb-440ep", 89 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
90 #address-cells = <2>; 90 #address-cells = <2>;
91 #size-cells = <1>; 91 #size-cells = <1>;
92 ranges; 92 ranges;
93 clock-frequency = <0>; /* Fill 93 clock-frequency = <0>; /* Filled in by zImage */
94 94
95 SDRAM0: sdram { 95 SDRAM0: sdram {
96 compatible = "ibm,sdra 96 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
97 dcr-reg = <0x010 0x002 97 dcr-reg = <0x010 0x002>;
98 }; 98 };
99 99
100 DMA0: dma { 100 DMA0: dma {
101 compatible = "ibm,dma- 101 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
102 dcr-reg = <0x100 0x027 102 dcr-reg = <0x100 0x027>;
103 }; 103 };
104 104
105 MAL0: mcmal { 105 MAL0: mcmal {
106 compatible = "ibm,mcma 106 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
107 dcr-reg = <0x180 0x062 107 dcr-reg = <0x180 0x062>;
108 num-tx-chans = <4>; 108 num-tx-chans = <4>;
109 num-rx-chans = <2>; 109 num-rx-chans = <2>;
110 interrupt-parent = <&M 110 interrupt-parent = <&MAL0>;
111 interrupts = <0x0 0x1 111 interrupts = <0x0 0x1 0x2 0x3 0x4>;
112 #interrupt-cells = <1> 112 #interrupt-cells = <1>;
113 #address-cells = <0>; 113 #address-cells = <0>;
114 #size-cells = <0>; 114 #size-cells = <0>;
115 interrupt-map = </*TXE 115 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
116 /*RXEO 116 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
117 /*SERR 117 /*SERR*/ 0x2 &UIC1 0x0 0x4
118 /*TXDE 118 /*TXDE*/ 0x3 &UIC1 0x1 0x4
119 /*RXDE 119 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
120 }; 120 };
121 121
122 POB0: opb { 122 POB0: opb {
123 compatible = "ibm,opb- 123 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
124 #address-cells = <1>; 124 #address-cells = <1>;
125 #size-cells = <1>; 125 #size-cells = <1>;
126 /* Bamboo is oddball i 126 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
127 * bits. 127 * bits.
128 */ 128 */
129 ranges = <0x00000000 0 129 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
130 0x80000000 0 130 0x80000000 0x00000000 0x80000000 0x80000000>;
131 interrupt-parent = <&U 131 interrupt-parent = <&UIC1>;
132 interrupts = <0x7 0x4> 132 interrupts = <0x7 0x4>;
133 clock-frequency = <0>; 133 clock-frequency = <0>; /* Filled in by zImage */
134 134
135 EBC0: ebc { 135 EBC0: ebc {
136 compatible = " 136 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
137 dcr-reg = <0x0 137 dcr-reg = <0x012 0x002>;
138 #address-cells 138 #address-cells = <2>;
139 #size-cells = 139 #size-cells = <1>;
140 clock-frequenc 140 clock-frequency = <0>; /* Filled in by zImage */
141 interrupts = < 141 interrupts = <0x5 0x1>;
142 interrupt-pare 142 interrupt-parent = <&UIC1>;
143 }; 143 };
144 144
145 UART0: serial@ef600300 145 UART0: serial@ef600300 {
146 device_type = 146 device_type = "serial";
147 compatible = " 147 compatible = "ns16550";
148 reg = <0xef600 148 reg = <0xef600300 0x00000008>;
149 virtual-reg = 149 virtual-reg = <0xef600300>;
150 clock-frequenc 150 clock-frequency = <0>; /* Filled in by zImage */
151 current-speed 151 current-speed = <115200>;
152 interrupt-pare 152 interrupt-parent = <&UIC0>;
153 interrupts = < 153 interrupts = <0x0 0x4>;
154 }; 154 };
155 155
156 UART1: serial@ef600400 156 UART1: serial@ef600400 {
157 device_type = 157 device_type = "serial";
158 compatible = " 158 compatible = "ns16550";
159 reg = <0xef600 159 reg = <0xef600400 0x00000008>;
160 virtual-reg = 160 virtual-reg = <0xef600400>;
161 clock-frequenc 161 clock-frequency = <0>;
162 current-speed 162 current-speed = <0>;
163 interrupt-pare 163 interrupt-parent = <&UIC0>;
164 interrupts = < 164 interrupts = <0x1 0x4>;
165 }; 165 };
166 166
167 UART2: serial@ef600500 167 UART2: serial@ef600500 {
168 device_type = 168 device_type = "serial";
169 compatible = " 169 compatible = "ns16550";
170 reg = <0xef600 170 reg = <0xef600500 0x00000008>;
171 virtual-reg = 171 virtual-reg = <0xef600500>;
172 clock-frequenc 172 clock-frequency = <0>;
173 current-speed 173 current-speed = <0>;
174 interrupt-pare 174 interrupt-parent = <&UIC0>;
175 interrupts = < 175 interrupts = <0x3 0x4>;
176 }; 176 };
177 177
178 UART3: serial@ef600600 178 UART3: serial@ef600600 {
179 device_type = 179 device_type = "serial";
180 compatible = " 180 compatible = "ns16550";
181 reg = <0xef600 181 reg = <0xef600600 0x00000008>;
182 virtual-reg = 182 virtual-reg = <0xef600600>;
183 clock-frequenc 183 clock-frequency = <0>;
184 current-speed 184 current-speed = <0>;
185 interrupt-pare 185 interrupt-parent = <&UIC0>;
186 interrupts = < 186 interrupts = <0x4 0x4>;
187 }; 187 };
188 188
189 IIC0: i2c@ef600700 { 189 IIC0: i2c@ef600700 {
190 compatible = " 190 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
191 reg = <0xef600 191 reg = <0xef600700 0x00000014>;
192 interrupt-pare 192 interrupt-parent = <&UIC0>;
193 interrupts = < 193 interrupts = <0x2 0x4>;
194 }; 194 };
195 195
196 IIC1: i2c@ef600800 { 196 IIC1: i2c@ef600800 {
197 compatible = " 197 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
198 reg = <0xef600 198 reg = <0xef600800 0x00000014>;
199 interrupt-pare 199 interrupt-parent = <&UIC0>;
200 interrupts = < 200 interrupts = <0x7 0x4>;
201 }; 201 };
202 202
203 ZMII0: emac-zmii@ef600 203 ZMII0: emac-zmii@ef600d00 {
204 compatible = " 204 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
205 reg = <0xef600 205 reg = <0xef600d00 0x0000000c>;
206 }; 206 };
207 207
208 EMAC0: ethernet@ef600e 208 EMAC0: ethernet@ef600e00 {
209 device_type = 209 device_type = "network";
210 compatible = " 210 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
211 interrupt-pare 211 interrupt-parent = <&UIC1>;
212 interrupts = < 212 interrupts = <0x1c 0x4 0x1d 0x4>;
213 reg = <0xef600 213 reg = <0xef600e00 0x00000070>;
214 local-mac-addr 214 local-mac-address = [000000000000];
215 mal-device = < 215 mal-device = <&MAL0>;
216 mal-tx-channel 216 mal-tx-channel = <0 1>;
217 mal-rx-channel 217 mal-rx-channel = <0>;
218 cell-index = < 218 cell-index = <0>;
219 max-frame-size 219 max-frame-size = <1500>;
220 rx-fifo-size = 220 rx-fifo-size = <4096>;
221 tx-fifo-size = 221 tx-fifo-size = <2048>;
222 phy-mode = "rm 222 phy-mode = "rmii";
223 phy-map = <0x0 223 phy-map = <0x00000000>;
224 zmii-device = 224 zmii-device = <&ZMII0>;
225 zmii-channel = 225 zmii-channel = <0>;
226 }; 226 };
227 227
228 EMAC1: ethernet@ef600f 228 EMAC1: ethernet@ef600f00 {
229 device_type = 229 device_type = "network";
230 compatible = " 230 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
231 interrupt-pare 231 interrupt-parent = <&UIC1>;
232 interrupts = < 232 interrupts = <0x1e 0x4 0x1f 0x4>;
233 reg = <0xef600 233 reg = <0xef600f00 0x00000070>;
234 local-mac-addr 234 local-mac-address = [000000000000];
235 mal-device = < 235 mal-device = <&MAL0>;
236 mal-tx-channel 236 mal-tx-channel = <2 3>;
237 mal-rx-channel 237 mal-rx-channel = <1>;
238 cell-index = < 238 cell-index = <1>;
239 max-frame-size 239 max-frame-size = <1500>;
240 rx-fifo-size = 240 rx-fifo-size = <4096>;
241 tx-fifo-size = 241 tx-fifo-size = <2048>;
242 phy-mode = "rm 242 phy-mode = "rmii";
243 phy-map = <0x0 243 phy-map = <0x00000000>;
244 zmii-device = 244 zmii-device = <&ZMII0>;
245 zmii-channel = 245 zmii-channel = <1>;
246 }; 246 };
247 247
248 usb@ef601000 { 248 usb@ef601000 {
249 compatible = " 249 compatible = "ohci-be";
250 reg = <0xef601 250 reg = <0xef601000 0x00000080>;
251 interrupts = < 251 interrupts = <0x8 0x1 0x9 0x1>;
252 interrupt-pare 252 interrupt-parent = < &UIC1 >;
253 }; 253 };
254 }; 254 };
255 255
256 PCI0: pci@ec000000 { 256 PCI0: pci@ec000000 {
257 device_type = "pci"; 257 device_type = "pci";
258 #interrupt-cells = <1> 258 #interrupt-cells = <1>;
259 #size-cells = <2>; 259 #size-cells = <2>;
260 #address-cells = <3>; 260 #address-cells = <3>;
261 compatible = "ibm,plb4 261 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
262 primary; 262 primary;
263 reg = <0x00000000 0xee 263 reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
264 0x00000000 0xee 264 0x00000000 0xeed00000 0x00000004 /* IACK */
265 0x00000000 0xee 265 0x00000000 0xeed00000 0x00000004 /* Special cycle */
266 0x00000000 0xef 266 0x00000000 0xef400000 0x00000040>; /* Internal registers */
267 267
268 /* Outbound ranges, on 268 /* Outbound ranges, one memory and one IO,
269 * later cannot be cha 269 * later cannot be changed. Chip supports a second
270 * IO range but we don 270 * IO range but we don't use it for now
271 * The chip also suppo 271 * The chip also supports a larger memory range but
272 * it's not naturally 272 * it's not naturally aligned, so our code will break
273 */ 273 */
274 ranges = <0x02000000 0 274 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
275 0x02000000 0 275 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000
276 0x01000000 0 276 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
277 277
278 /* Inbound 2GB range s 278 /* Inbound 2GB range starting at 0 */
279 dma-ranges = <0x420000 279 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
280 280
281 /* Bamboo has all 4 IR 281 /* Bamboo has all 4 IRQ pins tied together per slot */
282 interrupt-map-mask = < 282 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
283 interrupt-map = < 283 interrupt-map = <
284 /* IDSEL 1 */ 284 /* IDSEL 1 */
285 0x800 0x0 0x0 285 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
286 286
287 /* IDSEL 2 */ 287 /* IDSEL 2 */
288 0x1000 0x0 0x0 288 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8
289 289
290 /* IDSEL 3 */ 290 /* IDSEL 3 */
291 0x1800 0x0 0x0 291 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8
292 292
293 /* IDSEL 4 */ 293 /* IDSEL 4 */
294 0x2000 0x0 0x0 294 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
295 >; 295 >;
296 }; 296 };
297 }; 297 };
298 298
299 chosen { 299 chosen {
300 stdout-path = "/plb/opb/serial 300 stdout-path = "/plb/opb/serial@ef600300";
301 }; 301 };
302 }; 302 };
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