1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Keymile kmcent2 Device Tree Source, based o 2 * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
4 * 3 *
5 * (C) Copyright 2016 4 * (C) Copyright 2016
6 * Valentin Longchamp, Keymile AG, valentin.lo 5 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
7 * 6 *
8 * Copyright 2014 - 2015 Freescale Semiconduct 7 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
>> 8 *
>> 9 * This program is free software; you can redistribute it and/or modify it
>> 10 * under the terms of the GNU General Public License as published by the
>> 11 * Free Software Foundation; either version 2 of the License, or (at your
>> 12 * option) any later version.
9 */ 13 */
10 14
11 /include/ "t104xsi-pre.dtsi" 15 /include/ "t104xsi-pre.dtsi"
12 16
13 / { 17 / {
14 model = "keymile,kmcent2"; 18 model = "keymile,kmcent2";
15 compatible = "keymile,kmcent2"; 19 compatible = "keymile,kmcent2";
16 20
17 aliases { 21 aliases {
18 front_phy = &front_phy; 22 front_phy = &front_phy;
19 }; 23 };
20 24
21 reserved-memory { 25 reserved-memory {
22 #address-cells = <2>; 26 #address-cells = <2>;
23 #size-cells = <2>; 27 #size-cells = <2>;
24 ranges; 28 ranges;
25 29
26 bman_fbpr: bman-fbpr { 30 bman_fbpr: bman-fbpr {
27 size = <0 0x1000000>; 31 size = <0 0x1000000>;
28 alignment = <0 0x10000 32 alignment = <0 0x1000000>;
29 }; 33 };
30 qman_fqd: qman-fqd { 34 qman_fqd: qman-fqd {
31 size = <0 0x400000>; 35 size = <0 0x400000>;
32 alignment = <0 0x40000 36 alignment = <0 0x400000>;
33 }; 37 };
34 qman_pfdr: qman-pfdr { 38 qman_pfdr: qman-pfdr {
35 size = <0 0x2000000>; 39 size = <0 0x2000000>;
36 alignment = <0 0x20000 40 alignment = <0 0x2000000>;
37 }; 41 };
38 }; 42 };
39 43
40 ifc: localbus@ffe124000 { 44 ifc: localbus@ffe124000 {
41 reg = <0xf 0xfe124000 0 0x2000 45 reg = <0xf 0xfe124000 0 0x2000>;
42 ranges = <0 0 0xf 0xe8000000 0 46 ranges = <0 0 0xf 0xe8000000 0x04000000
43 1 0 0xf 0xfa000000 0 47 1 0 0xf 0xfa000000 0x00010000
44 2 0 0xf 0xfb000000 0 48 2 0 0xf 0xfb000000 0x00010000
45 4 0 0xf 0xc0000000 0 49 4 0 0xf 0xc0000000 0x08000000
46 6 0 0xf 0xd0000000 0 50 6 0 0xf 0xd0000000 0x08000000
47 7 0 0xf 0xd8000000 0 51 7 0 0xf 0xd8000000 0x08000000>;
48 52
49 nor@0,0 { 53 nor@0,0 {
50 #address-cells = <1>; 54 #address-cells = <1>;
51 #size-cells = <1>; 55 #size-cells = <1>;
52 compatible = "cfi-flas 56 compatible = "cfi-flash";
53 reg = <0x0 0x0 0x04000 57 reg = <0x0 0x0 0x04000000>;
54 bank-width = <2>; 58 bank-width = <2>;
55 device-width = <2>; 59 device-width = <2>;
56 }; 60 };
57 61
58 nand@1,0 { 62 nand@1,0 {
59 #address-cells = <1>; 63 #address-cells = <1>;
60 #size-cells = <1>; 64 #size-cells = <1>;
61 compatible = "fsl,ifc- 65 compatible = "fsl,ifc-nand";
62 reg = <0x1 0x0 0x10000 66 reg = <0x1 0x0 0x10000>;
63 }; 67 };
64 68
65 board-control@2,0 { 69 board-control@2,0 {
66 compatible = "keymile, 70 compatible = "keymile,qriox";
67 reg = <0x2 0x0 0x80>; 71 reg = <0x2 0x0 0x80>;
68 }; 72 };
69 73
70 chassis-mgmt@6,0 { 74 chassis-mgmt@6,0 {
71 compatible = "keymile, 75 compatible = "keymile,bfticu";
72 reg = <6 0 0x100>; 76 reg = <6 0 0x100>;
73 interrupt-controller; 77 interrupt-controller;
74 interrupt-parent = <&m 78 interrupt-parent = <&mpic>;
75 interrupts = <11 1 0 0 79 interrupts = <11 1 0 0>;
76 #interrupt-cells = <1> 80 #interrupt-cells = <1>;
77 }; 81 };
78 82
79 }; 83 };
80 84
81 memory { 85 memory {
82 device_type = "memory"; 86 device_type = "memory";
83 }; 87 };
84 88
85 dcsr: dcsr@f00000000 { 89 dcsr: dcsr@f00000000 {
86 ranges = <0x00000000 0xf 0x000 90 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
87 }; 91 };
88 92
89 bportals: bman-portals@ff4000000 { 93 bportals: bman-portals@ff4000000 {
90 ranges = <0x0 0xf 0xf4000000 0 94 ranges = <0x0 0xf 0xf4000000 0x2000000>;
91 }; 95 };
92 96
93 qportals: qman-portals@ff6000000 { 97 qportals: qman-portals@ff6000000 {
94 ranges = <0x0 0xf 0xf6000000 0 98 ranges = <0x0 0xf 0xf6000000 0x2000000>;
95 }; 99 };
96 100
97 soc: soc@ffe000000 { 101 soc: soc@ffe000000 {
98 ranges = <0x00000000 0xf 0xfe0 102 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
99 reg = <0xf 0xfe000000 0 0x0000 103 reg = <0xf 0xfe000000 0 0x00001000>;
100 104
101 spi@110000 { 105 spi@110000 {
102 network-clock@1 { 106 network-clock@1 {
103 compatible = " 107 compatible = "zarlink,zl30364";
104 reg = <1>; 108 reg = <1>;
105 spi-max-freque 109 spi-max-frequency = <1000000>;
106 }; 110 };
107 }; 111 };
108 112
109 sdhc@114000 { 113 sdhc@114000 {
110 status = "disabled"; 114 status = "disabled";
111 }; 115 };
112 116
113 i2c@118000 { 117 i2c@118000 {
114 clock-frequency = <100 118 clock-frequency = <100000>;
115 119
116 mux@70 { 120 mux@70 {
117 compatible = " 121 compatible = "nxp,pca9547";
118 reg = <0x70>; 122 reg = <0x70>;
119 #address-cells 123 #address-cells = <1>;
120 #size-cells = 124 #size-cells = <0>;
121 i2c-mux-idle-d 125 i2c-mux-idle-disconnect;
122 126
123 i2c@0 { 127 i2c@0 {
124 reg = 128 reg = <0>;
125 #addre 129 #address-cells = <1>;
126 #size- 130 #size-cells = <0>;
127 131
128 eeprom 132 eeprom@54 {
129 133 compatible = "atmel,24c02";
130 134 reg = <0x54>;
131 135 pagesize = <2>;
132 136 read-only;
133 137 label = "ddr3-spd";
134 }; 138 };
135 }; 139 };
136 140
137 i2c@7 { 141 i2c@7 {
138 reg = 142 reg = <7>;
139 #addre 143 #address-cells = <1>;
140 #size- 144 #size-cells = <0>;
141 145
142 temp-s 146 temp-sensor@48 {
143 147 compatible = "national,lm75";
144 148 reg = <0x48>;
145 149 label = "SENSOR_0";
146 }; 150 };
147 temp-s 151 temp-sensor@4a {
148 152 compatible = "national,lm75";
149 153 reg = <0x4a>;
150 154 label = "SENSOR_2";
151 }; 155 };
152 temp-s 156 temp-sensor@4b {
153 157 compatible = "national,lm75";
154 158 reg = <0x4b>;
155 159 label = "SENSOR_3";
156 }; 160 };
157 }; 161 };
158 }; 162 };
159 }; 163 };
160 164
161 i2c@118100 { 165 i2c@118100 {
162 clock-frequency = <100 166 clock-frequency = <100000>;
163 167
164 eeprom@50 { 168 eeprom@50 {
165 compatible = " 169 compatible = "atmel,24c08";
166 reg = <0x50>; 170 reg = <0x50>;
167 pagesize = <16 171 pagesize = <16>;
168 }; 172 };
169 173
170 eeprom@54 { 174 eeprom@54 {
171 compatible = " 175 compatible = "atmel,24c08";
172 reg = <0x54>; 176 reg = <0x54>;
173 pagesize = <16 177 pagesize = <16>;
174 }; 178 };
175 }; 179 };
176 180
177 i2c@119000 { 181 i2c@119000 {
178 status = "disabled"; 182 status = "disabled";
179 }; 183 };
180 184
181 i2c@119100 { 185 i2c@119100 {
182 status = "disabled"; 186 status = "disabled";
183 }; 187 };
184 188
185 serial2: serial@11d500 { 189 serial2: serial@11d500 {
186 status = "disabled"; 190 status = "disabled";
187 }; 191 };
188 192
189 serial3: serial@11d600 { 193 serial3: serial@11d600 {
190 status = "disabled"; 194 status = "disabled";
191 }; 195 };
192 196
193 usb0: usb@210000 { 197 usb0: usb@210000 {
194 status = "disabled"; 198 status = "disabled";
195 }; 199 };
196 usb1: usb@211000 { 200 usb1: usb@211000 {
197 status = "disabled"; 201 status = "disabled";
198 }; 202 };
199 203
200 display@180000 { 204 display@180000 {
201 status = "disabled"; 205 status = "disabled";
202 }; 206 };
203 207
204 sata@220000 { 208 sata@220000 {
205 status = "disabled"; 209 status = "disabled";
206 }; 210 };
207 sata@221000 { 211 sata@221000 {
208 status = "disabled"; 212 status = "disabled";
209 }; 213 };
210 214
211 fman@400000 { 215 fman@400000 {
212 ethernet@e0000 { 216 ethernet@e0000 {
213 phy-mode = "sg !! 217 fixed-link = <0 1 1000 0 0>;
214 fixed-link { !! 218 phy-connection-type = "sgmii";
215 speed <<
216 full-d <<
217 }; <<
218 }; 219 };
219 220
220 ethernet@e2000 { 221 ethernet@e2000 {
221 phy-mode = "sg !! 222 fixed-link = <1 1 1000 0 0>;
222 fixed-link { !! 223 phy-connection-type = "sgmii";
223 speed <<
224 full-d <<
225 }; <<
226 }; 224 };
227 225
228 ethernet@e4000 { 226 ethernet@e4000 {
229 status = "disa 227 status = "disabled";
230 }; 228 };
231 229
232 ethernet@e6000 { 230 ethernet@e6000 {
233 status = "disa 231 status = "disabled";
234 }; 232 };
235 233
236 ethernet@e8000 { 234 ethernet@e8000 {
237 phy-handle = < 235 phy-handle = <&front_phy>;
238 phy-mode = "rg !! 236 phy-connection-type = "rgmii";
239 }; 237 };
240 238
241 mdio0: mdio@fc000 { 239 mdio0: mdio@fc000 {
242 front_phy: eth 240 front_phy: ethernet-phy@11 {
243 reg = 241 reg = <0x11>;
244 }; 242 };
245 }; 243 };
246 }; 244 };
247 }; 245 };
248 246
249 247
250 pci0: pcie@ffe240000 { 248 pci0: pcie@ffe240000 {
251 reg = <0xf 0xfe240000 0 0x1000 249 reg = <0xf 0xfe240000 0 0x10000>;
252 ranges = <0x02000000 0 0xe0000 250 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
253 0x01000000 0 0x00000 251 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
254 pcie@0 { 252 pcie@0 {
255 ranges = <0x02000000 0 253 ranges = <0x02000000 0 0xe0000000
256 0x02000000 0 254 0x02000000 0 0xe0000000
257 0 0x20000000 255 0 0x20000000
258 256
259 0x01000000 0 257 0x01000000 0 0x00000000
260 0x01000000 0 258 0x01000000 0 0x00000000
261 0 0x00010000 259 0 0x00010000>;
262 }; 260 };
263 }; 261 };
264 262
265 pci1: pcie@ffe250000 { 263 pci1: pcie@ffe250000 {
266 status = "disabled"; 264 status = "disabled";
267 reg = <0xf 0xfe250000 0 0x1000 <<
268 ranges = <0x02000000 0 0xe0000 <<
269 0x01000000 0 0 0xf 0 <<
270 pcie@0 { <<
271 ranges = <0x02000000 0 <<
272 0x02000000 0 <<
273 0 0x10000000 <<
274 <<
275 0x01000000 0 <<
276 0x01000000 0 <<
277 0 0x00010000 <<
278 }; <<
279 }; 265 };
280 266
281 pci2: pcie@ffe260000 { 267 pci2: pcie@ffe260000 {
282 status = "disabled"; 268 status = "disabled";
283 reg = <0xf 0xfe260000 0 0x1000 <<
284 ranges = <0x02000000 0 0xe0000 <<
285 0x01000000 0 0x00000 <<
286 pcie@0 { <<
287 ranges = <0x02000000 0 <<
288 0x02000000 0 <<
289 0 0x10000000 <<
290 <<
291 0x01000000 0 <<
292 0x01000000 0 <<
293 0 0x00010000 <<
294 }; <<
295 }; 269 };
296 270
297 pci3: pcie@ffe270000 { 271 pci3: pcie@ffe270000 {
298 status = "disabled"; 272 status = "disabled";
299 reg = <0xf 0xfe270000 0 0x1000 <<
300 ranges = <0x02000000 0 0xe0000 <<
301 0x01000000 0 0x00000 <<
302 pcie@0 { <<
303 ranges = <0x02000000 0 <<
304 0x02000000 0 <<
305 0 0x10000000 <<
306 <<
307 0x01000000 0 <<
308 0x01000000 0 <<
309 0 0x00010000 <<
310 }; <<
311 }; 273 };
312 274
313 qe: qe@ffe140000 { 275 qe: qe@ffe140000 {
314 ranges = <0x0 0xf 0xfe140000 0 276 ranges = <0x0 0xf 0xfe140000 0x40000>;
315 reg = <0xf 0xfe140000 0 0x480> 277 reg = <0xf 0xfe140000 0 0x480>;
316 brg-frequency = <0>; 278 brg-frequency = <0>;
317 bus-frequency = <0>; 279 bus-frequency = <0>;
318 280
319 si1: si@700 { 281 si1: si@700 {
320 compatible = "fsl,t104 282 compatible = "fsl,t1040-qe-si";
321 reg = <0x700 0x80>; 283 reg = <0x700 0x80>;
322 }; 284 };
323 285
324 siram1: siram@1000 { 286 siram1: siram@1000 {
325 compatible = "fsl,t104 287 compatible = "fsl,t1040-qe-siram";
326 reg = <0x1000 0x800>; 288 reg = <0x1000 0x800>;
327 }; 289 };
328 290
329 ucc_hdlc: ucc@2000 { 291 ucc_hdlc: ucc@2000 {
330 device_type = "hdlc"; 292 device_type = "hdlc";
331 compatible = "fsl,ucc- 293 compatible = "fsl,ucc-hdlc";
332 rx-clock-name = "clk9" 294 rx-clock-name = "clk9";
333 tx-clock-name = "clk9" 295 tx-clock-name = "clk9";
334 fsl,hdlc-bus; 296 fsl,hdlc-bus;
335 }; 297 };
336 }; 298 };
337 }; 299 };
338 300
339 #include "t1040si-post.dtsi" 301 #include "t1040si-post.dtsi"
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