1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 2 /* 3 * MPC8536 DS Device Tree Source 3 * MPC8536 DS Device Tree Source 4 * 4 * 5 * Copyright 2008, 2011 Freescale Semiconducto 5 * Copyright 2008, 2011 Freescale Semiconductor, Inc. 6 */ 6 */ 7 7 8 /include/ "mpc8536si-pre.dtsi" 8 /include/ "mpc8536si-pre.dtsi" 9 9 10 / { 10 / { 11 model = "fsl,mpc8536ds"; 11 model = "fsl,mpc8536ds"; 12 compatible = "fsl,mpc8536ds"; 12 compatible = "fsl,mpc8536ds"; 13 13 14 cpus { 14 cpus { 15 #cpus = <1>; 15 #cpus = <1>; 16 #address-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 17 #size-cells = <0>; 18 18 19 PowerPC,8536@0 { 19 PowerPC,8536@0 { 20 device_type = "cpu"; 20 device_type = "cpu"; 21 reg = <0>; 21 reg = <0>; 22 next-level-cache = <&L 22 next-level-cache = <&L2>; 23 }; 23 }; 24 }; 24 }; 25 25 26 memory { 26 memory { 27 device_type = "memory"; 27 device_type = "memory"; 28 reg = <0 0 0 0>; // Fil 28 reg = <0 0 0 0>; // Filled by U-Boot 29 }; 29 }; 30 30 31 lbc: localbus@ffe05000 { 31 lbc: localbus@ffe05000 { 32 reg = <0 0xffe05000 0 0x1000>; 32 reg = <0 0xffe05000 0 0x1000>; 33 33 34 ranges = <0x0 0x0 0x0 0xe80000 34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 35 0x2 0x0 0x0 0xffa000 35 0x2 0x0 0x0 0xffa00000 0x00040000 36 0x3 0x0 0x0 0xffdf00 36 0x3 0x0 0x0 0xffdf0000 0x00008000>; 37 }; 37 }; 38 38 39 board_soc: soc: soc@ffe00000 { 39 board_soc: soc: soc@ffe00000 { 40 ranges = <0x0 0 0xffe00000 0x1 40 ranges = <0x0 0 0xffe00000 0x100000>; 41 }; 41 }; 42 42 43 pci0: pci@ffe08000 { 43 pci0: pci@ffe08000 { 44 reg = <0 0xffe08000 0 0x1000>; 44 reg = <0 0xffe08000 0 0x1000>; 45 ranges = <0x02000000 0 0x80000 45 ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000 46 0x01000000 0 0x00000 46 0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>; 47 clock-frequency = <66666666>; 47 clock-frequency = <66666666>; 48 interrupt-map-mask = <0xf800 0 48 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 49 interrupt-map = < 49 interrupt-map = < 50 50 51 /* IDSEL 0x11 J17 Slot 51 /* IDSEL 0x11 J17 Slot 1 */ 52 0x8800 0 0 1 &mpic 1 1 52 0x8800 0 0 1 &mpic 1 1 0 0 53 0x8800 0 0 2 &mpic 2 1 53 0x8800 0 0 2 &mpic 2 1 0 0 54 0x8800 0 0 3 &mpic 3 1 54 0x8800 0 0 3 &mpic 3 1 0 0 55 0x8800 0 0 4 &mpic 4 1 55 0x8800 0 0 4 &mpic 4 1 0 0>; 56 }; 56 }; 57 57 58 pci1: pcie@ffe09000 { 58 pci1: pcie@ffe09000 { 59 reg = <0 0xffe09000 0 0x1000>; 59 reg = <0 0xffe09000 0 0x1000>; 60 ranges = <0x02000000 0 0x98000 60 ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000 61 0x01000000 0 0x00000 61 0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>; 62 pcie@0 { 62 pcie@0 { 63 ranges = <0x02000000 0 63 ranges = <0x02000000 0 0x98000000 64 0x02000000 0 64 0x02000000 0 0x98000000 65 0 0x08000000 65 0 0x08000000 66 66 67 0x01000000 0 67 0x01000000 0 0x00000000 68 0x01000000 0 68 0x01000000 0 0x00000000 69 0 0x00010000 69 0 0x00010000>; 70 }; 70 }; 71 }; 71 }; 72 72 73 pci2: pcie@ffe0a000 { 73 pci2: pcie@ffe0a000 { 74 reg = <0 0xffe0a000 0 0x1000>; 74 reg = <0 0xffe0a000 0 0x1000>; 75 ranges = <0x02000000 0 0x90000 75 ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000 76 0x01000000 0 0x00000 76 0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>; 77 pcie@0 { 77 pcie@0 { 78 ranges = <0x02000000 0 78 ranges = <0x02000000 0 0x90000000 79 0x02000000 0 79 0x02000000 0 0x90000000 80 0 0x08000000 80 0 0x08000000 81 81 82 0x01000000 0 82 0x01000000 0 0x00000000 83 0x01000000 0 83 0x01000000 0 0x00000000 84 0 0x00010000 84 0 0x00010000>; 85 }; 85 }; 86 }; 86 }; 87 87 88 pci3: pcie@ffe0b000 { 88 pci3: pcie@ffe0b000 { 89 reg = <0 0xffe0b000 0 0x1000>; 89 reg = <0 0xffe0b000 0 0x1000>; 90 ranges = <0x02000000 0 0xa0000 90 ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 91 0x01000000 0 0x00000 91 0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>; 92 pcie@0 { 92 pcie@0 { 93 ranges = <0x02000000 0 93 ranges = <0x02000000 0 0xa0000000 94 0x02000000 0 94 0x02000000 0 0xa0000000 95 0 0x20000000 95 0 0x20000000 96 96 97 0x01000000 0 97 0x01000000 0 0x00000000 98 0x01000000 0 98 0x01000000 0 0x00000000 99 0 0x00100000 99 0 0x00100000>; 100 }; 100 }; 101 }; 101 }; 102 }; 102 }; 103 103 104 /include/ "mpc8536si-post.dtsi" 104 /include/ "mpc8536si-post.dtsi" 105 /include/ "mpc8536ds.dtsi" 105 /include/ "mpc8536ds.dtsi"
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