1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * MPC8572 DS Device Tree Source
4 *
5 * Copyright 2007-2009 Freescale Semiconductor
6 */
7
8 /include/ "mpc8572si-pre.dtsi"
9
10 / {
11 model = "fsl,MPC8572DS";
12 compatible = "fsl,MPC8572DS";
13
14 memory {
15 device_type = "memory";
16 };
17
18 board_lbc: lbc: localbus@ffe05000 {
19 reg = <0 0xffe05000 0 0x1000>;
20
21 ranges = <0x0 0x0 0x0 0xe80000
22 0x1 0x0 0x0 0xe00000
23 0x2 0x0 0x0 0xffa000
24 0x3 0x0 0x0 0xffdf00
25 0x4 0x0 0x0 0xffa400
26 0x5 0x0 0x0 0xffa800
27 0x6 0x0 0x0 0xffac00
28 };
29
30 board_soc: soc: soc8572@ffe00000 {
31 ranges = <0x0 0 0xffe00000 0x1
32 };
33
34 board_pci0: pci0: pcie@ffe08000 {
35 reg = <0 0xffe08000 0 0x1000>;
36 ranges = <0x2000000 0x0 0x8000
37 0x1000000 0x0 0x0000
38 pcie@0 {
39 ranges = <0x2000000 0x
40 0x2000000 0x
41 0x0 0x200000
42
43 0x1000000 0x
44 0x1000000 0x
45 0x0 0x10000>
46 };
47 };
48
49 pci1: pcie@ffe09000 {
50 reg = <0 0xffe09000 0 0x1000>;
51 ranges = <0x2000000 0x0 0xa000
52 0x1000000 0x0 0x0000
53 pcie@0 {
54 ranges = <0x2000000 0x
55 0x2000000 0x
56 0x0 0x200000
57
58 0x1000000 0x
59 0x1000000 0x
60 0x0 0x10000>
61 };
62 };
63
64 pci2: pcie@ffe0a000 {
65 reg = <0 0xffe0a000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xc000
67 0x1000000 0x0 0x0000
68 pcie@0 {
69 ranges = <0x2000000 0x
70 0x2000000 0x
71 0x0 0x200000
72
73 0x1000000 0x
74 0x1000000 0x
75 0x0 0x10000>
76 };
77 };
78 };
79
80 /*
81 * mpc8572ds.dtsi must be last to ensure board
82 * for interrupt-map & interrupt-map-mask
83 */
84
85 /include/ "mpc8572si-post.dtsi"
86 /include/ "mpc8572ds.dtsi"
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