1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Device tree source for the Emerson/Artesyn 2 * Device tree source for the Emerson/Artesyn MVME2500
4 * 3 *
5 * Copyright 2014 Elettra-Sincrotrone Trieste 4 * Copyright 2014 Elettra-Sincrotrone Trieste S.C.p.A.
>> 5 *
>> 6 * This program is free software; you can redistribute it and/or modify it
>> 7 * under the terms of the GNU General Public License as published by the
>> 8 * Free Software Foundation; either version 2 of the License, or (at your
>> 9 * option) any later version.
6 * 10 *
7 * Based on: P2020 DS Device Tree Source 11 * Based on: P2020 DS Device Tree Source
8 * Copyright 2009 Freescale Semiconductor Inc. 12 * Copyright 2009 Freescale Semiconductor Inc.
9 */ 13 */
10 14
11 /include/ "p2020si-pre.dtsi" 15 /include/ "p2020si-pre.dtsi"
12 16
13 / { 17 / {
14 model = "MVME2500"; 18 model = "MVME2500";
15 compatible = "artesyn,MVME2500"; 19 compatible = "artesyn,MVME2500";
16 20
17 aliases { 21 aliases {
18 serial2 = &serial2; 22 serial2 = &serial2;
19 serial3 = &serial3; 23 serial3 = &serial3;
20 serial4 = &serial4; 24 serial4 = &serial4;
21 serial5 = &serial5; 25 serial5 = &serial5;
22 }; 26 };
23 27
24 memory { 28 memory {
25 device_type = "memory"; 29 device_type = "memory";
26 }; 30 };
27 31
28 soc: soc@ffe00000 { 32 soc: soc@ffe00000 {
29 ranges = <0x0 0 0xffe00000 0x1 33 ranges = <0x0 0 0xffe00000 0x100000>;
30 34
31 i2c@3000 { 35 i2c@3000 {
32 hwmon@4c { 36 hwmon@4c {
33 compatible = " 37 compatible = "adi,adt7461";
34 reg = <0x4c>; 38 reg = <0x4c>;
35 }; 39 };
36 40
37 rtc@68 { 41 rtc@68 {
38 compatible = " 42 compatible = "dallas,ds1337";
39 reg = <0x68>; 43 reg = <0x68>;
40 interrupts = < 44 interrupts = <8 1 0 0>;
41 }; 45 };
42 46
43 eeprom@54 { 47 eeprom@54 {
44 compatible = " 48 compatible = "atmel,24c64";
45 reg = <0x54>; 49 reg = <0x54>;
46 }; 50 };
47 51
48 eeprom@52 { 52 eeprom@52 {
49 compatible = " 53 compatible = "atmel,24c512";
50 reg = <0x52>; 54 reg = <0x52>;
51 }; 55 };
52 56
53 eeprom@53 { 57 eeprom@53 {
54 compatible = " 58 compatible = "atmel,24c512";
55 reg = <0x53>; 59 reg = <0x53>;
56 }; 60 };
57 61
58 eeprom@50 { 62 eeprom@50 {
59 compatible = " 63 compatible = "atmel,24c02";
60 reg = <0x50>; 64 reg = <0x50>;
61 }; 65 };
62 66
63 }; 67 };
64 68
65 spi0: spi@7000 { 69 spi0: spi@7000 {
66 fsl,espi-num-chipselec 70 fsl,espi-num-chipselects = <2>;
67 71
68 flash@0 { 72 flash@0 {
69 compatible = " 73 compatible = "atmel,at25df641", "jedec,spi-nor";
70 reg = <0>; 74 reg = <0>;
71 spi-max-freque 75 spi-max-frequency = <10000000>;
72 }; 76 };
73 flash@1 { 77 flash@1 {
74 compatible = " 78 compatible = "atmel,at25df641", "jedec,spi-nor";
75 reg = <1>; 79 reg = <1>;
76 spi-max-freque 80 spi-max-frequency = <10000000>;
77 }; 81 };
78 }; 82 };
79 83
80 usb@22000 { 84 usb@22000 {
81 dr_mode = "host"; 85 dr_mode = "host";
82 phy_type = "ulpi"; 86 phy_type = "ulpi";
83 }; 87 };
84 88
85 enet0: ethernet@24000 { 89 enet0: ethernet@24000 {
86 tbi-handle = <&tbi0>; 90 tbi-handle = <&tbi0>;
87 phy-handle = <&phy1>; 91 phy-handle = <&phy1>;
88 phy-connection-type = 92 phy-connection-type = "rgmii-id";
89 }; 93 };
90 94
91 mdio@24520 { 95 mdio@24520 {
92 phy1: ethernet-phy@1 { 96 phy1: ethernet-phy@1 {
93 compatible = " 97 compatible = "brcm,bcm54616S";
94 interrupts = < 98 interrupts = <6 1 0 0>;
95 reg = <0x1>; 99 reg = <0x1>;
96 }; 100 };
97 101
98 phy2: ethernet-phy@2 { 102 phy2: ethernet-phy@2 {
99 compatible = " 103 compatible = "brcm,bcm54616S";
100 interrupts = < 104 interrupts = <6 1 0 0>;
101 reg = <0x2>; 105 reg = <0x2>;
102 }; 106 };
103 107
104 phy3: ethernet-phy@3 { 108 phy3: ethernet-phy@3 {
105 compatible = " 109 compatible = "brcm,bcm54616S";
106 interrupts = < 110 interrupts = <5 1 0 0>;
107 reg = <0x3>; 111 reg = <0x3>;
108 }; 112 };
109 113
110 phy7: ethernet-phy@7 { 114 phy7: ethernet-phy@7 {
111 compatible = " 115 compatible = "brcm,bcm54616S";
112 interrupts = < 116 interrupts = <7 1 0 0>;
113 reg = <0x7>; 117 reg = <0x7>;
114 }; 118 };
115 119
116 tbi0: tbi-phy@11 { 120 tbi0: tbi-phy@11 {
117 reg = <0x11>; 121 reg = <0x11>;
118 device_type = 122 device_type = "tbi-phy";
119 }; 123 };
120 }; 124 };
121 125
122 enet1: ethernet@25000 { 126 enet1: ethernet@25000 {
123 tbi-handle = <&tbi1>; 127 tbi-handle = <&tbi1>;
124 phy-handle = <&phy7>; 128 phy-handle = <&phy7>;
125 phy-connection-type = 129 phy-connection-type = "rgmii-id";
126 }; 130 };
127 131
128 mdio@25520 { 132 mdio@25520 {
129 tbi1: tbi-phy@11 { 133 tbi1: tbi-phy@11 {
130 reg = <0x11>; 134 reg = <0x11>;
131 device_type = 135 device_type = "tbi-phy";
132 }; 136 };
133 }; 137 };
134 138
135 enet2: ethernet@26000 { 139 enet2: ethernet@26000 {
136 tbi-handle = <&tbi2>; 140 tbi-handle = <&tbi2>;
137 phy-handle = <&phy3>; 141 phy-handle = <&phy3>;
138 phy-connection-type = 142 phy-connection-type = "rgmii-id";
139 }; 143 };
140 144
141 mdio@26520 { 145 mdio@26520 {
142 tbi2: tbi-phy@11 { 146 tbi2: tbi-phy@11 {
143 reg = <0x11>; 147 reg = <0x11>;
144 device_type = 148 device_type = "tbi-phy";
145 }; 149 };
146 }; 150 };
147 }; 151 };
148 152
149 lbc: localbus@ffe05000 { 153 lbc: localbus@ffe05000 {
150 reg = <0 0xffe05000 0 0x1000>; 154 reg = <0 0xffe05000 0 0x1000>;
151 155
152 ranges = <0x0 0x0 0x0 0xfff000 156 ranges = <0x0 0x0 0x0 0xfff00000 0x00080000
153 0x1 0x0 0x0 0xffc400 157 0x1 0x0 0x0 0xffc40000 0x00010000
154 0x2 0x0 0x0 0xffc500 158 0x2 0x0 0x0 0xffc50000 0x00010000
155 0x3 0x0 0x0 0xffc600 159 0x3 0x0 0x0 0xffc60000 0x00010000
156 0x4 0x0 0x0 0xffc700 160 0x4 0x0 0x0 0xffc70000 0x00010000
157 0x6 0x0 0x0 0xffc800 161 0x6 0x0 0x0 0xffc80000 0x00010000
158 0x5 0x0 0x0 0xffdf00 162 0x5 0x0 0x0 0xffdf0000 0x00008000>;
159 163
160 serial2: serial@1,0 { 164 serial2: serial@1,0 {
161 device_type = "serial" 165 device_type = "serial";
162 compatible = "ns16550" 166 compatible = "ns16550";
163 reg = <0x1 0x0 0x100>; 167 reg = <0x1 0x0 0x100>;
164 clock-frequency = <184 168 clock-frequency = <1843200>;
165 interrupts = <11 2 0 0 169 interrupts = <11 2 0 0>;
166 }; 170 };
167 171
168 serial3: serial@2,0 { 172 serial3: serial@2,0 {
169 device_type = "serial" 173 device_type = "serial";
170 compatible = "ns16550" 174 compatible = "ns16550";
171 reg = <0x2 0x0 0x100>; 175 reg = <0x2 0x0 0x100>;
172 clock-frequency = <184 176 clock-frequency = <1843200>;
173 interrupts = <1 2 0 0> 177 interrupts = <1 2 0 0>;
174 }; 178 };
175 179
176 serial4: serial@3,0 { 180 serial4: serial@3,0 {
177 device_type = "serial" 181 device_type = "serial";
178 compatible = "ns16550" 182 compatible = "ns16550";
179 reg = <0x3 0x0 0x100>; 183 reg = <0x3 0x0 0x100>;
180 clock-frequency = <184 184 clock-frequency = <1843200>;
181 interrupts = <2 2 0 0> 185 interrupts = <2 2 0 0>;
182 }; 186 };
183 187
184 serial5: serial@4,0 { 188 serial5: serial@4,0 {
185 device_type = "serial" 189 device_type = "serial";
186 compatible = "ns16550" 190 compatible = "ns16550";
187 reg = <0x4 0x0 0x100>; 191 reg = <0x4 0x0 0x100>;
188 clock-frequency = <184 192 clock-frequency = <1843200>;
189 interrupts = <3 2 0 0> 193 interrupts = <3 2 0 0>;
190 }; 194 };
191 195
192 mram@0,0 { 196 mram@0,0 {
193 compatible = "everspin 197 compatible = "everspin,mram", "mtd-ram";
194 reg = <0x0 0x0 0x80000 198 reg = <0x0 0x0 0x80000>;
195 bank-width = <2>; 199 bank-width = <2>;
196 }; 200 };
197 201
198 board-control@5,0 { 202 board-control@5,0 {
199 compatible = "artesyn, 203 compatible = "artesyn,mvme2500-fpga";
200 reg = <0x5 0x0 0x01000 204 reg = <0x5 0x0 0x01000>;
201 }; 205 };
202 206
203 cpld@6,0 { 207 cpld@6,0 {
204 compatible = "artesyn, 208 compatible = "artesyn,mvme2500-cpld";
205 reg = <0x6 0x0 0x10000 209 reg = <0x6 0x0 0x10000>;
206 interrupts = <9 1 0 0> 210 interrupts = <9 1 0 0>;
207 }; 211 };
208 }; 212 };
209 213
210 pci0: pcie@ffe08000 { 214 pci0: pcie@ffe08000 {
211 reg = <0 0xffe08000 0 0x1000>; 215 reg = <0 0xffe08000 0 0x1000>;
212 ranges = <0x2000000 0x0 0x8000 216 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
213 0x1000000 0x0 0x0000 217 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
214 pcie@0 { 218 pcie@0 {
215 ranges = <0x2000000 0x 219 ranges = <0x2000000 0x0 0x80000000
216 0x2000000 0x 220 0x2000000 0x0 0x80000000
217 0x0 0x200000 221 0x0 0x20000000
218 222
219 0x1000000 0x 223 0x1000000 0x0 0x0
220 0x1000000 0x 224 0x1000000 0x0 0x0
221 0x0 0x10000> 225 0x0 0x10000>;
222 }; 226 };
223 }; 227 };
224 228
225 pci1: pcie@ffe09000 { 229 pci1: pcie@ffe09000 {
226 reg = <0 0xffe09000 0 0x1000>; 230 reg = <0 0xffe09000 0 0x1000>;
227 ranges = <0x2000000 0x0 0xa000 231 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
228 0x1000000 0x0 0x0000 232 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
229 pcie@0 { 233 pcie@0 {
230 ranges = <0x2000000 0x 234 ranges = <0x2000000 0x0 0xa0000000
231 0x2000000 0x 235 0x2000000 0x0 0xa0000000
232 0x0 0x200000 236 0x0 0x20000000
233 237
234 0x1000000 0x 238 0x1000000 0x0 0x0
235 0x1000000 0x 239 0x1000000 0x0 0x0
236 0x0 0x10000> 240 0x0 0x10000>;
237 }; 241 };
238 242
239 }; 243 };
240 244
241 pci2: pcie@ffe0a000 { 245 pci2: pcie@ffe0a000 {
242 reg = <0 0xffe0a000 0 0x1000>; 246 reg = <0 0xffe0a000 0 0x1000>;
243 ranges = <0x2000000 0x0 0xc000 247 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
244 0x1000000 0x0 0x0000 248 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
245 pcie@0 { 249 pcie@0 {
246 ranges = <0x2000000 0x 250 ranges = <0x2000000 0x0 0xc0000000
247 0x2000000 0x 251 0x2000000 0x0 0xc0000000
248 0x0 0x200000 252 0x0 0x20000000
249 253
250 0x1000000 0x 254 0x1000000 0x0 0x0
251 0x1000000 0x 255 0x1000000 0x0 0x0
252 0x0 0x10000> 256 0x0 0x10000>;
253 }; 257 };
254 }; 258 };
255 }; 259 };
256 260
257 /include/ "p2020si-post.dtsi" 261 /include/ "p2020si-post.dtsi"
258 262
259 / { 263 / {
260 soc@ffe00000 { 264 soc@ffe00000 {
261 serial@4600 { 265 serial@4600 {
262 status = "disabled"; 266 status = "disabled";
263 }; 267 };
264 268
265 i2c@3100 { 269 i2c@3100 {
266 status = "disabled"; 270 status = "disabled";
267 }; 271 };
268 272
269 sdhc@2e000 { 273 sdhc@2e000 {
270 compatible = "fsl,p202 274 compatible = "fsl,p2020-esdhc", "fsl,esdhc";
271 non-removable; 275 non-removable;
272 }; 276 };
273 277
274 }; 278 };
275 279
276 }; 280 };
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