1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * Device tree source for the Emerson/Artesyn 3 * Device tree source for the Emerson/Artesyn MVME2500
4 * 4 *
5 * Copyright 2014 Elettra-Sincrotrone Trieste 5 * Copyright 2014 Elettra-Sincrotrone Trieste S.C.p.A.
6 * 6 *
7 * Based on: P2020 DS Device Tree Source 7 * Based on: P2020 DS Device Tree Source
8 * Copyright 2009 Freescale Semiconductor Inc. 8 * Copyright 2009 Freescale Semiconductor Inc.
9 */ 9 */
10 10
11 /include/ "p2020si-pre.dtsi" 11 /include/ "p2020si-pre.dtsi"
12 12
13 / { 13 / {
14 model = "MVME2500"; 14 model = "MVME2500";
15 compatible = "artesyn,MVME2500"; 15 compatible = "artesyn,MVME2500";
16 16
17 aliases { 17 aliases {
18 serial2 = &serial2; 18 serial2 = &serial2;
19 serial3 = &serial3; 19 serial3 = &serial3;
20 serial4 = &serial4; 20 serial4 = &serial4;
21 serial5 = &serial5; 21 serial5 = &serial5;
22 }; 22 };
23 23
24 memory { 24 memory {
25 device_type = "memory"; 25 device_type = "memory";
26 }; 26 };
27 27
28 soc: soc@ffe00000 { 28 soc: soc@ffe00000 {
29 ranges = <0x0 0 0xffe00000 0x1 29 ranges = <0x0 0 0xffe00000 0x100000>;
30 30
31 i2c@3000 { 31 i2c@3000 {
32 hwmon@4c { 32 hwmon@4c {
33 compatible = " 33 compatible = "adi,adt7461";
34 reg = <0x4c>; 34 reg = <0x4c>;
35 }; 35 };
36 36
37 rtc@68 { 37 rtc@68 {
38 compatible = " 38 compatible = "dallas,ds1337";
39 reg = <0x68>; 39 reg = <0x68>;
40 interrupts = < 40 interrupts = <8 1 0 0>;
41 }; 41 };
42 42
43 eeprom@54 { 43 eeprom@54 {
44 compatible = " 44 compatible = "atmel,24c64";
45 reg = <0x54>; 45 reg = <0x54>;
46 }; 46 };
47 47
48 eeprom@52 { 48 eeprom@52 {
49 compatible = " 49 compatible = "atmel,24c512";
50 reg = <0x52>; 50 reg = <0x52>;
51 }; 51 };
52 52
53 eeprom@53 { 53 eeprom@53 {
54 compatible = " 54 compatible = "atmel,24c512";
55 reg = <0x53>; 55 reg = <0x53>;
56 }; 56 };
57 57
58 eeprom@50 { 58 eeprom@50 {
59 compatible = " 59 compatible = "atmel,24c02";
60 reg = <0x50>; 60 reg = <0x50>;
61 }; 61 };
62 62
63 }; 63 };
64 64
65 spi0: spi@7000 { 65 spi0: spi@7000 {
66 fsl,espi-num-chipselec 66 fsl,espi-num-chipselects = <2>;
67 67
68 flash@0 { 68 flash@0 {
69 compatible = " 69 compatible = "atmel,at25df641", "jedec,spi-nor";
70 reg = <0>; 70 reg = <0>;
71 spi-max-freque 71 spi-max-frequency = <10000000>;
72 }; 72 };
73 flash@1 { 73 flash@1 {
74 compatible = " 74 compatible = "atmel,at25df641", "jedec,spi-nor";
75 reg = <1>; 75 reg = <1>;
76 spi-max-freque 76 spi-max-frequency = <10000000>;
77 }; 77 };
78 }; 78 };
79 79
80 usb@22000 { 80 usb@22000 {
81 dr_mode = "host"; 81 dr_mode = "host";
82 phy_type = "ulpi"; 82 phy_type = "ulpi";
83 }; 83 };
84 84
85 enet0: ethernet@24000 { 85 enet0: ethernet@24000 {
86 tbi-handle = <&tbi0>; 86 tbi-handle = <&tbi0>;
87 phy-handle = <&phy1>; 87 phy-handle = <&phy1>;
88 phy-connection-type = 88 phy-connection-type = "rgmii-id";
89 }; 89 };
90 90
91 mdio@24520 { 91 mdio@24520 {
92 phy1: ethernet-phy@1 { 92 phy1: ethernet-phy@1 {
93 compatible = " 93 compatible = "brcm,bcm54616S";
94 interrupts = < 94 interrupts = <6 1 0 0>;
95 reg = <0x1>; 95 reg = <0x1>;
96 }; 96 };
97 97
98 phy2: ethernet-phy@2 { 98 phy2: ethernet-phy@2 {
99 compatible = " 99 compatible = "brcm,bcm54616S";
100 interrupts = < 100 interrupts = <6 1 0 0>;
101 reg = <0x2>; 101 reg = <0x2>;
102 }; 102 };
103 103
104 phy3: ethernet-phy@3 { 104 phy3: ethernet-phy@3 {
105 compatible = " 105 compatible = "brcm,bcm54616S";
106 interrupts = < 106 interrupts = <5 1 0 0>;
107 reg = <0x3>; 107 reg = <0x3>;
108 }; 108 };
109 109
110 phy7: ethernet-phy@7 { 110 phy7: ethernet-phy@7 {
111 compatible = " 111 compatible = "brcm,bcm54616S";
112 interrupts = < 112 interrupts = <7 1 0 0>;
113 reg = <0x7>; 113 reg = <0x7>;
114 }; 114 };
115 115
116 tbi0: tbi-phy@11 { 116 tbi0: tbi-phy@11 {
117 reg = <0x11>; 117 reg = <0x11>;
118 device_type = 118 device_type = "tbi-phy";
119 }; 119 };
120 }; 120 };
121 121
122 enet1: ethernet@25000 { 122 enet1: ethernet@25000 {
123 tbi-handle = <&tbi1>; 123 tbi-handle = <&tbi1>;
124 phy-handle = <&phy7>; 124 phy-handle = <&phy7>;
125 phy-connection-type = 125 phy-connection-type = "rgmii-id";
126 }; 126 };
127 127
128 mdio@25520 { 128 mdio@25520 {
129 tbi1: tbi-phy@11 { 129 tbi1: tbi-phy@11 {
130 reg = <0x11>; 130 reg = <0x11>;
131 device_type = 131 device_type = "tbi-phy";
132 }; 132 };
133 }; 133 };
134 134
135 enet2: ethernet@26000 { 135 enet2: ethernet@26000 {
136 tbi-handle = <&tbi2>; 136 tbi-handle = <&tbi2>;
137 phy-handle = <&phy3>; 137 phy-handle = <&phy3>;
138 phy-connection-type = 138 phy-connection-type = "rgmii-id";
139 }; 139 };
140 140
141 mdio@26520 { 141 mdio@26520 {
142 tbi2: tbi-phy@11 { 142 tbi2: tbi-phy@11 {
143 reg = <0x11>; 143 reg = <0x11>;
144 device_type = 144 device_type = "tbi-phy";
145 }; 145 };
146 }; 146 };
147 }; 147 };
148 148
149 lbc: localbus@ffe05000 { 149 lbc: localbus@ffe05000 {
150 reg = <0 0xffe05000 0 0x1000>; 150 reg = <0 0xffe05000 0 0x1000>;
151 151
152 ranges = <0x0 0x0 0x0 0xfff000 152 ranges = <0x0 0x0 0x0 0xfff00000 0x00080000
153 0x1 0x0 0x0 0xffc400 153 0x1 0x0 0x0 0xffc40000 0x00010000
154 0x2 0x0 0x0 0xffc500 154 0x2 0x0 0x0 0xffc50000 0x00010000
155 0x3 0x0 0x0 0xffc600 155 0x3 0x0 0x0 0xffc60000 0x00010000
156 0x4 0x0 0x0 0xffc700 156 0x4 0x0 0x0 0xffc70000 0x00010000
157 0x6 0x0 0x0 0xffc800 157 0x6 0x0 0x0 0xffc80000 0x00010000
158 0x5 0x0 0x0 0xffdf00 158 0x5 0x0 0x0 0xffdf0000 0x00008000>;
159 159
160 serial2: serial@1,0 { 160 serial2: serial@1,0 {
161 device_type = "serial" 161 device_type = "serial";
162 compatible = "ns16550" 162 compatible = "ns16550";
163 reg = <0x1 0x0 0x100>; 163 reg = <0x1 0x0 0x100>;
164 clock-frequency = <184 164 clock-frequency = <1843200>;
165 interrupts = <11 2 0 0 165 interrupts = <11 2 0 0>;
166 }; 166 };
167 167
168 serial3: serial@2,0 { 168 serial3: serial@2,0 {
169 device_type = "serial" 169 device_type = "serial";
170 compatible = "ns16550" 170 compatible = "ns16550";
171 reg = <0x2 0x0 0x100>; 171 reg = <0x2 0x0 0x100>;
172 clock-frequency = <184 172 clock-frequency = <1843200>;
173 interrupts = <1 2 0 0> 173 interrupts = <1 2 0 0>;
174 }; 174 };
175 175
176 serial4: serial@3,0 { 176 serial4: serial@3,0 {
177 device_type = "serial" 177 device_type = "serial";
178 compatible = "ns16550" 178 compatible = "ns16550";
179 reg = <0x3 0x0 0x100>; 179 reg = <0x3 0x0 0x100>;
180 clock-frequency = <184 180 clock-frequency = <1843200>;
181 interrupts = <2 2 0 0> 181 interrupts = <2 2 0 0>;
182 }; 182 };
183 183
184 serial5: serial@4,0 { 184 serial5: serial@4,0 {
185 device_type = "serial" 185 device_type = "serial";
186 compatible = "ns16550" 186 compatible = "ns16550";
187 reg = <0x4 0x0 0x100>; 187 reg = <0x4 0x0 0x100>;
188 clock-frequency = <184 188 clock-frequency = <1843200>;
189 interrupts = <3 2 0 0> 189 interrupts = <3 2 0 0>;
190 }; 190 };
191 191
192 mram@0,0 { 192 mram@0,0 {
193 compatible = "everspin 193 compatible = "everspin,mram", "mtd-ram";
194 reg = <0x0 0x0 0x80000 194 reg = <0x0 0x0 0x80000>;
195 bank-width = <2>; 195 bank-width = <2>;
196 }; 196 };
197 197
198 board-control@5,0 { 198 board-control@5,0 {
199 compatible = "artesyn, 199 compatible = "artesyn,mvme2500-fpga";
200 reg = <0x5 0x0 0x01000 200 reg = <0x5 0x0 0x01000>;
201 }; 201 };
202 202
203 cpld@6,0 { 203 cpld@6,0 {
204 compatible = "artesyn, 204 compatible = "artesyn,mvme2500-cpld";
205 reg = <0x6 0x0 0x10000 205 reg = <0x6 0x0 0x10000>;
206 interrupts = <9 1 0 0> 206 interrupts = <9 1 0 0>;
207 }; 207 };
208 }; 208 };
209 209
210 pci0: pcie@ffe08000 { 210 pci0: pcie@ffe08000 {
211 reg = <0 0xffe08000 0 0x1000>; 211 reg = <0 0xffe08000 0 0x1000>;
212 ranges = <0x2000000 0x0 0x8000 212 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
213 0x1000000 0x0 0x0000 213 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
214 pcie@0 { 214 pcie@0 {
215 ranges = <0x2000000 0x 215 ranges = <0x2000000 0x0 0x80000000
216 0x2000000 0x 216 0x2000000 0x0 0x80000000
217 0x0 0x200000 217 0x0 0x20000000
218 218
219 0x1000000 0x 219 0x1000000 0x0 0x0
220 0x1000000 0x 220 0x1000000 0x0 0x0
221 0x0 0x10000> 221 0x0 0x10000>;
222 }; 222 };
223 }; 223 };
224 224
225 pci1: pcie@ffe09000 { 225 pci1: pcie@ffe09000 {
226 reg = <0 0xffe09000 0 0x1000>; 226 reg = <0 0xffe09000 0 0x1000>;
227 ranges = <0x2000000 0x0 0xa000 227 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
228 0x1000000 0x0 0x0000 228 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
229 pcie@0 { 229 pcie@0 {
230 ranges = <0x2000000 0x 230 ranges = <0x2000000 0x0 0xa0000000
231 0x2000000 0x 231 0x2000000 0x0 0xa0000000
232 0x0 0x200000 232 0x0 0x20000000
233 233
234 0x1000000 0x 234 0x1000000 0x0 0x0
235 0x1000000 0x 235 0x1000000 0x0 0x0
236 0x0 0x10000> 236 0x0 0x10000>;
237 }; 237 };
238 238
239 }; 239 };
240 240
241 pci2: pcie@ffe0a000 { 241 pci2: pcie@ffe0a000 {
242 reg = <0 0xffe0a000 0 0x1000>; 242 reg = <0 0xffe0a000 0 0x1000>;
243 ranges = <0x2000000 0x0 0xc000 243 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
244 0x1000000 0x0 0x0000 244 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
245 pcie@0 { 245 pcie@0 {
246 ranges = <0x2000000 0x 246 ranges = <0x2000000 0x0 0xc0000000
247 0x2000000 0x 247 0x2000000 0x0 0xc0000000
248 0x0 0x200000 248 0x0 0x20000000
249 249
250 0x1000000 0x 250 0x1000000 0x0 0x0
251 0x1000000 0x 251 0x1000000 0x0 0x0
252 0x0 0x10000> 252 0x0 0x10000>;
253 }; 253 };
254 }; 254 };
255 }; 255 };
256 256
257 /include/ "p2020si-post.dtsi" 257 /include/ "p2020si-post.dtsi"
258 258
259 / { 259 / {
260 soc@ffe00000 { 260 soc@ffe00000 {
261 serial@4600 { 261 serial@4600 {
262 status = "disabled"; 262 status = "disabled";
263 }; 263 };
264 264
265 i2c@3100 { 265 i2c@3100 {
266 status = "disabled"; 266 status = "disabled";
267 }; 267 };
268 268
269 sdhc@2e000 { 269 sdhc@2e000 {
270 compatible = "fsl,p202 270 compatible = "fsl,p2020-esdhc", "fsl,esdhc";
271 non-removable; 271 non-removable;
272 }; 272 };
273 273
274 }; 274 };
275 275
276 }; 276 };
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