1 /* 1 /*
2 * P1010 RDB Device Tree Source stub (no addre 2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that t 7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must r 8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and t 9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must r 10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and t 11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials 12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semicon 13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used 14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without sp 15 * derived from this software without specific prior written permission.
16 * 16 *
17 * 17 *
18 * ALTERNATIVELY, this software may be distrib 18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as publi 19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that Licens 20 * Foundation, either version 2 of that License or (at your option) any
21 * later version. 21 * later version.
22 * 22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semi 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS F 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35 memory { 35 memory {
36 device_type = "memory"; 36 device_type = "memory";
37 }; 37 };
38 38
39 board_ifc: ifc: memory-controller@fffe1e000 { 39 board_ifc: ifc: memory-controller@fffe1e000 {
40 /* NOR, NAND Flashes and CPLD on board 40 /* NOR, NAND Flashes and CPLD on board */
41 ranges = <0x0 0x0 0xf 0xee000000 0x020 41 ranges = <0x0 0x0 0xf 0xee000000 0x02000000
42 0x1 0x0 0xf 0xff800000 0x000 42 0x1 0x0 0xf 0xff800000 0x00010000
43 0x3 0x0 0xf 0xffb00000 0x000 43 0x3 0x0 0xf 0xffb00000 0x00000020>;
44 reg = <0xf 0xffe1e000 0 0x2000>; 44 reg = <0xf 0xffe1e000 0 0x2000>;
45 }; 45 };
46 46
47 board_soc: soc: soc@fffe00000 { 47 board_soc: soc: soc@fffe00000 {
48 ranges = <0x0 0xf 0xffe00000 0x100000> 48 ranges = <0x0 0xf 0xffe00000 0x100000>;
49 }; 49 };
50 50
51 pci0: pcie@fffe09000 { 51 pci0: pcie@fffe09000 {
52 reg = <0xf 0xffe09000 0 0x1000>; 52 reg = <0xf 0xffe09000 0 0x1000>;
53 ranges = <0x2000000 0x0 0xc0000000 0xc 53 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0xf 54 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
55 pcie@0 { 55 pcie@0 {
56 ranges = <0x2000000 0x0 0xc000 56 ranges = <0x2000000 0x0 0xc0000000
57 0x2000000 0x0 0xc000 57 0x2000000 0x0 0xc0000000
58 0x0 0x20000000 58 0x0 0x20000000
59 59
60 0x1000000 0x0 0x0 60 0x1000000 0x0 0x0
61 0x1000000 0x0 0x0 61 0x1000000 0x0 0x0
62 0x0 0x100000>; 62 0x0 0x100000>;
63 }; 63 };
64 }; 64 };
65 65
66 pci1: pcie@fffe0a000 { 66 pci1: pcie@fffe0a000 {
67 reg = <0xf 0xffe0a000 0 0x1000>; 67 reg = <0xf 0xffe0a000 0 0x1000>;
68 ranges = <0x2000000 0x0 0xc0000000 0xc 68 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
69 0x1000000 0x0 0x00000000 0xf 69 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
70 pcie@0 { 70 pcie@0 {
71 ranges = <0x2000000 0x0 0xc000 71 ranges = <0x2000000 0x0 0xc0000000
72 0x2000000 0x0 0xc000 72 0x2000000 0x0 0xc0000000
73 0x0 0x20000000 73 0x0 0x20000000
74 74
75 0x1000000 0x0 0x0 75 0x1000000 0x0 0x0
76 0x1000000 0x0 0x0 76 0x1000000 0x0 0x0
77 0x0 0x100000>; 77 0x0 0x100000>;
78 }; 78 };
79 }; 79 };
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