1 /* 1 /*
2 * P1021 RDB Device Tree Source 2 * P1021 RDB Device Tree Source
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that t 7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must r 8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and t 9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must r 10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and t 11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials 12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semicon 13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used 14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without sp 15 * derived from this software without specific prior written permission.
16 * 16 *
17 * 17 *
18 * ALTERNATIVELY, this software may be distrib 18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as publi 19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that Licens 20 * Foundation, either version 2 of that License or (at your option) any
21 * later version. 21 * later version.
22 * 22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semi 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS F 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35 /include/ "p1021si-pre.dtsi" 35 /include/ "p1021si-pre.dtsi"
36 / { 36 / {
37 model = "fsl,P1021RDB"; 37 model = "fsl,P1021RDB";
38 compatible = "fsl,P1021RDB-PC"; 38 compatible = "fsl,P1021RDB-PC";
39 39
40 memory { 40 memory {
41 device_type = "memory"; 41 device_type = "memory";
42 }; 42 };
43 43
44 lbc: localbus@ffe05000 { 44 lbc: localbus@ffe05000 {
45 reg = <0 0xffe05000 0 0x1000>; 45 reg = <0 0xffe05000 0 0x1000>;
46 46
47 /* NOR, NAND Flashes and Vites 47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
48 ranges = <0x0 0x0 0x0 0xef0000 48 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
49 0x1 0x0 0x0 0xff8000 49 0x1 0x0 0x0 0xff800000 0x00040000
50 0x2 0x0 0x0 0xffb000 50 0x2 0x0 0x0 0xffb00000 0x00020000>;
51 }; 51 };
52 52
53 soc: soc@ffe00000 { 53 soc: soc@ffe00000 {
54 ranges = <0x0 0x0 0xffe00000 0 54 ranges = <0x0 0x0 0xffe00000 0x100000>;
55 }; 55 };
56 56
57 pci0: pcie@ffe09000 { 57 pci0: pcie@ffe09000 {
58 ranges = <0x2000000 0x0 0xa000 58 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
59 0x1000000 0x0 0x0000 59 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
60 reg = <0 0xffe09000 0 0x1000>; 60 reg = <0 0xffe09000 0 0x1000>;
61 pcie@0 { 61 pcie@0 {
62 ranges = <0x2000000 0x 62 ranges = <0x2000000 0x0 0xa0000000
63 0x2000000 0x 63 0x2000000 0x0 0xa0000000
64 0x0 0x200000 64 0x0 0x20000000
65 65
66 0x1000000 0x 66 0x1000000 0x0 0x0
67 0x1000000 0x 67 0x1000000 0x0 0x0
68 0x0 0x100000 68 0x0 0x100000>;
69 }; 69 };
70 }; 70 };
71 71
72 pci1: pcie@ffe0a000 { 72 pci1: pcie@ffe0a000 {
73 reg = <0 0xffe0a000 0 0x1000>; 73 reg = <0 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0x8000 74 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
75 0x1000000 0x0 0x0000 75 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
76 pcie@0 { 76 pcie@0 {
77 ranges = <0x2000000 0x 77 ranges = <0x2000000 0x0 0x80000000
78 0x2000000 0x 78 0x2000000 0x0 0x80000000
79 0x0 0x200000 79 0x0 0x20000000
80 80
81 0x1000000 0x 81 0x1000000 0x0 0x0
82 0x1000000 0x 82 0x1000000 0x0 0x0
83 0x0 0x100000 83 0x0 0x100000>;
84 }; 84 };
85 }; 85 };
86 86
87 qe: qe@ffe80000 { 87 qe: qe@ffe80000 {
88 ranges = <0x0 0x0 0xffe80000 0 88 ranges = <0x0 0x0 0xffe80000 0x40000>;
89 reg = <0 0xffe80000 0 0x480>; 89 reg = <0 0xffe80000 0 0x480>;
90 brg-frequency = <0>; 90 brg-frequency = <0>;
91 bus-frequency = <0>; 91 bus-frequency = <0>;
92 }; 92 };
93 }; 93 };
94 94
95 /include/ "p1021rdb-pc.dtsi" 95 /include/ "p1021rdb-pc.dtsi"
96 /include/ "p1021si-post.dtsi" 96 /include/ "p1021si-post.dtsi"
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