1 /*
2 * P1023 RDB Device Tree Source
3 *
4 * Copyright 2013 - 2014 Freescale Semiconduct
5 *
6 * Author: Chunhe Lan <Chunhe.Lan@freescale.com
7 *
8 * Redistribution and use in source and binary
9 * modification, are permitted provided that t
10 * * Redistributions of source code must r
11 * notice, this list of conditions and t
12 * * Redistributions in binary form must r
13 * notice, this list of conditions and t
14 * documentation and/or other materials
15 * * Neither the name of Freescale Semicon
16 * names of its contributors may be used
17 * derived from this software without sp
18 *
19 *
20 * ALTERNATIVELY, this software may be distrib
21 * GNU General Public License ("GPL") as publi
22 * Foundation, either version 2 of that Licens
23 * later version.
24 *
25 * THIS SOFTWARE IS PROVIDED BY Freescale Semi
26 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B
27 * WARRANTIES OF MERCHANTABILITY AND FITNESS F
28 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem
29 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
31 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT
35 */
36
37 /include/ "p1023si-pre.dtsi"
38
39 / {
40 model = "fsl,P1023";
41 compatible = "fsl,P1023RDB";
42 #address-cells = <2>;
43 #size-cells = <2>;
44 interrupt-parent = <&mpic>;
45
46 memory {
47 device_type = "memory";
48 };
49
50 reserved-memory {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 ranges;
54
55 bman_fbpr: bman-fbpr {
56 size = <0 0x1000000>;
57 alignment = <0 0x10000
58 };
59 qman_fqd: qman-fqd {
60 size = <0 0x400000>;
61 alignment = <0 0x40000
62 };
63 qman_pfdr: qman-pfdr {
64 size = <0 0x2000000>;
65 alignment = <0 0x20000
66 };
67 };
68
69 qportals: qman-portals@ff000000 {
70 ranges = <0x0 0xf 0xff000000 0
71 };
72
73 bportals: bman-portals@ff200000 {
74 ranges = <0x0 0xf 0xff200000 0
75 };
76
77 soc: soc@ff600000 {
78 ranges = <0x0 0x0 0xff600000 0
79
80 i2c@3000 {
81 eeprom@53 {
82 compatible = "
83 reg = <0x53>;
84 };
85
86 rtc@6f {
87 compatible = "
88 reg = <0x6f>;
89 };
90 };
91
92 usb@22000 {
93 dr_mode = "host";
94 phy_type = "ulpi";
95 };
96 };
97
98 lbc: localbus@ff605000 {
99 reg = <0 0xff605000 0 0x1000>;
100
101 /* NOR, NAND Flashes */
102 ranges = <0x0 0x0 0x0 0xec0000
103 0x1 0x0 0x0 0xffa000
104
105 nor@0,0 {
106 #address-cells = <1>;
107 #size-cells = <1>;
108 compatible = "cfi-flas
109 reg = <0x0 0x0 0x04000
110 bank-width = <2>;
111 device-width = <1>;
112
113 partition@0 {
114 /* 48MB for Ro
115 reg = <0x00000
116 label = "NOR R
117 };
118
119 partition@3000000 {
120 /* 1MB for DTB
121 reg = <0x03000
122 label = "NOR D
123 };
124
125 partition@3100000 {
126 /* 14MB for Li
127 reg = <0x03100
128 label = "NOR L
129 };
130
131 partition@3f00000 {
132 /* This locati
133 /* 512KB for u
134 /* 512KB for u
135 reg = <0x03f00
136 label = "NOR U
137 read-only;
138 };
139 };
140
141 nand@1,0 {
142 #address-cells = <1>;
143 #size-cells = <1>;
144 compatible = "fsl,elbc
145 reg = <0x1 0x0 0x40000
146
147 partition@0 {
148 /* This locati
149 /* 1MB for u-b
150 reg = <0x0 0x0
151 label = "NAND
152 read-only;
153 };
154
155 partition@100000 {
156 /* 1MB for DTB
157 reg = <0x00100
158 label = "NAND
159 };
160
161 partition@200000 {
162 /* 14MB for Li
163 reg = <0x00200
164 label = "NAND
165 };
166
167 partition@1000000 {
168 /* 96MB for Ro
169 reg = <0x01000
170 label = "NAND
171 };
172
173 partition@7000000 {
174 /* 16MB for Us
175 reg = <0x07000
176 label = "NAND
177 };
178 };
179 };
180
181 pci0: pcie@ff60a000 {
182 reg = <0 0xff60a000 0 0x1000>;
183 ranges = <0x2000000 0x0 0xc000
184 0x1000000 0x0 0x0000
185 pcie@0 {
186 /* IRQ[0:3] are pulled
187 interrupt-map-mask = <
188 interrupt-map = <
189 /* IDSEL 0x0 *
190 0000 0 0 1 &mp
191 0000 0 0 2 &mp
192 0000 0 0 3 &mp
193 0000 0 0 4 &mp
194 >;
195 ranges = <0x2000000 0x
196 0x2000000 0x
197 0x0 0x200000
198
199 0x1000000 0x
200 0x1000000 0x
201 0x0 0x100000
202 };
203 };
204
205 board_pci1: pci1: pcie@ff609000 {
206 reg = <0 0xff609000 0 0x1000>;
207 ranges = <0x2000000 0x0 0xa000
208 0x1000000 0x0 0x0000
209 pcie@0 {
210 /*
211 * IRQ[4:6] only for P
212 * IRQ[7] is pulled up
213 */
214 interrupt-map-mask = <
215 interrupt-map = <
216 /* IDSEL 0x0 *
217 0000 0 0 1 &mp
218 0000 0 0 2 &mp
219 0000 0 0 3 &mp
220 0000 0 0 4 &mp
221 >;
222 ranges = <0x2000000 0x
223 0x2000000 0x
224 0x0 0x200000
225
226 0x1000000 0x
227 0x1000000 0x
228 0x0 0x100000
229 };
230 };
231
232 pci2: pcie@ff60b000 {
233 reg = <0 0xff60b000 0 0x1000>;
234 ranges = <0x2000000 0x0 0x8000
235 0x1000000 0x0 0x0000
236 pcie@0 {
237 /*
238 * IRQ[8:10] are pulle
239 * IRQ[11] only for PC
240 */
241 interrupt-map-mask = <
242 interrupt-map = <
243 /* IDSEL 0x0 *
244 0000 0 0 1 &mp
245 0000 0 0 2 &mp
246 0000 0 0 3 &mp
247 0000 0 0 4 &mp
248 >;
249 ranges = <0x2000000 0x
250 0x2000000 0x
251 0x0 0x200000
252
253 0x1000000 0x
254 0x1000000 0x
255 0x0 0x100000
256 };
257 };
258 };
259
260 /include/ "p1023si-post.dtsi"
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