1 /* 1 /*
2 * P5040 Silicon/SoC Device Tree Source (post 2 * P5040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 - 2015 Freescale Semiconduct 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that t 7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must r 8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and t 9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must r 10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and t 11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials 12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semicon 13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used 14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without sp 15 * derived from this software without specific prior written permission.
16 * 16 *
17 * 17 *
18 * ALTERNATIVELY, this software may be distrib 18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as publi 19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that Licens 20 * Foundation, either version 2 of that License or (at your option) any
21 * later version. 21 * later version.
22 * 22 *
23 * This software is provided by Freescale Semi 23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, b 24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness f 25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Sem 26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exem 27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement 28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business 29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in cont 30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising 31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibilit 32 * software, even if advised of the possibility of such damage.
33 */ 33 */
34 34
35 &bman_fbpr { 35 &bman_fbpr {
36 compatible = "fsl,bman-fbpr"; 36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>; 37 alloc-ranges = <0 0 0x10000 0>;
38 }; 38 };
39 39
40 &qman_fqd { 40 &qman_fqd {
41 compatible = "fsl,qman-fqd"; 41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>;
43 }; 43 };
44 44
45 &qman_pfdr { 45 &qman_pfdr {
46 compatible = "fsl,qman-pfdr"; 46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>;
48 }; 48 };
49 49
50 &lbc { 50 &lbc {
51 compatible = "fsl,p5040-elbc", "fsl,el 51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
52 interrupts = <25 2 0 0>; 52 interrupts = <25 2 0 0>;
53 #address-cells = <2>; 53 #address-cells = <2>;
54 #size-cells = <1>; 54 #size-cells = <1>;
55 }; 55 };
56 56
57 /* controller at 0x200000 */ 57 /* controller at 0x200000 */
58 &pci0 { 58 &pci0 {
59 compatible = "fsl,p5040-pcie", "fsl,qo 59 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
60 device_type = "pci"; 60 device_type = "pci";
61 #size-cells = <2>; 61 #size-cells = <2>;
62 #address-cells = <3>; 62 #address-cells = <3>;
63 bus-range = <0x0 0xff>; 63 bus-range = <0x0 0xff>;
64 clock-frequency = <33333333>; 64 clock-frequency = <33333333>;
65 interrupts = <16 2 1 15>; 65 interrupts = <16 2 1 15>;
66 fsl,iommu-parent = <&pamu0>; 66 fsl,iommu-parent = <&pamu0>;
67 pcie@0 { 67 pcie@0 {
68 reg = <0 0 0 0 0>; 68 reg = <0 0 0 0 0>;
69 #interrupt-cells = <1>; 69 #interrupt-cells = <1>;
70 #size-cells = <2>; 70 #size-cells = <2>;
71 #address-cells = <3>; 71 #address-cells = <3>;
72 device_type = "pci"; 72 device_type = "pci";
73 interrupts = <16 2 1 15>; 73 interrupts = <16 2 1 15>;
74 interrupt-map-mask = <0xf800 0 74 interrupt-map-mask = <0xf800 0 0 7>;
75 interrupt-map = < 75 interrupt-map = <
76 /* IDSEL 0x0 */ 76 /* IDSEL 0x0 */
77 0000 0 0 1 &mpic 40 1 77 0000 0 0 1 &mpic 40 1 0 0
78 0000 0 0 2 &mpic 1 1 0 78 0000 0 0 2 &mpic 1 1 0 0
79 0000 0 0 3 &mpic 2 1 0 79 0000 0 0 3 &mpic 2 1 0 0
80 0000 0 0 4 &mpic 3 1 0 80 0000 0 0 4 &mpic 3 1 0 0
81 >; 81 >;
82 }; 82 };
83 }; 83 };
84 84
85 /* controller at 0x201000 */ 85 /* controller at 0x201000 */
86 &pci1 { 86 &pci1 {
87 compatible = "fsl,p5040-pcie", "fsl,qo 87 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
88 device_type = "pci"; 88 device_type = "pci";
89 #size-cells = <2>; 89 #size-cells = <2>;
90 #address-cells = <3>; 90 #address-cells = <3>;
91 bus-range = <0 0xff>; 91 bus-range = <0 0xff>;
92 clock-frequency = <33333333>; 92 clock-frequency = <33333333>;
93 interrupts = <16 2 1 14>; 93 interrupts = <16 2 1 14>;
94 fsl,iommu-parent = <&pamu0>; 94 fsl,iommu-parent = <&pamu0>;
95 pcie@0 { 95 pcie@0 {
96 reg = <0 0 0 0 0>; 96 reg = <0 0 0 0 0>;
97 #interrupt-cells = <1>; 97 #interrupt-cells = <1>;
98 #size-cells = <2>; 98 #size-cells = <2>;
99 #address-cells = <3>; 99 #address-cells = <3>;
100 device_type = "pci"; 100 device_type = "pci";
101 interrupts = <16 2 1 14>; 101 interrupts = <16 2 1 14>;
102 interrupt-map-mask = <0xf800 0 102 interrupt-map-mask = <0xf800 0 0 7>;
103 interrupt-map = < 103 interrupt-map = <
104 /* IDSEL 0x0 */ 104 /* IDSEL 0x0 */
105 0000 0 0 1 &mpic 41 1 105 0000 0 0 1 &mpic 41 1 0 0
106 0000 0 0 2 &mpic 5 1 0 106 0000 0 0 2 &mpic 5 1 0 0
107 0000 0 0 3 &mpic 6 1 0 107 0000 0 0 3 &mpic 6 1 0 0
108 0000 0 0 4 &mpic 7 1 0 108 0000 0 0 4 &mpic 7 1 0 0
109 >; 109 >;
110 }; 110 };
111 }; 111 };
112 112
113 /* controller at 0x202000 */ 113 /* controller at 0x202000 */
114 &pci2 { 114 &pci2 {
115 compatible = "fsl,p5040-pcie", "fsl,qo 115 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
116 device_type = "pci"; 116 device_type = "pci";
117 #size-cells = <2>; 117 #size-cells = <2>;
118 #address-cells = <3>; 118 #address-cells = <3>;
119 bus-range = <0x0 0xff>; 119 bus-range = <0x0 0xff>;
120 clock-frequency = <33333333>; 120 clock-frequency = <33333333>;
121 interrupts = <16 2 1 13>; 121 interrupts = <16 2 1 13>;
122 fsl,iommu-parent = <&pamu0>; 122 fsl,iommu-parent = <&pamu0>;
123 pcie@0 { 123 pcie@0 {
124 reg = <0 0 0 0 0>; 124 reg = <0 0 0 0 0>;
125 #interrupt-cells = <1>; 125 #interrupt-cells = <1>;
126 #size-cells = <2>; 126 #size-cells = <2>;
127 #address-cells = <3>; 127 #address-cells = <3>;
128 device_type = "pci"; 128 device_type = "pci";
129 interrupts = <16 2 1 13>; 129 interrupts = <16 2 1 13>;
130 interrupt-map-mask = <0xf800 0 130 interrupt-map-mask = <0xf800 0 0 7>;
131 interrupt-map = < 131 interrupt-map = <
132 /* IDSEL 0x0 */ 132 /* IDSEL 0x0 */
133 0000 0 0 1 &mpic 42 1 133 0000 0 0 1 &mpic 42 1 0 0
134 0000 0 0 2 &mpic 9 1 0 134 0000 0 0 2 &mpic 9 1 0 0
135 0000 0 0 3 &mpic 10 1 135 0000 0 0 3 &mpic 10 1 0 0
136 0000 0 0 4 &mpic 11 1 136 0000 0 0 4 &mpic 11 1 0 0
137 >; 137 >;
138 }; 138 };
139 }; 139 };
140 140
141 &dcsr { 141 &dcsr {
142 #address-cells = <1>; 142 #address-cells = <1>;
143 #size-cells = <1>; 143 #size-cells = <1>;
144 compatible = "fsl,dcsr", "simple-bus"; 144 compatible = "fsl,dcsr", "simple-bus";
145 145
146 dcsr-epu@0 { 146 dcsr-epu@0 {
147 compatible = "fsl,p5040-dcsr-e 147 compatible = "fsl,p5040-dcsr-epu", "fsl,dcsr-epu";
148 interrupts = <52 2 0 0 148 interrupts = <52 2 0 0
149 84 2 0 0 149 84 2 0 0
150 85 2 0 0>; 150 85 2 0 0>;
151 reg = <0x0 0x1000>; 151 reg = <0x0 0x1000>;
152 }; 152 };
153 dcsr-npc { 153 dcsr-npc {
154 compatible = "fsl,dcsr-npc"; 154 compatible = "fsl,dcsr-npc";
155 reg = <0x1000 0x1000 0x1000000 155 reg = <0x1000 0x1000 0x1000000 0x8000>;
156 }; 156 };
157 dcsr-nxc@2000 { 157 dcsr-nxc@2000 {
158 compatible = "fsl,dcsr-nxc"; 158 compatible = "fsl,dcsr-nxc";
159 reg = <0x2000 0x1000>; 159 reg = <0x2000 0x1000>;
160 }; 160 };
161 dcsr-corenet { 161 dcsr-corenet {
162 compatible = "fsl,dcsr-corenet 162 compatible = "fsl,dcsr-corenet";
163 reg = <0x8000 0x1000 0xB0000 0 163 reg = <0x8000 0x1000 0xB0000 0x1000>;
164 }; 164 };
165 dcsr-dpaa@9000 { 165 dcsr-dpaa@9000 {
166 compatible = "fsl,p5040-dcsr-d 166 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
167 reg = <0x9000 0x1000>; 167 reg = <0x9000 0x1000>;
168 }; 168 };
169 dcsr-ocn@11000 { 169 dcsr-ocn@11000 {
170 compatible = "fsl,p5040-dcsr-o 170 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
171 reg = <0x11000 0x1000>; 171 reg = <0x11000 0x1000>;
172 }; 172 };
173 dcsr-ddr@12000 { 173 dcsr-ddr@12000 {
174 compatible = "fsl,dcsr-ddr"; 174 compatible = "fsl,dcsr-ddr";
175 dev-handle = <&ddr1>; 175 dev-handle = <&ddr1>;
176 reg = <0x12000 0x1000>; 176 reg = <0x12000 0x1000>;
177 }; 177 };
178 dcsr-ddr@13000 { 178 dcsr-ddr@13000 {
179 compatible = "fsl,dcsr-ddr"; 179 compatible = "fsl,dcsr-ddr";
180 dev-handle = <&ddr2>; 180 dev-handle = <&ddr2>;
181 reg = <0x13000 0x1000>; 181 reg = <0x13000 0x1000>;
182 }; 182 };
183 dcsr-nal@18000 { 183 dcsr-nal@18000 {
184 compatible = "fsl,p5040-dcsr-n 184 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
185 reg = <0x18000 0x1000>; 185 reg = <0x18000 0x1000>;
186 }; 186 };
187 dcsr-rcpm@22000 { 187 dcsr-rcpm@22000 {
188 compatible = "fsl,p5040-dcsr-r 188 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
189 reg = <0x22000 0x1000>; 189 reg = <0x22000 0x1000>;
190 }; 190 };
191 dcsr-cpu-sb-proxy@40000 { 191 dcsr-cpu-sb-proxy@40000 {
192 compatible = "fsl,dcsr-e5500-s 192 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
193 cpu-handle = <&cpu0>; 193 cpu-handle = <&cpu0>;
194 reg = <0x40000 0x1000>; 194 reg = <0x40000 0x1000>;
195 }; 195 };
196 dcsr-cpu-sb-proxy@41000 { 196 dcsr-cpu-sb-proxy@41000 {
197 compatible = "fsl,dcsr-e5500-s 197 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
198 cpu-handle = <&cpu1>; 198 cpu-handle = <&cpu1>;
199 reg = <0x41000 0x1000>; 199 reg = <0x41000 0x1000>;
200 }; 200 };
201 dcsr-cpu-sb-proxy@42000 { 201 dcsr-cpu-sb-proxy@42000 {
202 compatible = "fsl,dcsr-e5500-s 202 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
203 cpu-handle = <&cpu2>; 203 cpu-handle = <&cpu2>;
204 reg = <0x42000 0x1000>; 204 reg = <0x42000 0x1000>;
205 }; 205 };
206 dcsr-cpu-sb-proxy@43000 { 206 dcsr-cpu-sb-proxy@43000 {
207 compatible = "fsl,dcsr-e5500-s 207 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
208 cpu-handle = <&cpu3>; 208 cpu-handle = <&cpu3>;
209 reg = <0x43000 0x1000>; 209 reg = <0x43000 0x1000>;
210 }; 210 };
211 }; 211 };
212 212
213 /include/ "qoriq-bman1-portals.dtsi" 213 /include/ "qoriq-bman1-portals.dtsi"
214 214
215 /include/ "qoriq-qman1-portals.dtsi" 215 /include/ "qoriq-qman1-portals.dtsi"
216 216
217 &soc { 217 &soc {
218 #address-cells = <1>; 218 #address-cells = <1>;
219 #size-cells = <1>; 219 #size-cells = <1>;
220 device_type = "soc"; 220 device_type = "soc";
221 compatible = "simple-bus"; 221 compatible = "simple-bus";
222 222
223 soc-sram-error { 223 soc-sram-error {
224 compatible = "fsl,soc-sram-err 224 compatible = "fsl,soc-sram-error";
225 interrupts = <16 2 1 29>; 225 interrupts = <16 2 1 29>;
226 }; 226 };
227 227
228 corenet-law@0 { 228 corenet-law@0 {
229 compatible = "fsl,corenet-law" 229 compatible = "fsl,corenet-law";
230 reg = <0x0 0x1000>; 230 reg = <0x0 0x1000>;
231 fsl,num-laws = <32>; 231 fsl,num-laws = <32>;
232 }; 232 };
233 233
234 ddr1: memory-controller@8000 { 234 ddr1: memory-controller@8000 {
235 compatible = "fsl,qoriq-memory 235 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
236 reg = <0x8000 0x1000>; 236 reg = <0x8000 0x1000>;
237 interrupts = <16 2 1 23>; 237 interrupts = <16 2 1 23>;
238 }; 238 };
239 239
240 ddr2: memory-controller@9000 { 240 ddr2: memory-controller@9000 {
241 compatible = "fsl,qoriq-memory 241 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
242 reg = <0x9000 0x1000>; 242 reg = <0x9000 0x1000>;
243 interrupts = <16 2 1 22>; 243 interrupts = <16 2 1 22>;
244 }; 244 };
245 245
246 cpc: l3-cache-controller@10000 { 246 cpc: l3-cache-controller@10000 {
247 compatible = "fsl,p5040-l3-cac 247 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
248 reg = <0x10000 0x1000 248 reg = <0x10000 0x1000
249 0x11000 0x1000>; 249 0x11000 0x1000>;
250 interrupts = <16 2 1 27 250 interrupts = <16 2 1 27
251 16 2 1 26>; 251 16 2 1 26>;
252 }; 252 };
253 253
254 corenet-cf@18000 { 254 corenet-cf@18000 {
255 compatible = "fsl,corenet1-cf" 255 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
256 reg = <0x18000 0x1000>; 256 reg = <0x18000 0x1000>;
257 interrupts = <16 2 1 31>; 257 interrupts = <16 2 1 31>;
258 fsl,ccf-num-csdids = <32>; 258 fsl,ccf-num-csdids = <32>;
259 fsl,ccf-num-snoopids = <32>; 259 fsl,ccf-num-snoopids = <32>;
260 }; 260 };
261 261
262 iommu@20000 { 262 iommu@20000 {
263 compatible = "fsl,pamu-v1.0", 263 compatible = "fsl,pamu-v1.0", "fsl,pamu";
264 reg = <0x20000 0x5000>; /* for 264 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
265 ranges = <0 0x20000 0x5000>; 265 ranges = <0 0x20000 0x5000>;
266 #address-cells = <1>; 266 #address-cells = <1>;
267 #size-cells = <1>; 267 #size-cells = <1>;
268 interrupts = <24 2 0 0 268 interrupts = <24 2 0 0
269 16 2 1 30>; 269 16 2 1 30>;
270 fsl,portid-mapping = <0x0f8000 270 fsl,portid-mapping = <0x0f800000>;
271 271
272 pamu0: pamu@0 { 272 pamu0: pamu@0 {
273 reg = <0 0x1000>; 273 reg = <0 0x1000>;
274 fsl,primary-cache-geom 274 fsl,primary-cache-geometry = <32 1>;
275 fsl,secondary-cache-ge 275 fsl,secondary-cache-geometry = <128 2>;
276 }; 276 };
277 277
278 pamu1: pamu@1000 { 278 pamu1: pamu@1000 {
279 reg = <0x1000 0x1000>; 279 reg = <0x1000 0x1000>;
280 fsl,primary-cache-geom 280 fsl,primary-cache-geometry = <32 1>;
281 fsl,secondary-cache-ge 281 fsl,secondary-cache-geometry = <128 2>;
282 }; 282 };
283 283
284 pamu2: pamu@2000 { 284 pamu2: pamu@2000 {
285 reg = <0x2000 0x1000>; 285 reg = <0x2000 0x1000>;
286 fsl,primary-cache-geom 286 fsl,primary-cache-geometry = <32 1>;
287 fsl,secondary-cache-ge 287 fsl,secondary-cache-geometry = <128 2>;
288 }; 288 };
289 289
290 pamu3: pamu@3000 { 290 pamu3: pamu@3000 {
291 reg = <0x3000 0x1000>; 291 reg = <0x3000 0x1000>;
292 fsl,primary-cache-geom 292 fsl,primary-cache-geometry = <32 1>;
293 fsl,secondary-cache-ge 293 fsl,secondary-cache-geometry = <128 2>;
294 }; 294 };
295 295
296 pamu4: pamu@4000 { 296 pamu4: pamu@4000 {
297 reg = <0x4000 0x1000>; 297 reg = <0x4000 0x1000>;
298 fsl,primary-cache-geom 298 fsl,primary-cache-geometry = <32 1>;
299 fsl,secondary-cache-ge 299 fsl,secondary-cache-geometry = <128 2>;
300 }; 300 };
301 }; 301 };
302 302
303 /include/ "qoriq-mpic.dtsi" 303 /include/ "qoriq-mpic.dtsi"
304 304
305 guts: global-utilities@e0000 { 305 guts: global-utilities@e0000 {
306 compatible = "fsl,p5040-device 306 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
307 reg = <0xe0000 0xe00>; 307 reg = <0xe0000 0xe00>;
308 fsl,has-rstcr; 308 fsl,has-rstcr;
309 #sleep-cells = <1>; 309 #sleep-cells = <1>;
310 fsl,liodn-bits = <12>; 310 fsl,liodn-bits = <12>;
311 }; 311 };
312 312
313 pins: global-utilities@e0e00 { 313 pins: global-utilities@e0e00 {
314 compatible = "fsl,p5040-pin-co 314 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
315 reg = <0xe0e00 0x200>; 315 reg = <0xe0e00 0x200>;
316 #sleep-cells = <2>; 316 #sleep-cells = <2>;
317 }; 317 };
318 318
319 /include/ "qoriq-clockgen1.dtsi" 319 /include/ "qoriq-clockgen1.dtsi"
320 global-utilities@e1000 { 320 global-utilities@e1000 {
321 compatible = "fsl,p5040-clockg 321 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
322 }; 322 };
323 323
324 rcpm: global-utilities@e2000 { 324 rcpm: global-utilities@e2000 {
325 compatible = "fsl,p5040-rcpm", 325 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
326 reg = <0xe2000 0x1000>; 326 reg = <0xe2000 0x1000>;
327 #sleep-cells = <1>; 327 #sleep-cells = <1>;
328 }; 328 };
329 329
330 sfp: sfp@e8000 { 330 sfp: sfp@e8000 {
331 compatible = "fsl,p5040-sfp", 331 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
332 reg = <0xe8000 0x1000>; 332 reg = <0xe8000 0x1000>;
333 }; 333 };
334 334
335 serdes: serdes@ea000 { 335 serdes: serdes@ea000 {
336 compatible = "fsl,p5040-serdes 336 compatible = "fsl,p5040-serdes";
337 reg = <0xea000 0x1000>; 337 reg = <0xea000 0x1000>;
338 }; 338 };
339 339
340 /include/ "qoriq-dma-0.dtsi" 340 /include/ "qoriq-dma-0.dtsi"
341 dma@100300 { 341 dma@100300 {
342 fsl,iommu-parent = <&pamu0>; 342 fsl,iommu-parent = <&pamu0>;
343 fsl,liodn-reg = <&guts 0x580>; 343 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
344 }; 344 };
345 345
346 /include/ "qoriq-dma-1.dtsi" 346 /include/ "qoriq-dma-1.dtsi"
347 dma@101300 { 347 dma@101300 {
348 fsl,iommu-parent = <&pamu0>; 348 fsl,iommu-parent = <&pamu0>;
349 fsl,liodn-reg = <&guts 0x584>; 349 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
350 }; 350 };
351 351
352 /include/ "qoriq-espi-0.dtsi" 352 /include/ "qoriq-espi-0.dtsi"
353 spi@110000 { 353 spi@110000 {
354 fsl,espi-num-chipselects = <4> 354 fsl,espi-num-chipselects = <4>;
355 }; 355 };
356 356
357 /include/ "qoriq-esdhc-0.dtsi" 357 /include/ "qoriq-esdhc-0.dtsi"
358 sdhc@114000 { 358 sdhc@114000 {
359 compatible = "fsl,p5040-esdhc" 359 compatible = "fsl,p5040-esdhc", "fsl,esdhc";
360 fsl,iommu-parent = <&pamu2>; 360 fsl,iommu-parent = <&pamu2>;
361 fsl,liodn-reg = <&guts 0x530>; 361 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
362 sdhci,auto-cmd12; 362 sdhci,auto-cmd12;
363 }; 363 };
364 364
365 /include/ "qoriq-i2c-0.dtsi" 365 /include/ "qoriq-i2c-0.dtsi"
366 /include/ "qoriq-i2c-1.dtsi" 366 /include/ "qoriq-i2c-1.dtsi"
367 /include/ "qoriq-duart-0.dtsi" 367 /include/ "qoriq-duart-0.dtsi"
368 /include/ "qoriq-duart-1.dtsi" 368 /include/ "qoriq-duart-1.dtsi"
369 /include/ "qoriq-gpio-0.dtsi" 369 /include/ "qoriq-gpio-0.dtsi"
370 /include/ "qoriq-usb2-mph-0.dtsi" 370 /include/ "qoriq-usb2-mph-0.dtsi"
371 usb0: usb@210000 { 371 usb0: usb@210000 {
372 compatible = "fsl-usb2-mph-v1. 372 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
373 fsl,iommu-parent = <&pamu4>; 373 fsl,iommu-parent = <&pamu4>;
374 fsl,liodn-reg = <&guts 0x520>; 374 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
375 phy_type = "utmi"; 375 phy_type = "utmi";
376 port0; 376 port0;
377 }; 377 };
378 378
379 /include/ "qoriq-usb2-dr-0.dtsi" 379 /include/ "qoriq-usb2-dr-0.dtsi"
380 usb1: usb@211000 { 380 usb1: usb@211000 {
381 compatible = "fsl-usb2-dr-v1.6 381 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
382 fsl,iommu-parent = <&pamu4>; 382 fsl,iommu-parent = <&pamu4>;
383 fsl,liodn-reg = <&guts 0x524>; 383 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
384 dr_mode = "host"; 384 dr_mode = "host";
385 phy_type = "utmi"; 385 phy_type = "utmi";
386 }; 386 };
387 387
388 /include/ "qoriq-sata2-0.dtsi" 388 /include/ "qoriq-sata2-0.dtsi"
389 sata@220000 { 389 sata@220000 {
390 fsl,iommu-parent = <&pamu4>; 390 fsl,iommu-parent = <&pamu4>;
391 fsl,liodn-reg = <&guts 0x550>; 391 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
392 }; 392 };
393 393
394 /include/ "qoriq-sata2-1.dtsi" 394 /include/ "qoriq-sata2-1.dtsi"
395 sata@221000 { 395 sata@221000 {
396 fsl,iommu-parent = <&pamu4>; 396 fsl,iommu-parent = <&pamu4>;
397 fsl,liodn-reg = <&guts 0x554>; 397 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
398 }; 398 };
399 399
400 /include/ "qoriq-sec5.2-0.dtsi" 400 /include/ "qoriq-sec5.2-0.dtsi"
401 crypto@300000 { 401 crypto@300000 {
402 fsl,iommu-parent = <&pamu4>; 402 fsl,iommu-parent = <&pamu4>;
403 }; 403 };
404 404
405 /include/ "qoriq-raid1.0-0.dtsi" 405 /include/ "qoriq-raid1.0-0.dtsi"
406 /include/ "qoriq-qman1.dtsi" 406 /include/ "qoriq-qman1.dtsi"
407 /include/ "qoriq-bman1.dtsi" 407 /include/ "qoriq-bman1.dtsi"
408 408
409 /include/ "qoriq-fman-0.dtsi" 409 /include/ "qoriq-fman-0.dtsi"
410 /include/ "qoriq-fman-0-1g-0.dtsi" 410 /include/ "qoriq-fman-0-1g-0.dtsi"
411 /include/ "qoriq-fman-0-1g-1.dtsi" 411 /include/ "qoriq-fman-0-1g-1.dtsi"
412 /include/ "qoriq-fman-0-1g-2.dtsi" 412 /include/ "qoriq-fman-0-1g-2.dtsi"
413 /include/ "qoriq-fman-0-1g-3.dtsi" 413 /include/ "qoriq-fman-0-1g-3.dtsi"
414 /include/ "qoriq-fman-0-1g-4.dtsi" 414 /include/ "qoriq-fman-0-1g-4.dtsi"
415 /include/ "qoriq-fman-0-10g-0.dtsi" 415 /include/ "qoriq-fman-0-10g-0.dtsi"
416 fman@400000 { 416 fman@400000 {
417 enet0: ethernet@e0000 { 417 enet0: ethernet@e0000 {
418 }; 418 };
419 419
420 enet1: ethernet@e2000 { 420 enet1: ethernet@e2000 {
421 }; 421 };
422 422
423 enet2: ethernet@e4000 { 423 enet2: ethernet@e4000 {
424 }; 424 };
425 425
426 enet3: ethernet@e6000 { 426 enet3: ethernet@e6000 {
427 }; 427 };
428 428
429 enet4: ethernet@e8000 { 429 enet4: ethernet@e8000 {
430 }; 430 };
431 431
432 enet5: ethernet@f0000 { 432 enet5: ethernet@f0000 {
433 }; 433 };
434 }; 434 };
435 435
436 /include/ "qoriq-fman-1.dtsi" 436 /include/ "qoriq-fman-1.dtsi"
437 /include/ "qoriq-fman-1-1g-0.dtsi" 437 /include/ "qoriq-fman-1-1g-0.dtsi"
438 /include/ "qoriq-fman-1-1g-1.dtsi" 438 /include/ "qoriq-fman-1-1g-1.dtsi"
439 /include/ "qoriq-fman-1-1g-2.dtsi" 439 /include/ "qoriq-fman-1-1g-2.dtsi"
440 /include/ "qoriq-fman-1-1g-3.dtsi" 440 /include/ "qoriq-fman-1-1g-3.dtsi"
441 /include/ "qoriq-fman-1-1g-4.dtsi" 441 /include/ "qoriq-fman-1-1g-4.dtsi"
442 /include/ "qoriq-fman-1-10g-0.dtsi" 442 /include/ "qoriq-fman-1-10g-0.dtsi"
443 fman@500000 { 443 fman@500000 {
444 enet6: ethernet@e0000 { 444 enet6: ethernet@e0000 {
445 }; 445 };
446 446
447 enet7: ethernet@e2000 { 447 enet7: ethernet@e2000 {
448 }; 448 };
449 449
450 enet8: ethernet@e4000 { 450 enet8: ethernet@e4000 {
451 }; 451 };
452 452
453 enet9: ethernet@e6000 { 453 enet9: ethernet@e6000 {
454 }; 454 };
455 455
456 enet10: ethernet@e8000 { 456 enet10: ethernet@e8000 {
457 }; 457 };
458 458
459 enet11: ethernet@f0000 { 459 enet11: ethernet@f0000 {
460 }; 460 };
461 }; 461 };
462 }; 462 };
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