1 /* 1 /*
2 * QorIQ MPIC device tree stub [ controller @ 2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that t 7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must r 8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and t 9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must r 10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and t 11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials 12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semicon 13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used 14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without sp 15 * derived from this software without specific prior written permission.
16 * 16 *
17 * 17 *
18 * ALTERNATIVELY, this software may be distrib 18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as publi 19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that Licens 20 * Foundation, either version 2 of that License or (at your option) any
21 * later version. 21 * later version.
22 * 22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semi 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS F 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35 mpic: pic@40000 { 35 mpic: pic@40000 {
36 interrupt-controller; 36 interrupt-controller;
37 #address-cells = <0>; 37 #address-cells = <0>;
38 #interrupt-cells = <4>; 38 #interrupt-cells = <4>;
39 reg = <0x40000 0x40000>; 39 reg = <0x40000 0x40000>;
40 compatible = "fsl,mpic"; 40 compatible = "fsl,mpic";
41 device_type = "open-pic"; 41 device_type = "open-pic";
42 clock-frequency = <0x0>; 42 clock-frequency = <0x0>;
43 }; 43 };
44 44
45 timer@41100 { 45 timer@41100 {
46 compatible = "fsl,mpic-global-timer"; 46 compatible = "fsl,mpic-global-timer";
47 reg = <0x41100 0x100 0x41300 4>; 47 reg = <0x41100 0x100 0x41300 4>;
48 interrupts = <0 0 3 0 48 interrupts = <0 0 3 0
49 1 0 3 0 49 1 0 3 0
50 2 0 3 0 50 2 0 3 0
51 3 0 3 0>; 51 3 0 3 0>;
52 }; 52 };
53 53
54 msi0: msi@41600 { 54 msi0: msi@41600 {
55 compatible = "fsl,mpic-msi-v4.3"; 55 compatible = "fsl,mpic-msi-v4.3";
56 reg = <0x41600 0x200 0x44148 4>; 56 reg = <0x41600 0x200 0x44148 4>;
57 interrupts = < 57 interrupts = <
58 0xe0 0 0 0 58 0xe0 0 0 0
59 0xe1 0 0 0 59 0xe1 0 0 0
60 0xe2 0 0 0 60 0xe2 0 0 0
61 0xe3 0 0 0 61 0xe3 0 0 0
62 0xe4 0 0 0 62 0xe4 0 0 0
63 0xe5 0 0 0 63 0xe5 0 0 0
64 0xe6 0 0 0 64 0xe6 0 0 0
65 0xe7 0 0 0 65 0xe7 0 0 0
66 0x100 0 0 0 66 0x100 0 0 0
67 0x101 0 0 0 67 0x101 0 0 0
68 0x102 0 0 0 68 0x102 0 0 0
69 0x103 0 0 0 69 0x103 0 0 0
70 0x104 0 0 0 70 0x104 0 0 0
71 0x105 0 0 0 71 0x105 0 0 0
72 0x106 0 0 0 72 0x106 0 0 0
73 0x107 0 0 0>; 73 0x107 0 0 0>;
74 }; 74 };
75 75
76 msi1: msi@41800 { 76 msi1: msi@41800 {
77 compatible = "fsl,mpic-msi-v4.3"; 77 compatible = "fsl,mpic-msi-v4.3";
78 reg = <0x41800 0x200 0x45148 4>; 78 reg = <0x41800 0x200 0x45148 4>;
79 interrupts = < 79 interrupts = <
80 0xe8 0 0 0 80 0xe8 0 0 0
81 0xe9 0 0 0 81 0xe9 0 0 0
82 0xea 0 0 0 82 0xea 0 0 0
83 0xeb 0 0 0 83 0xeb 0 0 0
84 0xec 0 0 0 84 0xec 0 0 0
85 0xed 0 0 0 85 0xed 0 0 0
86 0xee 0 0 0 86 0xee 0 0 0
87 0xef 0 0 0 87 0xef 0 0 0
88 0x108 0 0 0 88 0x108 0 0 0
89 0x109 0 0 0 89 0x109 0 0 0
90 0x10a 0 0 0 90 0x10a 0 0 0
91 0x10b 0 0 0 91 0x10b 0 0 0
92 0x10c 0 0 0 92 0x10c 0 0 0
93 0x10d 0 0 0 93 0x10d 0 0 0
94 0x10e 0 0 0 94 0x10e 0 0 0
95 0x10f 0 0 0>; 95 0x10f 0 0 0>;
96 }; 96 };
97 97
98 msi2: msi@41a00 { 98 msi2: msi@41a00 {
99 compatible = "fsl,mpic-msi-v4.3"; 99 compatible = "fsl,mpic-msi-v4.3";
100 reg = <0x41a00 0x200 0x46148 4>; 100 reg = <0x41a00 0x200 0x46148 4>;
101 interrupts = < 101 interrupts = <
102 0xf0 0 0 0 102 0xf0 0 0 0
103 0xf1 0 0 0 103 0xf1 0 0 0
104 0xf2 0 0 0 104 0xf2 0 0 0
105 0xf3 0 0 0 105 0xf3 0 0 0
106 0xf4 0 0 0 106 0xf4 0 0 0
107 0xf5 0 0 0 107 0xf5 0 0 0
108 0xf6 0 0 0 108 0xf6 0 0 0
109 0xf7 0 0 0 109 0xf7 0 0 0
110 0x110 0 0 0 110 0x110 0 0 0
111 0x111 0 0 0 111 0x111 0 0 0
112 0x112 0 0 0 112 0x112 0 0 0
113 0x113 0 0 0 113 0x113 0 0 0
114 0x114 0 0 0 114 0x114 0 0 0
115 0x115 0 0 0 115 0x115 0 0 0
116 0x116 0 0 0 116 0x116 0 0 0
117 0x117 0 0 0>; 117 0x117 0 0 0>;
118 }; 118 };
119 119
120 msi3: msi@41c00 { 120 msi3: msi@41c00 {
121 compatible = "fsl,mpic-msi-v4.3"; 121 compatible = "fsl,mpic-msi-v4.3";
122 reg = <0x41c00 0x200 0x47148 4>; 122 reg = <0x41c00 0x200 0x47148 4>;
123 interrupts = < 123 interrupts = <
124 0xf8 0 0 0 124 0xf8 0 0 0
125 0xf9 0 0 0 125 0xf9 0 0 0
126 0xfa 0 0 0 126 0xfa 0 0 0
127 0xfb 0 0 0 127 0xfb 0 0 0
128 0xfc 0 0 0 128 0xfc 0 0 0
129 0xfd 0 0 0 129 0xfd 0 0 0
130 0xfe 0 0 0 130 0xfe 0 0 0
131 0xff 0 0 0 131 0xff 0 0 0
132 0x118 0 0 0 132 0x118 0 0 0
133 0x119 0 0 0 133 0x119 0 0 0
134 0x11a 0 0 0 134 0x11a 0 0 0
135 0x11b 0 0 0 135 0x11b 0 0 0
136 0x11c 0 0 0 136 0x11c 0 0 0
137 0x11d 0 0 0 137 0x11d 0 0 0
138 0x11e 0 0 0 138 0x11e 0 0 0
139 0x11f 0 0 0>; 139 0x11f 0 0 0>;
140 }; 140 };
141 141
142 timer@42100 { 142 timer@42100 {
143 compatible = "fsl,mpic-global-timer"; 143 compatible = "fsl,mpic-global-timer";
144 reg = <0x42100 0x100 0x42300 4>; 144 reg = <0x42100 0x100 0x42300 4>;
145 interrupts = <4 0 3 0 145 interrupts = <4 0 3 0
146 5 0 3 0 146 5 0 3 0
147 6 0 3 0 147 6 0 3 0
148 7 0 3 0>; 148 7 0 3 0>;
149 }; 149 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.