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Linux/scripts/dtc/include-prefixes/powerpc/fsl/qoriq-sec5.2-0.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/powerpc/fsl/qoriq-sec5.2-0.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/powerpc/fsl/qoriq-sec5.2-0.dtsi (Architecture sparc)


  1 /*                                                  1 /*
  2  * QorIQ Sec/Crypto 5.2 device tree stub [ con      2  * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
  3  *                                                  3  *
  4  * Copyright 2011-2012 Freescale Semiconductor      4  * Copyright 2011-2012 Freescale Semiconductor Inc.
  5  *                                                  5  *
  6  * Redistribution and use in source and binary      6  * Redistribution and use in source and binary forms, with or without
  7  * modification, are permitted provided that t      7  * modification, are permitted provided that the following conditions are met:
  8  *     * Redistributions of source code must r      8  *     * Redistributions of source code must retain the above copyright
  9  *       notice, this list of conditions and t      9  *       notice, this list of conditions and the following disclaimer.
 10  *     * Redistributions in binary form must r     10  *     * Redistributions in binary form must reproduce the above copyright
 11  *       notice, this list of conditions and t     11  *       notice, this list of conditions and the following disclaimer in the
 12  *       documentation and/or other materials      12  *       documentation and/or other materials provided with the distribution.
 13  *     * Neither the name of Freescale Semicon     13  *     * Neither the name of Freescale Semiconductor nor the
 14  *       names of its contributors may be used     14  *       names of its contributors may be used to endorse or promote products
 15  *       derived from this software without sp     15  *       derived from this software without specific prior written permission.
 16  *                                                 16  *
 17  *                                                 17  *
 18  * ALTERNATIVELY, this software may be distrib     18  * ALTERNATIVELY, this software may be distributed under the terms of the
 19  * GNU General Public License ("GPL") as publi     19  * GNU General Public License ("GPL") as published by the Free Software
 20  * Foundation, either version 2 of that Licens     20  * Foundation, either version 2 of that License or (at your option) any
 21  * later version.                                  21  * later version.
 22  *                                                 22  *
 23  * THIS SOFTWARE IS PROVIDED BY Freescale Semi     23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B     24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 25  * WARRANTIES OF MERCHANTABILITY AND FITNESS F     25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 26  * DISCLAIMED. IN NO EVENT SHALL Freescale Sem     26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM     27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT     28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS      29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONT     30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT     32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33  */                                                33  */
 34                                                    34 
 35 crypto: crypto@300000 {                            35 crypto: crypto@300000 {
 36         compatible = "fsl,sec-v5.2", "fsl,sec-     36         compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
 37         fsl,sec-era = <5>;                         37         fsl,sec-era = <5>;
 38         #address-cells = <1>;                      38         #address-cells = <1>;
 39         #size-cells = <1>;                         39         #size-cells = <1>;
 40         reg              = <0x300000 0x10000>;     40         reg              = <0x300000 0x10000>;
 41         ranges           = <0 0x300000 0x10000     41         ranges           = <0 0x300000 0x10000>;
 42         interrupts       = <92 2 0 0>;             42         interrupts       = <92 2 0 0>;
 43                                                    43 
 44         sec_jr0: jr@1000 {                         44         sec_jr0: jr@1000 {
 45                 compatible = "fsl,sec-v5.2-job     45                 compatible = "fsl,sec-v5.2-job-ring",
 46                              "fsl,sec-v5.0-job     46                              "fsl,sec-v5.0-job-ring",
 47                              "fsl,sec-v4.0-job     47                              "fsl,sec-v4.0-job-ring";
 48                 reg = <0x1000 0x1000>;             48                 reg = <0x1000 0x1000>;
 49                 interrupts = <88 2 0 0>;           49                 interrupts = <88 2 0 0>;
 50         };                                         50         };
 51                                                    51 
 52         sec_jr1: jr@2000 {                         52         sec_jr1: jr@2000 {
 53                 compatible = "fsl,sec-v5.2-job     53                 compatible = "fsl,sec-v5.2-job-ring",
 54                              "fsl,sec-v5.0-job     54                              "fsl,sec-v5.0-job-ring",
 55                              "fsl,sec-v4.0-job     55                              "fsl,sec-v4.0-job-ring";
 56                 reg = <0x2000 0x1000>;             56                 reg = <0x2000 0x1000>;
 57                 interrupts = <89 2 0 0>;           57                 interrupts = <89 2 0 0>;
 58         };                                         58         };
 59                                                    59 
 60         sec_jr2: jr@3000 {                         60         sec_jr2: jr@3000 {
 61                 compatible = "fsl,sec-v5.2-job     61                 compatible = "fsl,sec-v5.2-job-ring",
 62                              "fsl,sec-v5.0-job     62                              "fsl,sec-v5.0-job-ring",
 63                              "fsl,sec-v4.0-job     63                              "fsl,sec-v4.0-job-ring";
 64                 reg = <0x3000 0x1000>;             64                 reg = <0x3000 0x1000>;
 65                 interrupts = <90 2 0 0>;           65                 interrupts = <90 2 0 0>;
 66         };                                         66         };
 67                                                    67 
 68         sec_jr3: jr@4000 {                         68         sec_jr3: jr@4000 {
 69                 compatible = "fsl,sec-v5.2-job     69                 compatible = "fsl,sec-v5.2-job-ring",
 70                              "fsl,sec-v5.0-job     70                              "fsl,sec-v5.0-job-ring",
 71                              "fsl,sec-v4.0-job     71                              "fsl,sec-v4.0-job-ring";
 72                 reg = <0x4000 0x1000>;             72                 reg = <0x4000 0x1000>;
 73                 interrupts = <91 2 0 0>;           73                 interrupts = <91 2 0 0>;
 74         };                                         74         };
 75                                                    75 
 76         rtic@6000 {                                76         rtic@6000 {
 77                 compatible = "fsl,sec-v5.2-rti     77                 compatible = "fsl,sec-v5.2-rtic",
 78                              "fsl,sec-v5.0-rti     78                              "fsl,sec-v5.0-rtic",
 79                              "fsl,sec-v4.0-rti     79                              "fsl,sec-v4.0-rtic";
 80                 #address-cells = <1>;              80                 #address-cells = <1>;
 81                 #size-cells = <1>;                 81                 #size-cells = <1>;
 82                 reg = <0x6000 0x100>;              82                 reg = <0x6000 0x100>;
 83                 ranges = <0x0 0x6100 0xe00>;       83                 ranges = <0x0 0x6100 0xe00>;
 84                                                    84 
 85                 rtic_a: rtic-a@0 {                 85                 rtic_a: rtic-a@0 {
 86                         compatible = "fsl,sec-     86                         compatible = "fsl,sec-v5.2-rtic-memory",
 87                                      "fsl,sec-     87                                      "fsl,sec-v5.0-rtic-memory",
 88                                      "fsl,sec-     88                                      "fsl,sec-v4.0-rtic-memory";
 89                         reg = <0x00 0x20 0x100     89                         reg = <0x00 0x20 0x100 0x80>;
 90                 };                                 90                 };
 91                                                    91 
 92                 rtic_b: rtic-b@20 {                92                 rtic_b: rtic-b@20 {
 93                         compatible = "fsl,sec-     93                         compatible = "fsl,sec-v5.2-rtic-memory",
 94                                      "fsl,sec-     94                                      "fsl,sec-v5.0-rtic-memory",
 95                                      "fsl,sec-     95                                      "fsl,sec-v4.0-rtic-memory";
 96                         reg = <0x20 0x20 0x200     96                         reg = <0x20 0x20 0x200 0x80>;
 97                 };                                 97                 };
 98                                                    98 
 99                 rtic_c: rtic-c@40 {                99                 rtic_c: rtic-c@40 {
100                         compatible = "fsl,sec-    100                         compatible = "fsl,sec-v5.2-rtic-memory",
101                                      "fsl,sec-    101                                      "fsl,sec-v5.0-rtic-memory",
102                                      "fsl,sec-    102                                      "fsl,sec-v4.0-rtic-memory";
103                         reg = <0x40 0x20 0x300    103                         reg = <0x40 0x20 0x300 0x80>;
104                 };                                104                 };
105                                                   105 
106                 rtic_d: rtic-d@60 {               106                 rtic_d: rtic-d@60 {
107                         compatible = "fsl,sec-    107                         compatible = "fsl,sec-v5.2-rtic-memory",
108                                      "fsl,sec-    108                                      "fsl,sec-v5.0-rtic-memory",
109                                      "fsl,sec-    109                                      "fsl,sec-v4.0-rtic-memory";
110                         reg = <0x60 0x20 0x500    110                         reg = <0x60 0x20 0x500 0x80>;
111                 };                                111                 };
112         };                                        112         };
113 };                                                113 };
114                                                   114 
115 sec_mon: sec_mon@314000 {                         115 sec_mon: sec_mon@314000 {
116         compatible = "fsl,sec-v5.2-mon", "fsl,    116         compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
117         reg = <0x314000 0x1000>;                  117         reg = <0x314000 0x1000>;
118         interrupts = <93 2 0 0>;                  118         interrupts = <93 2 0 0>;
119 };                                                119 };
                                                      

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