1 /* 1 /*
2 * Device Tree Source for FSP2 2 * Device Tree Source for FSP2
3 * 3 *
4 * Copyright 2010,2012 IBM Corp. 4 * Copyright 2010,2012 IBM Corp.
5 * 5 *
6 * This file is licensed under the terms of th 6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is license 7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express o 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11 11
12 /dts-v1/; 12 /dts-v1/;
13 13
14 / { 14 / {
15 #address-cells = <2>; 15 #address-cells = <2>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "ibm,fsp2"; 17 model = "ibm,fsp2";
18 compatible = "ibm,fsp2"; 18 compatible = "ibm,fsp2";
19 dcr-parent = <&{/cpus/cpu@0}>; 19 dcr-parent = <&{/cpus/cpu@0}>;
20 20
21 aliases { 21 aliases {
22 ethernet0 = &EMAC0; 22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1; 23 ethernet1 = &EMAC1;
24 serial0 = &UART0; 24 serial0 = &UART0;
25 }; 25 };
26 26
27 cpus { 27 cpus {
28 #address-cells = <1>; 28 #address-cells = <1>;
29 #size-cells = <0>; 29 #size-cells = <0>;
30 30
31 cpu@0 { 31 cpu@0 {
32 device_type = "cpu"; 32 device_type = "cpu";
33 model = "PowerPC, 476F 33 model = "PowerPC, 476FSP2";
34 reg = <0x0>; 34 reg = <0x0>;
35 clock-frequency = <0>; 35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = < 36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <3 37 i-cache-line-size = <32>;
38 d-cache-line-size = <3 38 d-cache-line-size = <32>;
39 d-cache-size = <32768> 39 d-cache-size = <32768>;
40 i-cache-size = <32768> 40 i-cache-size = <32768>;
41 dcr-controller; 41 dcr-controller;
42 dcr-access-method = "n 42 dcr-access-method = "native";
43 }; 43 };
44 }; 44 };
45 45
46 memory { 46 memory {
47 device_type = "memory"; 47 device_type = "memory";
48 reg = <0x00000000 0x00000000 0 48 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by
49 49 cuboot */
50 }; 50 };
51 51
52 clocks { 52 clocks {
53 mmc_clk: mmc_clk { 53 mmc_clk: mmc_clk {
54 compatible = "fixed-cl 54 compatible = "fixed-clock";
55 #clock-cells = <0>; <<
56 clock-frequency = <500 55 clock-frequency = <50000000>;
57 clock-output-names = " 56 clock-output-names = "mmc_clk";
58 }; 57 };
59 }; 58 };
60 59
61 UIC0: uic0 { 60 UIC0: uic0 {
62 #address-cells = <0>; 61 #address-cells = <0>;
63 #size-cells = <0>; 62 #size-cells = <0>;
64 #interrupt-cells = <2>; 63 #interrupt-cells = <2>;
65 compatible = "ibm,uic"; 64 compatible = "ibm,uic";
66 interrupt-controller; 65 interrupt-controller;
67 cell-index = <0>; 66 cell-index = <0>;
68 dcr-reg = <0x2c0 0x8>; 67 dcr-reg = <0x2c0 0x8>;
69 }; 68 };
70 69
71 /* "interrupts" field is <bit level bi 70 /* "interrupts" field is <bit level bit level>
72 first pair is non-critical, second 71 first pair is non-critical, second is critical */
73 UIC1_0: uic1_0 { 72 UIC1_0: uic1_0 {
74 #address-cells = <0>; 73 #address-cells = <0>;
75 #size-cells = <0>; 74 #size-cells = <0>;
76 #interrupt-cells = <2>; 75 #interrupt-cells = <2>;
77 76
78 compatible = "ibm,uic"; 77 compatible = "ibm,uic";
79 interrupt-controller; 78 interrupt-controller;
80 cell-index = <1>; 79 cell-index = <1>;
81 dcr-reg = <0x2c8 0x8>; 80 dcr-reg = <0x2c8 0x8>;
82 interrupt-parent = <&UIC0>; 81 interrupt-parent = <&UIC0>;
83 interrupts = <21 0x4 4 0x84>; 82 interrupts = <21 0x4 4 0x84>;
84 }; 83 };
85 84
86 /* PSI and DMA */ 85 /* PSI and DMA */
87 UIC1_1: uic1_1 { 86 UIC1_1: uic1_1 {
88 #address-cells = <0>; 87 #address-cells = <0>;
89 #size-cells = <0>; 88 #size-cells = <0>;
90 #interrupt-cells = <2>; 89 #interrupt-cells = <2>;
91 90
92 compatible = "ibm,uic"; 91 compatible = "ibm,uic";
93 interrupt-controller; 92 interrupt-controller;
94 cell-index = <2>; 93 cell-index = <2>;
95 dcr-reg = <0x350 0x8>; 94 dcr-reg = <0x350 0x8>;
96 interrupt-parent = <&UIC0>; 95 interrupt-parent = <&UIC0>;
97 interrupts = <22 0x4 5 0x84>; 96 interrupts = <22 0x4 5 0x84>;
98 }; 97 };
99 98
100 /* Ethernet and USB */ 99 /* Ethernet and USB */
101 UIC1_2: uic1_2 { 100 UIC1_2: uic1_2 {
102 #address-cells = <0>; 101 #address-cells = <0>;
103 #size-cells = <0>; 102 #size-cells = <0>;
104 #interrupt-cells = <2>; 103 #interrupt-cells = <2>;
105 104
106 compatible = "ibm,uic"; 105 compatible = "ibm,uic";
107 interrupt-controller; 106 interrupt-controller;
108 cell-index = <3>; 107 cell-index = <3>;
109 dcr-reg = <0x358 0x8>; 108 dcr-reg = <0x358 0x8>;
110 interrupt-parent = <&UIC0>; 109 interrupt-parent = <&UIC0>;
111 interrupts = <23 0x4 6 0x84>; 110 interrupts = <23 0x4 6 0x84>;
112 }; 111 };
113 112
114 /* PLB Errors */ 113 /* PLB Errors */
115 UIC1_3: uic1_3 { 114 UIC1_3: uic1_3 {
116 #address-cells = <0>; 115 #address-cells = <0>;
117 #size-cells = <0>; 116 #size-cells = <0>;
118 #interrupt-cells = <2>; 117 #interrupt-cells = <2>;
119 118
120 compatible = "ibm,uic"; 119 compatible = "ibm,uic";
121 interrupt-controller; 120 interrupt-controller;
122 cell-index = <4>; 121 cell-index = <4>;
123 dcr-reg = <0x360 0x8>; 122 dcr-reg = <0x360 0x8>;
124 interrupt-parent = <&UIC0>; 123 interrupt-parent = <&UIC0>;
125 interrupts = <24 0x4 7 0x84>; 124 interrupts = <24 0x4 7 0x84>;
126 }; 125 };
127 126
128 UIC1_4: uic1_4 { 127 UIC1_4: uic1_4 {
129 #address-cells = <0>; 128 #address-cells = <0>;
130 #size-cells = <0>; 129 #size-cells = <0>;
131 #interrupt-cells = <2>; 130 #interrupt-cells = <2>;
132 131
133 compatible = "ibm,uic"; 132 compatible = "ibm,uic";
134 interrupt-controller; 133 interrupt-controller;
135 cell-index = <5>; 134 cell-index = <5>;
136 dcr-reg = <0x368 0x8>; 135 dcr-reg = <0x368 0x8>;
137 interrupt-parent = <&UIC0>; 136 interrupt-parent = <&UIC0>;
138 interrupts = <25 0x4 8 0x84>; 137 interrupts = <25 0x4 8 0x84>;
139 }; 138 };
140 139
141 UIC1_5: uic1_5 { 140 UIC1_5: uic1_5 {
142 #address-cells = <0>; 141 #address-cells = <0>;
143 #size-cells = <0>; 142 #size-cells = <0>;
144 #interrupt-cells = <2>; 143 #interrupt-cells = <2>;
145 144
146 compatible = "ibm,uic"; 145 compatible = "ibm,uic";
147 interrupt-controller; 146 interrupt-controller;
148 cell-index = <6>; 147 cell-index = <6>;
149 dcr-reg = <0x370 0x8>; 148 dcr-reg = <0x370 0x8>;
150 interrupt-parent = <&UIC0>; 149 interrupt-parent = <&UIC0>;
151 interrupts = <26 0x4 9 0x84>; 150 interrupts = <26 0x4 9 0x84>;
152 }; 151 };
153 152
154 /* 2nd level UICs for FSI */ 153 /* 2nd level UICs for FSI */
155 UIC2_0: uic2_0 { 154 UIC2_0: uic2_0 {
156 #address-cells = <0>; 155 #address-cells = <0>;
157 #size-cells = <0>; 156 #size-cells = <0>;
158 #interrupt-cells = <2>; 157 #interrupt-cells = <2>;
159 158
160 compatible = "ibm,uic"; 159 compatible = "ibm,uic";
161 interrupt-controller; 160 interrupt-controller;
162 cell-index = <7>; 161 cell-index = <7>;
163 dcr-reg = <0x2d0 0x8>; 162 dcr-reg = <0x2d0 0x8>;
164 interrupt-parent = <&UIC1_0>; 163 interrupt-parent = <&UIC1_0>;
165 interrupts = <16 0x4 0 0x84>; 164 interrupts = <16 0x4 0 0x84>;
166 }; 165 };
167 166
168 UIC2_1: uic2_1 { 167 UIC2_1: uic2_1 {
169 #address-cells = <0>; 168 #address-cells = <0>;
170 #size-cells = <0>; 169 #size-cells = <0>;
171 #interrupt-cells = <2>; 170 #interrupt-cells = <2>;
172 171
173 compatible = "ibm,uic"; 172 compatible = "ibm,uic";
174 interrupt-controller; 173 interrupt-controller;
175 cell-index = <8>; 174 cell-index = <8>;
176 dcr-reg = <0x2d8 0x8>; 175 dcr-reg = <0x2d8 0x8>;
177 interrupt-parent = <&UIC1_0>; 176 interrupt-parent = <&UIC1_0>;
178 interrupts = <17 0x4 1 0x84>; 177 interrupts = <17 0x4 1 0x84>;
179 }; 178 };
180 179
181 UIC2_2: uic2_2 { 180 UIC2_2: uic2_2 {
182 #address-cells = <0>; 181 #address-cells = <0>;
183 #size-cells = <0>; 182 #size-cells = <0>;
184 #interrupt-cells = <2>; 183 #interrupt-cells = <2>;
185 184
186 compatible = "ibm,uic"; 185 compatible = "ibm,uic";
187 interrupt-controller; 186 interrupt-controller;
188 cell-index = <9>; 187 cell-index = <9>;
189 dcr-reg = <0x2e0 0x8>; 188 dcr-reg = <0x2e0 0x8>;
190 interrupt-parent = <&UIC1_0>; 189 interrupt-parent = <&UIC1_0>;
191 interrupts = <18 0x4 2 0x84>; 190 interrupts = <18 0x4 2 0x84>;
192 }; 191 };
193 192
194 UIC2_3: uic2_3 { 193 UIC2_3: uic2_3 {
195 #address-cells = <0>; 194 #address-cells = <0>;
196 #size-cells = <0>; 195 #size-cells = <0>;
197 #interrupt-cells = <2>; 196 #interrupt-cells = <2>;
198 197
199 compatible = "ibm,uic"; 198 compatible = "ibm,uic";
200 interrupt-controller; 199 interrupt-controller;
201 cell-index = <10>; 200 cell-index = <10>;
202 dcr-reg = <0x2e8 0x8>; 201 dcr-reg = <0x2e8 0x8>;
203 interrupt-parent = <&UIC1_0>; 202 interrupt-parent = <&UIC1_0>;
204 interrupts = <19 0x4 3 0x84>; 203 interrupts = <19 0x4 3 0x84>;
205 }; 204 };
206 205
207 UIC2_4: uic2_4 { 206 UIC2_4: uic2_4 {
208 #address-cells = <0>; 207 #address-cells = <0>;
209 #size-cells = <0>; 208 #size-cells = <0>;
210 #interrupt-cells = <2>; 209 #interrupt-cells = <2>;
211 210
212 compatible = "ibm,uic"; 211 compatible = "ibm,uic";
213 interrupt-controller; 212 interrupt-controller;
214 cell-index = <11>; 213 cell-index = <11>;
215 dcr-reg = <0x2f0 0x8>; 214 dcr-reg = <0x2f0 0x8>;
216 interrupt-parent = <&UIC1_0>; 215 interrupt-parent = <&UIC1_0>;
217 interrupts = <20 0x4 4 0x84>; 216 interrupts = <20 0x4 4 0x84>;
218 }; 217 };
219 218
220 UIC2_5: uic2_5 { 219 UIC2_5: uic2_5 {
221 #address-cells = <0>; 220 #address-cells = <0>;
222 #size-cells = <0>; 221 #size-cells = <0>;
223 #interrupt-cells = <2>; 222 #interrupt-cells = <2>;
224 223
225 compatible = "ibm,uic"; 224 compatible = "ibm,uic";
226 interrupt-controller; 225 interrupt-controller;
227 cell-index = <12>; 226 cell-index = <12>;
228 dcr-reg = <0x2f8 0x8>; 227 dcr-reg = <0x2f8 0x8>;
229 interrupt-parent = <&UIC1_0>; 228 interrupt-parent = <&UIC1_0>;
230 interrupts = <21 0x4 5 0x84>; 229 interrupts = <21 0x4 5 0x84>;
231 }; 230 };
232 231
233 UIC2_6: uic2_6 { 232 UIC2_6: uic2_6 {
234 #address-cells = <0>; 233 #address-cells = <0>;
235 #size-cells = <0>; 234 #size-cells = <0>;
236 #interrupt-cells = <2>; 235 #interrupt-cells = <2>;
237 236
238 compatible = "ibm,uic"; 237 compatible = "ibm,uic";
239 interrupt-controller; 238 interrupt-controller;
240 cell-index = <13>; 239 cell-index = <13>;
241 dcr-reg = <0x300 0x8>; 240 dcr-reg = <0x300 0x8>;
242 interrupt-parent = <&UIC1_0>; 241 interrupt-parent = <&UIC1_0>;
243 interrupts = <22 0x4 6 0x84>; 242 interrupts = <22 0x4 6 0x84>;
244 }; 243 };
245 244
246 UIC2_7: uic2_7 { 245 UIC2_7: uic2_7 {
247 #address-cells = <0>; 246 #address-cells = <0>;
248 #size-cells = <0>; 247 #size-cells = <0>;
249 #interrupt-cells = <2>; 248 #interrupt-cells = <2>;
250 249
251 compatible = "ibm,uic"; 250 compatible = "ibm,uic";
252 interrupt-controller; 251 interrupt-controller;
253 cell-index = <14>; 252 cell-index = <14>;
254 dcr-reg = <0x308 0x8>; 253 dcr-reg = <0x308 0x8>;
255 interrupt-parent = <&UIC1_0>; 254 interrupt-parent = <&UIC1_0>;
256 interrupts = <23 0x4 7 0x84>; 255 interrupts = <23 0x4 7 0x84>;
257 }; 256 };
258 257
259 UIC2_8: uic2_8 { 258 UIC2_8: uic2_8 {
260 #address-cells = <0>; 259 #address-cells = <0>;
261 #size-cells = <0>; 260 #size-cells = <0>;
262 #interrupt-cells = <2>; 261 #interrupt-cells = <2>;
263 262
264 compatible = "ibm,uic"; 263 compatible = "ibm,uic";
265 interrupt-controller; 264 interrupt-controller;
266 cell-index = <15>; 265 cell-index = <15>;
267 dcr-reg = <0x310 0x8>; 266 dcr-reg = <0x310 0x8>;
268 interrupt-parent = <&UIC1_0>; 267 interrupt-parent = <&UIC1_0>;
269 interrupts = <24 0x4 8 0x84>; 268 interrupts = <24 0x4 8 0x84>;
270 }; 269 };
271 270
272 UIC2_9: uic2_9 { 271 UIC2_9: uic2_9 {
273 #address-cells = <0>; 272 #address-cells = <0>;
274 #size-cells = <0>; 273 #size-cells = <0>;
275 #interrupt-cells = <2>; 274 #interrupt-cells = <2>;
276 275
277 compatible = "ibm,uic"; 276 compatible = "ibm,uic";
278 interrupt-controller; 277 interrupt-controller;
279 cell-index = <16>; 278 cell-index = <16>;
280 dcr-reg = <0x318 0x8>; 279 dcr-reg = <0x318 0x8>;
281 interrupt-parent = <&UIC1_0>; 280 interrupt-parent = <&UIC1_0>;
282 interrupts = <25 0x4 9 0x84>; 281 interrupts = <25 0x4 9 0x84>;
283 }; 282 };
284 283
285 UIC2_10: uic2_10 { 284 UIC2_10: uic2_10 {
286 #address-cells = <0>; 285 #address-cells = <0>;
287 #size-cells = <0>; 286 #size-cells = <0>;
288 #interrupt-cells = <2>; 287 #interrupt-cells = <2>;
289 288
290 compatible = "ibm,uic"; 289 compatible = "ibm,uic";
291 interrupt-controller; 290 interrupt-controller;
292 cell-index = <17>; 291 cell-index = <17>;
293 dcr-reg = <0x320 0x8>; 292 dcr-reg = <0x320 0x8>;
294 interrupt-parent = <&UIC1_0>; 293 interrupt-parent = <&UIC1_0>;
295 interrupts = <26 0x4 10 0x84>; 294 interrupts = <26 0x4 10 0x84>;
296 }; 295 };
297 296
298 UIC2_11: uic2_11 { 297 UIC2_11: uic2_11 {
299 #address-cells = <0>; 298 #address-cells = <0>;
300 #size-cells = <0>; 299 #size-cells = <0>;
301 #interrupt-cells = <2>; 300 #interrupt-cells = <2>;
302 301
303 compatible = "ibm,uic"; 302 compatible = "ibm,uic";
304 interrupt-controller; 303 interrupt-controller;
305 cell-index = <18>; 304 cell-index = <18>;
306 dcr-reg = <0x328 0x8>; 305 dcr-reg = <0x328 0x8>;
307 interrupt-parent = <&UIC1_0>; 306 interrupt-parent = <&UIC1_0>;
308 interrupts = <27 0x4 11 0x84>; 307 interrupts = <27 0x4 11 0x84>;
309 }; 308 };
310 309
311 UIC2_12: uic2_12 { 310 UIC2_12: uic2_12 {
312 #address-cells = <0>; 311 #address-cells = <0>;
313 #size-cells = <0>; 312 #size-cells = <0>;
314 #interrupt-cells = <2>; 313 #interrupt-cells = <2>;
315 314
316 compatible = "ibm,uic"; 315 compatible = "ibm,uic";
317 interrupt-controller; 316 interrupt-controller;
318 cell-index = <19>; 317 cell-index = <19>;
319 dcr-reg = <0x330 0x8>; 318 dcr-reg = <0x330 0x8>;
320 interrupt-parent = <&UIC1_0>; 319 interrupt-parent = <&UIC1_0>;
321 interrupts = <28 0x4 12 0x84>; 320 interrupts = <28 0x4 12 0x84>;
322 }; 321 };
323 322
324 UIC2_13: uic2_13 { 323 UIC2_13: uic2_13 {
325 #address-cells = <0>; 324 #address-cells = <0>;
326 #size-cells = <0>; 325 #size-cells = <0>;
327 #interrupt-cells = <2>; 326 #interrupt-cells = <2>;
328 327
329 compatible = "ibm,uic"; 328 compatible = "ibm,uic";
330 interrupt-controller; 329 interrupt-controller;
331 cell-index = <20>; 330 cell-index = <20>;
332 dcr-reg = <0x338 0x8>; 331 dcr-reg = <0x338 0x8>;
333 interrupt-parent = <&UIC1_0>; 332 interrupt-parent = <&UIC1_0>;
334 interrupts = <29 0x4 13 0x84>; 333 interrupts = <29 0x4 13 0x84>;
335 }; 334 };
336 335
337 UIC2_14: uic2_14 { 336 UIC2_14: uic2_14 {
338 #address-cells = <0>; 337 #address-cells = <0>;
339 #size-cells = <0>; 338 #size-cells = <0>;
340 #interrupt-cells = <2>; 339 #interrupt-cells = <2>;
341 340
342 compatible = "ibm,uic"; 341 compatible = "ibm,uic";
343 interrupt-controller; 342 interrupt-controller;
344 cell-index = <21>; 343 cell-index = <21>;
345 dcr-reg = <0x340 0x8>; 344 dcr-reg = <0x340 0x8>;
346 interrupt-parent = <&UIC1_0>; 345 interrupt-parent = <&UIC1_0>;
347 interrupts = <30 0x4 14 0x84>; 346 interrupts = <30 0x4 14 0x84>;
348 }; 347 };
349 348
350 UIC2_15: uic2_15 { 349 UIC2_15: uic2_15 {
351 #address-cells = <0>; 350 #address-cells = <0>;
352 #size-cells = <0>; 351 #size-cells = <0>;
353 #interrupt-cells = <2>; 352 #interrupt-cells = <2>;
354 353
355 compatible = "ibm,uic"; 354 compatible = "ibm,uic";
356 interrupt-controller; 355 interrupt-controller;
357 cell-index = <22>; 356 cell-index = <22>;
358 dcr-reg = <0x348 0x8>; 357 dcr-reg = <0x348 0x8>;
359 interrupt-parent = <&UIC1_0>; 358 interrupt-parent = <&UIC1_0>;
360 interrupts = <31 0x4 15 0x84>; 359 interrupts = <31 0x4 15 0x84>;
361 }; 360 };
362 361
>> 362 mmc0: sdhci@020c0000 {
>> 363 compatible = "st,sdhci-stih407", "st,sdhci";
>> 364 status = "disabled";
>> 365 reg = <0x020c0000 0x20000>;
>> 366 reg-names = "mmc";
>> 367 interrupt-parent = <&UIC1_3>;
>> 368 interrupts = <21 0x4 22 0x4>;
>> 369 interrupt-names = "mmcirq";
>> 370 pinctrl-names = "default";
>> 371 pinctrl-0 = <>;
>> 372 clock-names = "mmc";
>> 373 clocks = <&mmc_clk>;
>> 374 };
>> 375
363 plb6 { 376 plb6 {
364 compatible = "ibm,plb6"; 377 compatible = "ibm,plb6";
365 #address-cells = <2>; 378 #address-cells = <2>;
366 #size-cells = <1>; 379 #size-cells = <1>;
367 ranges; 380 ranges;
368 381
369 MCW0: memory-controller-wrappe 382 MCW0: memory-controller-wrapper {
370 compatible = "ibm,cw-4 383 compatible = "ibm,cw-476fsp2";
371 dcr-reg = <0x11111800 384 dcr-reg = <0x11111800 0x40>;
372 }; 385 };
373 386
374 MCIF0: memory-controller { 387 MCIF0: memory-controller {
375 compatible = "ibm,sdra 388 compatible = "ibm,sdram-476fsp2", "ibm,sdram-4xx-ddr3";
376 dcr-reg = <0x11120000 389 dcr-reg = <0x11120000 0x10000>;
377 mcer-device = <&MCW0>; 390 mcer-device = <&MCW0>;
378 interrupt-parent = <&U 391 interrupt-parent = <&UIC0>;
379 interrupts = <10 0x84 392 interrupts = <10 0x84 /* ECC UE */
380 11 0x84> 393 11 0x84>; /* ECC CE */
381 }; 394 };
382 }; 395 };
383 396
384 plb4 { 397 plb4 {
385 compatible = "ibm,plb4"; 398 compatible = "ibm,plb4";
386 #address-cells = <1>; 399 #address-cells = <1>;
387 #size-cells = <1>; 400 #size-cells = <1>;
388 ranges = <0x00000000 0x0000001 401 ranges = <0x00000000 0x00000010 0x00000000 0x80000000
389 0x80000000 0x0000001 402 0x80000000 0x00000010 0x80000000 0x80000000>;
390 clock-frequency = <333333334>; 403 clock-frequency = <333333334>;
391 404
392 plb6-system-hung-irq { 405 plb6-system-hung-irq {
393 compatible = "ibm,bus- 406 compatible = "ibm,bus-error-irq";
394 #interrupt-cells = <2> 407 #interrupt-cells = <2>;
395 interrupt-parent = <&U 408 interrupt-parent = <&UIC0>;
396 interrupts = <0 0x84>; 409 interrupts = <0 0x84>;
397 }; 410 };
398 411
399 l2-error-irq { 412 l2-error-irq {
400 compatible = "ibm,bus- 413 compatible = "ibm,bus-error-irq";
401 #interrupt-cells = <2> 414 #interrupt-cells = <2>;
402 interrupt-parent = <&U 415 interrupt-parent = <&UIC0>;
403 interrupts = <20 0x84> 416 interrupts = <20 0x84>;
404 }; 417 };
405 418
406 plb6-plb4-irq { 419 plb6-plb4-irq {
407 compatible = "ibm,bus- 420 compatible = "ibm,bus-error-irq";
408 #interrupt-cells = <2> 421 #interrupt-cells = <2>;
409 interrupt-parent = <&U 422 interrupt-parent = <&UIC0>;
410 interrupts = <1 0x84>; 423 interrupts = <1 0x84>;
411 }; 424 };
412 425
413 plb4-ahb-irq { 426 plb4-ahb-irq {
414 compatible = "ibm,bus- 427 compatible = "ibm,bus-error-irq";
415 #interrupt-cells = <2> 428 #interrupt-cells = <2>;
416 interrupt-parent = <&U 429 interrupt-parent = <&UIC1_3>;
417 interrupts = <20 0x84> 430 interrupts = <20 0x84>;
418 }; 431 };
419 432
420 opbd-error-irq { 433 opbd-error-irq {
421 compatible = "ibm,opbd 434 compatible = "ibm,opbd-error-irq";
422 #interrupt-cells = <2> 435 #interrupt-cells = <2>;
423 interrupt-parent = <&U 436 interrupt-parent = <&UIC1_4>;
424 interrupts = <5 0x84>; 437 interrupts = <5 0x84>;
425 }; 438 };
426 439
427 cmu-error-irq { 440 cmu-error-irq {
428 compatible = "ibm,cmu- 441 compatible = "ibm,cmu-error-irq";
429 #interrupt-cells = <2> 442 #interrupt-cells = <2>;
430 interrupt-parent = <&U 443 interrupt-parent = <&UIC0>;
431 interrupts = <28 0x84> 444 interrupts = <28 0x84>;
432 }; 445 };
433 446
434 conf-error-irq { 447 conf-error-irq {
435 compatible = "ibm,conf 448 compatible = "ibm,conf-error-irq";
436 #interrupt-cells = <2> 449 #interrupt-cells = <2>;
437 interrupt-parent = <&U 450 interrupt-parent = <&UIC1_4>;
438 interrupts = <11 0x84> 451 interrupts = <11 0x84>;
439 }; 452 };
440 453
441 mc-ue-irq { 454 mc-ue-irq {
442 compatible = "ibm,mc-u 455 compatible = "ibm,mc-ue-irq";
443 #interrupt-cells = <2> 456 #interrupt-cells = <2>;
444 interrupt-parent = <&U 457 interrupt-parent = <&UIC0>;
445 interrupts = <10 0x84> 458 interrupts = <10 0x84>;
446 }; 459 };
447 460
448 reset-warning-irq { 461 reset-warning-irq {
449 compatible = "ibm,rese 462 compatible = "ibm,reset-warning-irq";
450 #interrupt-cells = <2> 463 #interrupt-cells = <2>;
451 interrupt-parent = <&U 464 interrupt-parent = <&UIC0>;
452 interrupts = <17 0x84> 465 interrupts = <17 0x84>;
453 }; 466 };
454 467
455 MAL0: mcmal0 { 468 MAL0: mcmal0 {
456 #interrupt-cells = <1> 469 #interrupt-cells = <1>;
457 #address-cells = <0>; 470 #address-cells = <0>;
458 #size-cells = <0>; 471 #size-cells = <0>;
459 compatible = "ibm,mcma 472 compatible = "ibm,mcmal";
460 dcr-reg = <0x80 0x80>; 473 dcr-reg = <0x80 0x80>;
461 num-tx-chans = <1>; 474 num-tx-chans = <1>;
462 num-rx-chans = <1>; 475 num-rx-chans = <1>;
463 interrupt-parent = <&M 476 interrupt-parent = <&MAL0>;
464 interrupts = <0 1 2 3 477 interrupts = <0 1 2 3 4>;
465 /* index interrupt-par 478 /* index interrupt-parent interrupt# type */
466 interrupt-map = </*TXE 479 interrupt-map = </*TXEOB*/ 0 &UIC1_2 4 0x4
467 /*RXE 480 /*RXEOB*/ 1 &UIC1_2 3 0x4
468 /*SER 481 /*SERR*/ 2 &UIC1_2 7 0x4
469 /*TXD 482 /*TXDE*/ 3 &UIC1_2 6 0x4
470 /*RXD 483 /*RXDE*/ 4 &UIC1_2 5 0x4>;
471 }; 484 };
472 485
473 MAL1: mcmal1 { 486 MAL1: mcmal1 {
474 #interrupt-cells = <1> 487 #interrupt-cells = <1>;
475 #address-cells = <0>; 488 #address-cells = <0>;
476 #size-cells = <0>; 489 #size-cells = <0>;
477 compatible = "ibm,mcma 490 compatible = "ibm,mcmal";
478 dcr-reg = <0x100 0x80> 491 dcr-reg = <0x100 0x80>;
479 num-tx-chans = <1>; 492 num-tx-chans = <1>;
480 num-rx-chans = <1>; 493 num-rx-chans = <1>;
481 interrupt-parent = <&M 494 interrupt-parent = <&MAL1>;
482 interrupts = <0 1 2 3 495 interrupts = <0 1 2 3 4>;
483 /* index interrupt-par 496 /* index interrupt-parent interrupt# type */
484 interrupt-map = </*TXE 497 interrupt-map = </*TXEOB*/ 0 &UIC1_2 12 0x4
485 /*RXE 498 /*RXEOB*/ 1 &UIC1_2 11 0x4
486 /*SER 499 /*SERR*/ 2 &UIC1_2 15 0x4
487 /*TXD 500 /*TXDE*/ 3 &UIC1_2 14 0x4
488 /*RXD 501 /*RXDE*/ 4 &UIC1_2 13 0x4>;
489 }; 502 };
490 503
491 mmc0: mmc@20c0000 { <<
492 compatible = "st, <<
493 reg = <0x0 <<
494 reg-names = "mmc <<
495 interrupts = <21 <<
496 interrupt-parent = <&U <<
497 interrupt-names = "mmc <<
498 pinctrl-names = "def <<
499 pinctrl-0 = <>; <<
500 clock-names = "mmc <<
501 clocks = <&mm <<
502 bus-width = <4>; <<
503 non-removable; <<
504 sd-uhs-sdr50; <<
505 sd-uhs-sdr104; <<
506 sd-uhs-ddr50; <<
507 }; <<
508 <<
509 opb { 504 opb {
510 compatible = "ibm,opb" 505 compatible = "ibm,opb";
511 #address-cells = <1>; 506 #address-cells = <1>;
512 #size-cells = <1>; 507 #size-cells = <1>;
513 ranges; // pass-thru t 508 ranges; // pass-thru to parent bus
514 clock-frequency = <833 509 clock-frequency = <83333334>;
515 510
516 EMAC0: ethernet@b00000 511 EMAC0: ethernet@b0000000 {
517 linux,network- 512 linux,network-index = <0>;
518 device_type = 513 device_type = "network";
519 compatible = " 514 compatible = "ibm,emac4sync";
520 has-inverted-s 515 has-inverted-stacr-oc;
521 interrupt-pare 516 interrupt-parent = <&UIC1_2>;
522 interrupts = < 517 interrupts = <1 0x4 0 0x4>;
523 reg = <0xb0000 518 reg = <0xb0000000 0x100>;
524 local-mac-addr 519 local-mac-address = [000000000000]; /* Filled in by
525 520 cuboot */
526 mal-device = < 521 mal-device = <&MAL0>;
527 mal-tx-channel 522 mal-tx-channel = <0>;
528 mal-rx-channel 523 mal-rx-channel = <0>;
529 cell-index = < 524 cell-index = <0>;
530 max-frame-size 525 max-frame-size = <1500>;
531 rx-fifo-size = 526 rx-fifo-size = <4096>;
532 tx-fifo-size = 527 tx-fifo-size = <4096>;
533 rx-fifo-size-g 528 rx-fifo-size-gige = <16384>;
534 tx-fifo-size-g 529 tx-fifo-size-gige = <8192>;
535 phy-address = 530 phy-address = <1>;
536 phy-mode = "rg 531 phy-mode = "rgmii";
537 phy-map = <000 532 phy-map = <00000003>;
538 rgmii-device = 533 rgmii-device = <&RGMII>;
539 rgmii-channel 534 rgmii-channel = <0>;
540 }; 535 };
541 536
542 EMAC1: ethernet@b00001 537 EMAC1: ethernet@b0000100 {
543 linux,network- 538 linux,network-index = <1>;
544 device_type = 539 device_type = "network";
545 compatible = " 540 compatible = "ibm,emac4sync";
546 has-inverted-s 541 has-inverted-stacr-oc;
547 interrupt-pare 542 interrupt-parent = <&UIC1_2>;
548 interrupts = < 543 interrupts = <9 0x4 8 0x4>;
549 reg = <0xb0000 544 reg = <0xb0000100 0x100>;
550 local-mac-addr 545 local-mac-address = [000000000000]; /* Filled in by
551 546 cuboot */
552 mal-device = < 547 mal-device = <&MAL1>;
553 mal-tx-channel 548 mal-tx-channel = <0>;
554 mal-rx-channel 549 mal-rx-channel = <0>;
555 cell-index = < 550 cell-index = <1>;
556 max-frame-size 551 max-frame-size = <1500>;
557 rx-fifo-size = 552 rx-fifo-size = <4096>;
558 tx-fifo-size = 553 tx-fifo-size = <4096>;
559 rx-fifo-size-g 554 rx-fifo-size-gige = <16384>;
560 tx-fifo-size-g 555 tx-fifo-size-gige = <8192>;
561 phy-address = 556 phy-address = <2>;
562 phy-mode = "rg 557 phy-mode = "rgmii";
563 phy-map = <000 558 phy-map = <00000003>;
564 rgmii-device = 559 rgmii-device = <&RGMII>;
565 rgmii-channel 560 rgmii-channel = <1>;
566 }; 561 };
567 562
568 RGMII: rgmii@b0000600 563 RGMII: rgmii@b0000600 {
569 compatible = " 564 compatible = "ibm,rgmii";
570 has-mdio; 565 has-mdio;
571 reg = <0xb0000 566 reg = <0xb0000600 0x8>;
572 }; 567 };
573 568
574 UART0: serial@b0020000 569 UART0: serial@b0020000 {
575 device_type = 570 device_type = "serial";
576 compatible = " 571 compatible = "ns16550";
577 reg = <0xb0020 572 reg = <0xb0020000 0x8>;
578 virtual-reg = 573 virtual-reg = <0xb0020000>;
579 clock-frequenc 574 clock-frequency = <20833333>;
580 current-speed 575 current-speed = <115200>;
581 interrupt-pare 576 interrupt-parent = <&UIC0>;
582 interrupts = < 577 interrupts = <31 0x4>;
583 }; 578 };
584 }; 579 };
585 580
586 OHCI1: ohci@2040000 { !! 581 OHCI1: ohci@02040000 {
587 compatible = "ohci-le" 582 compatible = "ohci-le";
588 reg = <0x02040000 0xa0 583 reg = <0x02040000 0xa0>;
589 interrupt-parent = <&U 584 interrupt-parent = <&UIC1_3>;
590 interrupts = <28 0x8 2 585 interrupts = <28 0x8 29 0x8>;
591 }; 586 };
592 587
593 OHCI2: ohci@2080000 { !! 588 OHCI2: ohci@02080000 {
594 compatible = "ohci-le" 589 compatible = "ohci-le";
595 reg = <0x02080000 0xa0 590 reg = <0x02080000 0xa0>;
596 interrupt-parent = <&U 591 interrupt-parent = <&UIC1_3>;
597 interrupts = <30 0x8 3 592 interrupts = <30 0x8 31 0x8>;
598 }; 593 };
599 594
600 EHCI: ehci@2000000 { !! 595 EHCI: ehci@02000000 {
601 compatible = "usb-ehci 596 compatible = "usb-ehci";
602 reg = <0x02000000 0xa4 597 reg = <0x02000000 0xa4>;
603 interrupt-parent = <&U 598 interrupt-parent = <&UIC1_3>;
604 interrupts = <23 0x4>; 599 interrupts = <23 0x4>;
605 }; 600 };
606 601
607 }; 602 };
608 603
609 chosen { 604 chosen {
610 stdout-path = "/plb/opb/serial !! 605 linux,stdout-path = "/plb/opb/serial@b0020000";
611 bootargs = "console=ttyS0,1152 606 bootargs = "console=ttyS0,115200 rw log_buf_len=32768 debug";
612 }; 607 };
613 }; 608 };
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