1 /* 1 /*
2 * Device Tree Source for Emerson KSI8560 2 * Device Tree Source for Emerson KSI8560
3 * 3 *
4 * Author: Alexandr Smirnov <asmirnov@ru.mvista 4 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
5 * 5 *
6 * Based on mpc8560ads.dts 6 * Based on mpc8560ads.dts
7 * 7 *
8 * 2008 (c) MontaVista, Software, Inc. This f 8 * 2008 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License 9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of 10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied. 11 * or implied.
12 * 12 *
13 */ 13 */
14 14
15 /dts-v1/; 15 /dts-v1/;
16 16
17 /include/ "fsl/e500v1_power_isa.dtsi" 17 /include/ "fsl/e500v1_power_isa.dtsi"
18 18
19 / { 19 / {
20 model = "KSI8560"; 20 model = "KSI8560";
21 compatible = "emerson,KSI8560"; 21 compatible = "emerson,KSI8560";
22 #address-cells = <1>; 22 #address-cells = <1>;
23 #size-cells = <1>; 23 #size-cells = <1>;
24 24
25 aliases { 25 aliases {
26 ethernet0 = &enet0; 26 ethernet0 = &enet0;
27 ethernet1 = &enet1; 27 ethernet1 = &enet1;
28 ethernet2 = &enet2; 28 ethernet2 = &enet2;
29 }; 29 };
30 30
31 cpus { 31 cpus {
32 #address-cells = <1>; 32 #address-cells = <1>;
33 #size-cells = <0>; 33 #size-cells = <0>;
34 34
35 PowerPC,8560@0 { 35 PowerPC,8560@0 {
36 device_type = "cpu"; 36 device_type = "cpu";
37 reg = <0>; 37 reg = <0>;
38 d-cache-line-size = <3 38 d-cache-line-size = <32>;
39 i-cache-line-size = <3 39 i-cache-line-size = <32>;
40 d-cache-size = <0x8000 40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000 41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = < 42 timebase-frequency = <0>; /* From U-boot */
43 bus-frequency = <0>; 43 bus-frequency = <0>; /* From U-boot */
44 clock-frequency = <0>; 44 clock-frequency = <0>; /* From U-boot */
45 next-level-cache = <&L 45 next-level-cache = <&L2>;
46 }; 46 };
47 }; 47 };
48 48
49 memory { 49 memory {
50 device_type = "memory"; 50 device_type = "memory";
51 reg = <0x00000000 0x10000000>; 51 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
52 }; 52 };
53 53
54 soc@fdf00000 { 54 soc@fdf00000 {
55 #address-cells = <1>; 55 #address-cells = <1>;
56 #size-cells = <1>; 56 #size-cells = <1>;
57 device_type = "soc"; 57 device_type = "soc";
58 ranges = <0x00000000 0xfdf0000 58 ranges = <0x00000000 0xfdf00000 0x00100000>;
59 bus-frequency = <0>; 59 bus-frequency = <0>; /* Fixed by bootwrapper */
60 60
61 ecm-law@0 { 61 ecm-law@0 {
62 compatible = "fsl,ecm- 62 compatible = "fsl,ecm-law";
63 reg = <0x0 0x1000>; 63 reg = <0x0 0x1000>;
64 fsl,num-laws = <8>; 64 fsl,num-laws = <8>;
65 }; 65 };
66 66
67 ecm@1000 { 67 ecm@1000 {
68 compatible = "fsl,mpc8 68 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
69 reg = <0x1000 0x1000>; 69 reg = <0x1000 0x1000>;
70 interrupts = <17 2>; 70 interrupts = <17 2>;
71 interrupt-parent = <&m 71 interrupt-parent = <&mpic>;
72 }; 72 };
73 73
74 memory-controller@2000 { 74 memory-controller@2000 {
75 compatible = "fsl,mpc8 75 compatible = "fsl,mpc8540-memory-controller";
76 reg = <0x2000 0x1000>; 76 reg = <0x2000 0x1000>;
77 interrupt-parent = <&m 77 interrupt-parent = <&mpic>;
78 interrupts = <0x12 0x2 78 interrupts = <0x12 0x2>;
79 }; 79 };
80 80
81 L2: l2-cache-controller@20000 81 L2: l2-cache-controller@20000 {
82 compatible = "fsl,mpc8 82 compatible = "fsl,mpc8540-l2-cache-controller";
83 reg = <0x20000 0x1000> 83 reg = <0x20000 0x1000>;
84 cache-line-size = <0x2 84 cache-line-size = <0x20>; /* 32 bytes */
85 cache-size = <0x40000> 85 cache-size = <0x40000>; /* L2, 256K */
86 interrupt-parent = <&m 86 interrupt-parent = <&mpic>;
87 interrupts = <0x10 0x2 87 interrupts = <0x10 0x2>;
88 }; 88 };
89 89
90 i2c@3000 { 90 i2c@3000 {
91 #address-cells = <1>; 91 #address-cells = <1>;
92 #size-cells = <0>; 92 #size-cells = <0>;
93 cell-index = <0>; 93 cell-index = <0>;
94 compatible = "fsl-i2c" 94 compatible = "fsl-i2c";
95 reg = <0x3000 0x100>; 95 reg = <0x3000 0x100>;
96 interrupts = <0x2b 0x2 96 interrupts = <0x2b 0x2>;
97 interrupt-parent = <&m 97 interrupt-parent = <&mpic>;
98 dfsrr; 98 dfsrr;
99 }; 99 };
100 100
101 dma@21300 { 101 dma@21300 {
102 #address-cells = <1>; 102 #address-cells = <1>;
103 #size-cells = <1>; 103 #size-cells = <1>;
104 compatible = "fsl,mpc8 104 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
105 reg = <0x21300 0x4>; 105 reg = <0x21300 0x4>;
106 ranges = <0x0 0x21100 106 ranges = <0x0 0x21100 0x200>;
107 cell-index = <0>; 107 cell-index = <0>;
108 dma-channel@0 { 108 dma-channel@0 {
109 compatible = " 109 compatible = "fsl,mpc8560-dma-channel",
110 110 "fsl,eloplus-dma-channel";
111 reg = <0x0 0x8 111 reg = <0x0 0x80>;
112 cell-index = < 112 cell-index = <0>;
113 interrupt-pare 113 interrupt-parent = <&mpic>;
114 interrupts = < 114 interrupts = <20 2>;
115 }; 115 };
116 dma-channel@80 { 116 dma-channel@80 {
117 compatible = " 117 compatible = "fsl,mpc8560-dma-channel",
118 118 "fsl,eloplus-dma-channel";
119 reg = <0x80 0x 119 reg = <0x80 0x80>;
120 cell-index = < 120 cell-index = <1>;
121 interrupt-pare 121 interrupt-parent = <&mpic>;
122 interrupts = < 122 interrupts = <21 2>;
123 }; 123 };
124 dma-channel@100 { 124 dma-channel@100 {
125 compatible = " 125 compatible = "fsl,mpc8560-dma-channel",
126 126 "fsl,eloplus-dma-channel";
127 reg = <0x100 0 127 reg = <0x100 0x80>;
128 cell-index = < 128 cell-index = <2>;
129 interrupt-pare 129 interrupt-parent = <&mpic>;
130 interrupts = < 130 interrupts = <22 2>;
131 }; 131 };
132 dma-channel@180 { 132 dma-channel@180 {
133 compatible = " 133 compatible = "fsl,mpc8560-dma-channel",
134 134 "fsl,eloplus-dma-channel";
135 reg = <0x180 0 135 reg = <0x180 0x80>;
136 cell-index = < 136 cell-index = <3>;
137 interrupt-pare 137 interrupt-parent = <&mpic>;
138 interrupts = < 138 interrupts = <23 2>;
139 }; 139 };
140 }; 140 };
141 141
142 enet0: ethernet@24000 { 142 enet0: ethernet@24000 {
143 #address-cells = <1>; 143 #address-cells = <1>;
144 #size-cells = <1>; 144 #size-cells = <1>;
145 device_type = "network 145 device_type = "network";
146 model = "TSEC"; 146 model = "TSEC";
147 compatible = "gianfar" 147 compatible = "gianfar";
148 reg = <0x24000 0x1000> 148 reg = <0x24000 0x1000>;
149 ranges = <0x0 0x24000 149 ranges = <0x0 0x24000 0x1000>;
150 /* Mac address filled 150 /* Mac address filled in by bootwrapper */
151 local-mac-address = [ 151 local-mac-address = [ 00 00 00 00 00 00 ];
152 interrupts = <0x1d 0x2 152 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
153 interrupt-parent = <&m 153 interrupt-parent = <&mpic>;
154 tbi-handle = <&tbi0>; 154 tbi-handle = <&tbi0>;
155 phy-handle = <&PHY1>; 155 phy-handle = <&PHY1>;
156 156
157 mdio@520 { 157 mdio@520 { /* For TSECs */
158 #address-cells 158 #address-cells = <1>;
159 #size-cells = 159 #size-cells = <0>;
160 compatible = " 160 compatible = "fsl,gianfar-mdio";
161 reg = <0x520 0 161 reg = <0x520 0x20>;
162 162
163 PHY1: ethernet 163 PHY1: ethernet-phy@1 {
164 interr 164 interrupt-parent = <&mpic>;
165 reg = 165 reg = <0x1>;
166 }; 166 };
167 167
168 PHY2: ethernet 168 PHY2: ethernet-phy@2 {
169 interr 169 interrupt-parent = <&mpic>;
170 reg = 170 reg = <0x2>;
171 }; 171 };
172 172
173 tbi0: tbi-phy@ 173 tbi0: tbi-phy@11 {
174 reg = 174 reg = <0x11>;
175 device 175 device_type = "tbi-phy";
176 }; 176 };
177 }; 177 };
178 }; 178 };
179 179
180 enet1: ethernet@25000 { 180 enet1: ethernet@25000 {
181 #address-cells = <1>; 181 #address-cells = <1>;
182 #size-cells = <1>; 182 #size-cells = <1>;
183 device_type = "network 183 device_type = "network";
184 model = "TSEC"; 184 model = "TSEC";
185 compatible = "gianfar" 185 compatible = "gianfar";
186 reg = <0x25000 0x1000> 186 reg = <0x25000 0x1000>;
187 ranges = <0x0 0x25000 187 ranges = <0x0 0x25000 0x1000>;
188 /* Mac address filled 188 /* Mac address filled in by bootwrapper */
189 local-mac-address = [ 189 local-mac-address = [ 00 00 00 00 00 00 ];
190 interrupts = <0x23 0x2 190 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
191 interrupt-parent = <&m 191 interrupt-parent = <&mpic>;
192 tbi-handle = <&tbi1>; 192 tbi-handle = <&tbi1>;
193 phy-handle = <&PHY2>; 193 phy-handle = <&PHY2>;
194 194
195 mdio@520 { 195 mdio@520 {
196 #address-cells 196 #address-cells = <1>;
197 #size-cells = 197 #size-cells = <0>;
198 compatible = " 198 compatible = "fsl,gianfar-tbi";
199 reg = <0x520 0 199 reg = <0x520 0x20>;
200 200
201 tbi1: tbi-phy@ 201 tbi1: tbi-phy@11 {
202 reg = 202 reg = <0x11>;
203 device 203 device_type = "tbi-phy";
204 }; 204 };
205 }; 205 };
206 }; 206 };
207 207
208 mpic: pic@40000 { 208 mpic: pic@40000 {
209 #address-cells = <0>; 209 #address-cells = <0>;
210 #interrupt-cells = <2> 210 #interrupt-cells = <2>;
211 interrupt-controller; 211 interrupt-controller;
212 reg = <0x40000 0x40000 212 reg = <0x40000 0x40000>;
213 device_type = "open-pi 213 device_type = "open-pic";
214 }; 214 };
215 215
216 cpm@919c0 { 216 cpm@919c0 {
217 #address-cells = <1>; 217 #address-cells = <1>;
218 #size-cells = <1>; 218 #size-cells = <1>;
219 compatible = "fsl,mpc8 219 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
220 reg = <0x919c0 0x30>; 220 reg = <0x919c0 0x30>;
221 ranges; 221 ranges;
222 222
223 muram@80000 { 223 muram@80000 {
224 #address-cells 224 #address-cells = <1>;
225 #size-cells = 225 #size-cells = <1>;
226 ranges = <0x0 226 ranges = <0x0 0x80000 0x10000>;
227 227
228 data@0 { 228 data@0 {
229 compat 229 compatible = "fsl,cpm-muram-data";
230 reg = 230 reg = <0x0 0x4000 0x9000 0x2000>;
231 }; 231 };
232 }; 232 };
233 233
234 brg@919f0 { 234 brg@919f0 {
235 compatible = " 235 compatible = "fsl,mpc8560-brg",
236 " 236 "fsl,cpm2-brg",
237 " 237 "fsl,cpm-brg";
238 reg = <0x919f0 238 reg = <0x919f0 0x10 0x915f0 0x10>;
239 clock-frequenc 239 clock-frequency = <165000000>; /* 166MHz */
240 }; 240 };
241 241
242 CPMPIC: pic@90c00 { 242 CPMPIC: pic@90c00 {
243 #address-cells 243 #address-cells = <0>;
244 #interrupt-cel 244 #interrupt-cells = <2>;
245 interrupt-cont 245 interrupt-controller;
246 interrupts = < 246 interrupts = <0x2e 0x2>;
247 interrupt-pare 247 interrupt-parent = <&mpic>;
248 reg = <0x90c00 248 reg = <0x90c00 0x80>;
249 compatible = " 249 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
250 }; 250 };
251 251
252 serial@91a00 { 252 serial@91a00 {
253 device_type = 253 device_type = "serial";
254 compatible = " 254 compatible = "fsl,mpc8560-scc-uart",
255 " 255 "fsl,cpm2-scc-uart";
256 reg = <0x91a00 256 reg = <0x91a00 0x20 0x88000 0x100>;
257 fsl,cpm-brg = 257 fsl,cpm-brg = <1>;
258 fsl,cpm-comman 258 fsl,cpm-command = <0x800000>;
259 current-speed 259 current-speed = <0x1c200>;
260 interrupts = < 260 interrupts = <0x28 0x8>;
261 interrupt-pare 261 interrupt-parent = <&CPMPIC>;
262 }; 262 };
263 263
264 serial@91a20 { 264 serial@91a20 {
265 device_type = 265 device_type = "serial";
266 compatible = " 266 compatible = "fsl,mpc8560-scc-uart",
267 " 267 "fsl,cpm2-scc-uart";
268 reg = <0x91a20 268 reg = <0x91a20 0x20 0x88100 0x100>;
269 fsl,cpm-brg = 269 fsl,cpm-brg = <2>;
270 fsl,cpm-comman 270 fsl,cpm-command = <0x4a00000>;
271 current-speed 271 current-speed = <0x1c200>;
272 interrupts = < 272 interrupts = <0x29 0x8>;
273 interrupt-pare 273 interrupt-parent = <&CPMPIC>;
274 }; 274 };
275 275
276 mdio@90d00 { 276 mdio@90d00 { /* For FCCs */
277 #address-cells 277 #address-cells = <1>;
278 #size-cells = 278 #size-cells = <0>;
279 compatible = " 279 compatible = "fsl,cpm2-mdio-bitbang";
280 reg = <0x90d00 280 reg = <0x90d00 0x14>;
281 fsl,mdio-pin = 281 fsl,mdio-pin = <24>;
282 fsl,mdc-pin = 282 fsl,mdc-pin = <25>;
283 283
284 PHY0: ethernet 284 PHY0: ethernet-phy@0 {
285 interr 285 interrupt-parent = <&mpic>;
286 reg = 286 reg = <0x0>;
287 }; 287 };
288 }; 288 };
289 289
290 enet2: ethernet@91300 290 enet2: ethernet@91300 {
291 device_type = 291 device_type = "network";
292 compatible = " 292 compatible = "fsl,mpc8560-fcc-enet",
293 " 293 "fsl,cpm2-fcc-enet";
294 reg = <0x91300 294 reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
295 /* Mac address 295 /* Mac address filled in by bootwrapper */
296 local-mac-addr 296 local-mac-address = [ 00 00 00 00 00 00 ];
297 fsl,cpm-comman 297 fsl,cpm-command = <0x12000300>;
298 interrupts = < 298 interrupts = <0x20 0x8>;
299 interrupt-pare 299 interrupt-parent = <&CPMPIC>;
300 phy-handle = < 300 phy-handle = <&PHY0>;
301 }; 301 };
302 }; 302 };
303 }; 303 };
304 304
305 localbus@fdf05000 { 305 localbus@fdf05000 {
306 #address-cells = <2>; 306 #address-cells = <2>;
307 #size-cells = <1>; 307 #size-cells = <1>;
308 compatible = "fsl,mpc8560-loca 308 compatible = "fsl,mpc8560-localbus", "simple-bus";
309 reg = <0xfdf05000 0x68>; 309 reg = <0xfdf05000 0x68>;
310 310
311 ranges = <0x0 0x0 0xe0000000 0 311 ranges = <0x0 0x0 0xe0000000 0x00800000
312 0x4 0x0 0xe8080000 0 312 0x4 0x0 0xe8080000 0x00080000>;
313 313
314 flash@0,0 { 314 flash@0,0 {
315 #address-cells = <1>; 315 #address-cells = <1>;
316 #size-cells = <1>; 316 #size-cells = <1>;
317 compatible = "jedec-fl 317 compatible = "jedec-flash";
318 reg = <0x0 0x0 0x80000 318 reg = <0x0 0x0 0x800000>;
319 bank-width = <0x2>; 319 bank-width = <0x2>;
320 320
321 partition@0 { 321 partition@0 {
322 label = "Prima 322 label = "Primary Kernel";
323 reg = <0x0 0x1 323 reg = <0x0 0x180000>;
324 }; 324 };
325 partition@180000 { 325 partition@180000 {
326 label = "Prima 326 label = "Primary Filesystem";
327 reg = <0x18000 327 reg = <0x180000 0x580000>;
328 }; 328 };
329 partition@700000 { 329 partition@700000 {
330 label = "Monit 330 label = "Monitor";
331 reg = <0x30000 331 reg = <0x300000 0x100000>;
332 read-only; 332 read-only;
333 }; 333 };
334 }; 334 };
335 335
336 cpld@4,0 { 336 cpld@4,0 {
337 compatible = "emerson, 337 compatible = "emerson,KSI8560-cpld";
338 reg = <0x4 0x0 0x80000 338 reg = <0x4 0x0 0x80000>;
339 }; 339 };
340 }; 340 };
341 341
342 342
343 chosen { 343 chosen {
344 stdout-path = "/soc/cpm/serial 344 stdout-path = "/soc/cpm/serial@91a00";
345 }; 345 };
346 }; 346 };
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