1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * MPC5121E ADS Device Tree Source 2 * MPC5121E ADS Device Tree Source
4 * 3 *
5 * Copyright 2007-2008 Freescale Semiconductor 4 * Copyright 2007-2008 Freescale Semiconductor Inc.
>> 5 *
>> 6 * This program is free software; you can redistribute it and/or modify it
>> 7 * under the terms of the GNU General Public License as published by the
>> 8 * Free Software Foundation; either version 2 of the License, or (at your
>> 9 * option) any later version.
6 */ 10 */
7 11
8 #include "mpc5121.dtsi" !! 12 #include <mpc5121.dtsi>
9 13
10 / { 14 / {
11 model = "mpc5121ads"; 15 model = "mpc5121ads";
12 compatible = "fsl,mpc5121ads", "fsl,mp 16 compatible = "fsl,mpc5121ads", "fsl,mpc5121";
13 17
14 nfc@40000000 { 18 nfc@40000000 {
15 /* 19 /*
16 * ADS has two Hynix 512MB Nan 20 * ADS has two Hynix 512MB Nand flash chips in a single
17 * stacked package. 21 * stacked package.
18 */ 22 */
19 chips = <2>; 23 chips = <2>;
20 24
21 nand@0 { 25 nand@0 {
22 label = "nand"; 26 label = "nand";
23 reg = <0x00000000 0x40 27 reg = <0x00000000 0x40000000>; /* 512MB + 512MB */
24 }; 28 };
25 }; 29 };
26 30
27 localbus@80000020 { 31 localbus@80000020 {
28 ranges = <0x0 0x0 0xfc000000 0 32 ranges = <0x0 0x0 0xfc000000 0x04000000
29 0x2 0x0 0x82000000 0 33 0x2 0x0 0x82000000 0x00008000>;
30 34
31 flash@0,0 { 35 flash@0,0 {
32 compatible = "cfi-flas 36 compatible = "cfi-flash";
33 reg = <0 0x0 0x4000000 37 reg = <0 0x0 0x4000000>;
34 #address-cells = <1>; 38 #address-cells = <1>;
35 #size-cells = <1>; 39 #size-cells = <1>;
36 bank-width = <4>; 40 bank-width = <4>;
37 device-width = <2>; 41 device-width = <2>;
38 42
39 protected@0 { 43 protected@0 {
40 label = "prote 44 label = "protected";
41 reg = <0x00000 45 reg = <0x00000000 0x00040000>; // first sector is protected
42 read-only; 46 read-only;
43 }; 47 };
44 filesystem@40000 { 48 filesystem@40000 {
45 label = "files 49 label = "filesystem";
46 reg = <0x00040 50 reg = <0x00040000 0x03c00000>; // 60M for filesystem
47 }; 51 };
48 kernel@3c40000 { 52 kernel@3c40000 {
49 label = "kerne 53 label = "kernel";
50 reg = <0x03c40 54 reg = <0x03c40000 0x00280000>; // 2.5M for kernel
51 }; 55 };
52 device-tree@3ec0000 { 56 device-tree@3ec0000 {
53 label = "devic 57 label = "device-tree";
54 reg = <0x03ec0 58 reg = <0x03ec0000 0x00040000>; // one sector for device tree
55 }; 59 };
56 u-boot@3f00000 { 60 u-boot@3f00000 {
57 label = "u-boo 61 label = "u-boot";
58 reg = <0x03f00 62 reg = <0x03f00000 0x00100000>; // 1M for u-boot
59 read-only; 63 read-only;
60 }; 64 };
61 }; 65 };
62 66
63 board-control@2,0 { 67 board-control@2,0 {
64 compatible = "fsl,mpc5 68 compatible = "fsl,mpc5121ads-cpld";
65 reg = <0x2 0x0 0x8000> 69 reg = <0x2 0x0 0x8000>;
66 }; 70 };
67 71
68 cpld_pic: pic@2,a { 72 cpld_pic: pic@2,a {
69 compatible = "fsl,mpc5 73 compatible = "fsl,mpc5121ads-cpld-pic";
70 interrupt-controller; 74 interrupt-controller;
71 #interrupt-cells = <2> 75 #interrupt-cells = <2>;
72 reg = <0x2 0xa 0x5>; 76 reg = <0x2 0xa 0x5>;
73 /* irq routing: 77 /* irq routing:
74 * all irqs but touch 78 * all irqs but touch screen are routed to irq0 (ipic 48)
75 * touch screen is sta 79 * touch screen is statically routed to irq1 (ipic 17)
76 * so don't use it her 80 * so don't use it here
77 */ 81 */
78 interrupts = <48 0x8>; 82 interrupts = <48 0x8>;
79 }; 83 };
80 }; 84 };
81 85
82 soc@80000000 { 86 soc@80000000 {
83 87
84 i2c@1700 { 88 i2c@1700 {
85 fsl,preserve-clocking; 89 fsl,preserve-clocking;
86 90
87 hwmon@4a { 91 hwmon@4a {
88 compatible = " 92 compatible = "adi,ad7414";
89 reg = <0x4a>; 93 reg = <0x4a>;
90 }; 94 };
91 95
92 eeprom@50 { 96 eeprom@50 {
93 compatible = " !! 97 compatible = "at,24c32";
94 reg = <0x50>; 98 reg = <0x50>;
95 }; 99 };
96 100
97 rtc@68 { 101 rtc@68 {
98 compatible = " 102 compatible = "st,m41t62";
99 reg = <0x68>; 103 reg = <0x68>;
100 }; 104 };
101 }; 105 };
102 106
103 eth0: ethernet@2800 { 107 eth0: ethernet@2800 {
104 phy-handle = <&phy0>; 108 phy-handle = <&phy0>;
105 }; 109 };
106 110
107 can@2300 { 111 can@2300 {
108 status = "disabled"; 112 status = "disabled";
109 }; 113 };
110 114
111 can@2380 { 115 can@2380 {
112 status = "disabled"; 116 status = "disabled";
113 }; 117 };
114 118
115 viu@2400 { 119 viu@2400 {
116 status = "disabled"; 120 status = "disabled";
117 }; 121 };
118 122
119 mdio@2800 { 123 mdio@2800 {
120 phy0: ethernet-phy@0 { 124 phy0: ethernet-phy@0 {
121 reg = <1>; 125 reg = <1>;
122 }; 126 };
123 }; 127 };
124 128
125 /* mpc5121ads only uses USB0 * 129 /* mpc5121ads only uses USB0 */
126 usb@3000 { 130 usb@3000 {
127 status = "disabled"; 131 status = "disabled";
128 }; 132 };
129 133
130 /* USB0 using internal UTMI PH 134 /* USB0 using internal UTMI PHY */
131 usb@4000 { 135 usb@4000 {
132 dr_mode = "host"; 136 dr_mode = "host";
133 fsl,invert-drvvbus; 137 fsl,invert-drvvbus;
134 fsl,invert-pwr-fault; 138 fsl,invert-pwr-fault;
135 }; 139 };
136 140
137 /* PSC3 serial port A aka ttyP 141 /* PSC3 serial port A aka ttyPSC0 */
138 psc@11300 { 142 psc@11300 {
139 compatible = "fsl,mpc5 143 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
140 }; 144 };
141 145
142 /* PSC4 serial port B aka ttyP 146 /* PSC4 serial port B aka ttyPSC1 */
143 psc@11400 { 147 psc@11400 {
144 compatible = "fsl,mpc5 148 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
145 }; 149 };
146 150
147 /* PSC5 in ac97 mode */ 151 /* PSC5 in ac97 mode */
148 ac97: psc@11500 { 152 ac97: psc@11500 {
149 compatible = "fsl,mpc5 153 compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
150 fsl,mode = "ac97-slave 154 fsl,mode = "ac97-slave";
151 fsl,rx-fifo-size = <38 155 fsl,rx-fifo-size = <384>;
152 fsl,tx-fifo-size = <38 156 fsl,tx-fifo-size = <384>;
153 }; 157 };
154 }; 158 };
155 159
156 pci: pci@80008500 { 160 pci: pci@80008500 {
157 interrupt-map-mask = <0xf800 0 161 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
158 interrupt-map = < 162 interrupt-map = <
159 /* IDSEL 0x15 163 /* IDSEL 0x15 - Slot 1 PCI */
160 0xa800 0x0 0x 164 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
161 0xa800 0x0 0x 165 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
162 0xa800 0x0 0x 166 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
163 0xa800 0x0 0x 167 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
164 168
165 /* IDSEL 0x16 169 /* IDSEL 0x16 - Slot 2 MiniPCI */
166 0xb000 0x0 0x 170 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
167 0xb000 0x0 0x 171 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
168 172
169 /* IDSEL 0x17 173 /* IDSEL 0x17 - Slot 3 MiniPCI */
170 0xb800 0x0 0x 174 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
171 0xb800 0x0 0x 175 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
172 >; 176 >;
173 }; 177 };
174 }; 178 };
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