1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * O2D base Device Tree Source 3 * O2D base Device Tree Source
4 * 4 *
5 * Copyright (C) 2012 DENX Software Engineerin 5 * Copyright (C) 2012 DENX Software Engineering
6 * Anatolij Gustschin <agust@denx.de> 6 * Anatolij Gustschin <agust@denx.de>
7 */ 7 */
8 8
9 /include/ "mpc5200b.dtsi" 9 /include/ "mpc5200b.dtsi"
10 10
11 &gpt0 { 11 &gpt0 {
12 gpio-controller; 12 gpio-controller;
13 fsl,has-wdt; 13 fsl,has-wdt;
14 fsl,wdt-on-boot = <0>; 14 fsl,wdt-on-boot = <0>;
15 }; 15 };
16 &gpt1 { gpio-controller; }; 16 &gpt1 { gpio-controller; };
17 17
18 / { 18 / {
19 model = "ifm,o2d"; 19 model = "ifm,o2d";
20 compatible = "ifm,o2d"; 20 compatible = "ifm,o2d";
21 21
22 memory@0 { !! 22 memory {
23 reg = <0x00000000 0x04000000>; 23 reg = <0x00000000 0x04000000>; // 64MB
24 }; 24 };
25 25
26 soc5200@f0000000 { 26 soc5200@f0000000 {
27 27
28 rtc@800 { 28 rtc@800 {
29 status = "disabled"; 29 status = "disabled";
30 }; 30 };
31 31
32 psc@2000 { // PSC 32 psc@2000 { // PSC1
33 compatible = "fsl,mpc5 33 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
34 #address-cells = <1>; 34 #address-cells = <1>;
35 #size-cells = <0>; 35 #size-cells = <0>;
36 cell-index = <0>; 36 cell-index = <0>;
>> 37
>> 38 spidev@0 {
>> 39 compatible = "spidev";
>> 40 spi-max-frequency = <250000>;
>> 41 reg = <0>;
>> 42 };
37 }; 43 };
38 44
39 psc@2200 { // PSC 45 psc@2200 { // PSC2
40 status = "disabled"; 46 status = "disabled";
41 }; 47 };
42 48
43 psc@2400 { // PSC 49 psc@2400 { // PSC3
44 status = "disabled"; 50 status = "disabled";
45 }; 51 };
46 52
47 psc@2600 { // PSC 53 psc@2600 { // PSC4
48 compatible = "fsl,mpc5 54 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
49 }; 55 };
50 56
51 psc@2800 { // PSC 57 psc@2800 { // PSC5
52 compatible = "fsl,mpc5 58 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
53 }; 59 };
54 60
55 psc@2c00 { // PSC 61 psc@2c00 { // PSC6
56 status = "disabled"; 62 status = "disabled";
57 }; 63 };
58 64
59 ethernet@3000 { 65 ethernet@3000 {
60 phy-handle = <&phy0>; 66 phy-handle = <&phy0>;
61 }; 67 };
62 68
63 mdio@3000 { 69 mdio@3000 {
64 phy0: ethernet-phy@0 { 70 phy0: ethernet-phy@0 {
65 reg = <0>; 71 reg = <0>;
66 }; 72 };
67 }; 73 };
68 }; 74 };
69 75
70 localbus { 76 localbus {
71 ranges = <0 0 0xff000000 0x010 77 ranges = <0 0 0xff000000 0x01000000
72 3 0 0xe3000000 0x001 78 3 0 0xe3000000 0x00100000>;
73 79
74 // flash device at LocalPlus B 80 // flash device at LocalPlus Bus CS0
75 flash@0,0 { 81 flash@0,0 {
76 compatible = "cfi-flas 82 compatible = "cfi-flash";
77 reg = <0 0 0x01000000> 83 reg = <0 0 0x01000000>;
78 bank-width = <1>; 84 bank-width = <1>;
79 device-width = <2>; 85 device-width = <2>;
80 #size-cells = <1>; 86 #size-cells = <1>;
81 #address-cells = <1>; 87 #address-cells = <1>;
82 no-unaligned-direct-ac 88 no-unaligned-direct-access;
83 89
84 /* common layout for a 90 /* common layout for all machines */
85 partition@0 { 91 partition@0 {
86 label = "u-boo 92 label = "u-boot";
87 reg = <0x00000 93 reg = <0x00000000 0x00040000>;
88 read-only; 94 read-only;
89 }; 95 };
90 partition@40000 { 96 partition@40000 {
91 label = "env"; 97 label = "env";
92 reg = <0x00040 98 reg = <0x00040000 0x00020000>;
93 read-only; 99 read-only;
94 }; 100 };
95 }; 101 };
96 102
97 csi@3,0 { 103 csi@3,0 {
98 compatible = "ifm,o2d- 104 compatible = "ifm,o2d-csi";
99 reg = <3 0 0x00100000> 105 reg = <3 0 0x00100000>;
100 ifm,csi-clk-handle = < 106 ifm,csi-clk-handle = <&gpt7>;
101 gpios = <&gpio_simple 107 gpios = <&gpio_simple 23 0 /* imag_capture */
102 &gpio_simple 108 &gpio_simple 26 0 /* imag_reset */
103 &gpio_simple 109 &gpio_simple 29 0>; /* imag_master_en */
104 110
105 interrupts = <1 1 2>; 111 interrupts = <1 1 2>; /* IRQ1, edge falling */
106 112
107 ifm,csi-addr-bus-width 113 ifm,csi-addr-bus-width = <24>;
108 ifm,csi-data-bus-width 114 ifm,csi-data-bus-width = <8>;
109 ifm,csi-wait-cycles = 115 ifm,csi-wait-cycles = <0>;
110 }; 116 };
111 }; 117 };
112 }; 118 };
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