1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Device Tree Source for IFM PDM360NG. 2 * Device Tree Source for IFM PDM360NG.
4 * 3 *
5 * Copyright 2009 - 2010 DENX Software Enginee 4 * Copyright 2009 - 2010 DENX Software Engineering.
6 * Anatolij Gustschin <agust@denx.de> 5 * Anatolij Gustschin <agust@denx.de>
7 * 6 *
8 * Based on MPC5121E ADS dts. 7 * Based on MPC5121E ADS dts.
9 * Copyright 2008 Freescale Semiconductor Inc. 8 * Copyright 2008 Freescale Semiconductor Inc.
>> 9 *
>> 10 * This program is free software; you can redistribute it and/or modify it
>> 11 * under the terms of the GNU General Public License as published by the
>> 12 * Free Software Foundation; either version 2 of the License, or (at your
>> 13 * option) any later version.
10 */ 14 */
11 15
12 #include "mpc5121.dtsi" !! 16 #include <mpc5121.dtsi>
13 17
14 / { 18 / {
15 model = "pdm360ng"; 19 model = "pdm360ng";
16 compatible = "ifm,pdm360ng", "fsl,mpc5 20 compatible = "ifm,pdm360ng", "fsl,mpc5121";
17 #address-cells = <1>; 21 #address-cells = <1>;
18 #size-cells = <1>; 22 #size-cells = <1>;
19 interrupt-parent = <&ipic>; 23 interrupt-parent = <&ipic>;
20 24
21 memory { 25 memory {
22 device_type = "memory"; 26 device_type = "memory";
23 reg = <0x00000000 0x20000000>; 27 reg = <0x00000000 0x20000000>; // 512MB at 0
24 }; 28 };
25 29
26 nfc@40000000 { 30 nfc@40000000 {
27 bank-width = <0x1>; 31 bank-width = <0x1>;
28 chips = <0x1>; 32 chips = <0x1>;
29 33
30 partition@0 { 34 partition@0 {
31 label = "nand0"; 35 label = "nand0";
32 reg = <0x0 0x40000000> 36 reg = <0x0 0x40000000>;
33 }; 37 };
34 }; 38 };
35 39
36 localbus@80000020 { 40 localbus@80000020 {
37 ranges = <0x0 0x0 0xf0000000 0 41 ranges = <0x0 0x0 0xf0000000 0x10000000 /* Flash */
38 0x2 0x0 0x50040000 0 42 0x2 0x0 0x50040000 0x00020000>; /* CS2: MRAM */
39 43
40 flash@0,0 { 44 flash@0,0 {
41 compatible = "amd,s29g 45 compatible = "amd,s29gl01gp", "cfi-flash";
42 reg = <0 0x00000000 0x 46 reg = <0 0x00000000 0x08000000
43 0 0x08000000 0x 47 0 0x08000000 0x08000000>;
44 #address-cells = <1>; 48 #address-cells = <1>;
45 #size-cells = <1>; 49 #size-cells = <1>;
46 bank-width = <4>; 50 bank-width = <4>;
47 device-width = <2>; 51 device-width = <2>;
48 52
49 partition@0 { 53 partition@0 {
50 label = "u-boo 54 label = "u-boot";
51 reg = <0x00000 55 reg = <0x00000000 0x00080000>;
52 read-only; 56 read-only;
53 }; 57 };
54 partition@80000 { 58 partition@80000 {
55 label = "envir 59 label = "environment";
56 reg = <0x00080 60 reg = <0x00080000 0x00080000>;
57 read-only; 61 read-only;
58 }; 62 };
59 partition@100000 { 63 partition@100000 {
60 label = "splas 64 label = "splash-image";
61 reg = <0x00100 65 reg = <0x00100000 0x00080000>;
62 read-only; 66 read-only;
63 }; 67 };
64 partition@180000 { 68 partition@180000 {
65 label = "devic 69 label = "device-tree";
66 reg = <0x00180 70 reg = <0x00180000 0x00040000>;
67 }; 71 };
68 partition@1c0000 { 72 partition@1c0000 {
69 label = "kerne 73 label = "kernel";
70 reg = <0x001c0 74 reg = <0x001c0000 0x00500000>;
71 }; 75 };
72 partition@6c0000 { 76 partition@6c0000 {
73 label = "files 77 label = "filesystem";
74 reg = <0x006c0 78 reg = <0x006c0000 0x07940000>;
75 }; 79 };
76 }; 80 };
77 81
78 mram0@2,0 { 82 mram0@2,0 {
79 compatible = "mtd-ram" 83 compatible = "mtd-ram";
80 reg = <2 0x00000 0x100 84 reg = <2 0x00000 0x10000>;
81 bank-width = <2>; 85 bank-width = <2>;
82 }; 86 };
83 87
84 mram1@2,10000 { 88 mram1@2,10000 {
85 compatible = "mtd-ram" 89 compatible = "mtd-ram";
86 reg = <2 0x010000 0x10 90 reg = <2 0x010000 0x10000>;
87 bank-width = <2>; 91 bank-width = <2>;
88 }; 92 };
89 }; 93 };
90 94
91 soc@80000000 { 95 soc@80000000 {
92 96
93 i2c@1700 { 97 i2c@1700 {
94 fsl,preserve-clocking; 98 fsl,preserve-clocking;
95 99
96 eeprom@50 { 100 eeprom@50 {
97 compatible = " !! 101 compatible = "at,24c01";
98 reg = <0x50>; 102 reg = <0x50>;
99 }; 103 };
100 104
101 rtc@68 { 105 rtc@68 {
102 compatible = " 106 compatible = "st,m41t00";
103 reg = <0x68>; 107 reg = <0x68>;
104 }; 108 };
105 }; 109 };
106 110
107 i2c@1720 { 111 i2c@1720 {
108 status = "disabled"; 112 status = "disabled";
109 }; 113 };
110 114
111 i2c@1740 { 115 i2c@1740 {
112 fsl,preserve-clocking; 116 fsl,preserve-clocking;
113 }; 117 };
114 118
115 ethernet@2800 { 119 ethernet@2800 {
116 phy-handle = <&phy0>; 120 phy-handle = <&phy0>;
117 }; 121 };
118 122
119 mdio@2800 { 123 mdio@2800 {
120 phy0: ethernet-phy@1f 124 phy0: ethernet-phy@1f {
121 compatible = " 125 compatible = "smsc,lan8700";
122 reg = <0x1f>; 126 reg = <0x1f>;
123 }; 127 };
124 }; 128 };
125 129
126 /* USB1 using external ULPI PH 130 /* USB1 using external ULPI PHY */
127 usb@3000 { 131 usb@3000 {
128 dr_mode = "host"; 132 dr_mode = "host";
129 }; 133 };
130 134
131 /* USB0 using internal UTMI PH 135 /* USB0 using internal UTMI PHY */
132 usb@4000 { 136 usb@4000 {
133 fsl,invert-pwr-fault; 137 fsl,invert-pwr-fault;
134 }; 138 };
135 139
136 psc@11000 { 140 psc@11000 {
137 compatible = "fsl,mpc5 141 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
138 }; 142 };
139 143
140 psc@11100 { 144 psc@11100 {
141 compatible = "fsl,mpc5 145 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
142 }; 146 };
143 147
144 psc@11200 { 148 psc@11200 {
145 compatible = "fsl,mpc5 149 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
146 }; 150 };
147 151
148 psc@11300 { 152 psc@11300 {
149 compatible = "fsl,mpc5 153 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
150 }; 154 };
151 155
152 psc@11400 { 156 psc@11400 {
153 compatible = "fsl,mpc5 157 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
154 }; 158 };
155 159
156 psc@11500 { 160 psc@11500 {
157 status = "disabled"; 161 status = "disabled";
158 }; 162 };
159 163
160 psc@11600 { 164 psc@11600 {
161 compatible = "fsl,mpc5 165 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
162 }; 166 };
163 167
164 psc@11700 { 168 psc@11700 {
165 status = "disabled"; 169 status = "disabled";
166 }; 170 };
167 171
168 psc@11800 { 172 psc@11800 {
169 compatible = "fsl,mpc5 173 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
170 }; 174 };
171 175
172 psc@11900 { 176 psc@11900 {
173 compatible = "fsl,mpc5 177 compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
174 #address-cells = <1>; 178 #address-cells = <1>;
175 #size-cells = <0>; 179 #size-cells = <0>;
176 180
177 /* ADS7845 touch scree 181 /* ADS7845 touch screen controller */
178 ts@0 { 182 ts@0 {
179 compatible = " 183 compatible = "ti,ads7846";
180 reg = <0x0>; 184 reg = <0x0>;
181 spi-max-freque 185 spi-max-frequency = <3000000>;
182 /* pen irq is 186 /* pen irq is GPIO25 */
183 interrupts = < 187 interrupts = <78 0x8>;
184 }; 188 };
185 }; 189 };
186 190
187 psc@11a00 { 191 psc@11a00 {
188 status = "disabled"; 192 status = "disabled";
189 }; 193 };
190 194
191 psc@11b00 { 195 psc@11b00 {
192 compatible = "fsl,mpc5 196 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
193 }; 197 };
194 }; 198 };
195 }; 199 };
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